Merge commit 'kumar/next' into next
This commit is contained in:
Коммит
42a0ae2282
|
@ -352,7 +352,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE
|
|||
|
||||
config KEXEC
|
||||
bool "kexec system call (EXPERIMENTAL)"
|
||||
depends on (PPC_BOOK3S || (FSL_BOOKE && !SMP)) && EXPERIMENTAL
|
||||
depends on (PPC_BOOK3S || FSL_BOOKE) && EXPERIMENTAL
|
||||
help
|
||||
kexec is a system call that implements the ability to shutdown your
|
||||
current kernel, and to start another kernel. It is like a reboot
|
||||
|
@ -369,8 +369,8 @@ config KEXEC
|
|||
|
||||
config CRASH_DUMP
|
||||
bool "Build a kdump crash kernel"
|
||||
depends on PPC64 || 6xx
|
||||
select RELOCATABLE if PPC64
|
||||
depends on PPC64 || 6xx || FSL_BOOKE
|
||||
select RELOCATABLE if PPC64 || FSL_BOOKE
|
||||
help
|
||||
Build a kernel suitable for use as a kdump capture kernel.
|
||||
The same kernel binary can be used as production kernel and dump
|
||||
|
@ -898,7 +898,7 @@ config KERNEL_START_BOOL
|
|||
config KERNEL_START
|
||||
hex "Virtual address of kernel base" if KERNEL_START_BOOL
|
||||
default PAGE_OFFSET if PAGE_OFFSET_BOOL
|
||||
default "0xc2000000" if CRASH_DUMP
|
||||
default "0xc2000000" if CRASH_DUMP && !RELOCATABLE
|
||||
default "0xc0000000"
|
||||
|
||||
config PHYSICAL_START_BOOL
|
||||
|
@ -911,7 +911,7 @@ config PHYSICAL_START_BOOL
|
|||
|
||||
config PHYSICAL_START
|
||||
hex "Physical address where the kernel is loaded" if PHYSICAL_START_BOOL
|
||||
default "0x02000000" if PPC_STD_MMU && CRASH_DUMP
|
||||
default "0x02000000" if PPC_STD_MMU && CRASH_DUMP && !RELOCATABLE
|
||||
default "0x00000000"
|
||||
|
||||
config PHYSICAL_ALIGN
|
||||
|
|
|
@ -0,0 +1,303 @@
|
|||
/*
|
||||
* MPC8308RDB Device Tree Source
|
||||
*
|
||||
* Copyright 2009 Freescale Semiconductor Inc.
|
||||
* Copyright 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
compatible = "fsl,mpc8308rdb";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
pci0 = &pci0;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8308@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>;
|
||||
i-cache-line-size = <32>;
|
||||
d-cache-size = <16384>;
|
||||
i-cache-size = <16384>;
|
||||
timebase-frequency = <0>; // from bootloader
|
||||
bus-frequency = <0>; // from bootloader
|
||||
clock-frequency = <0>; // from bootloader
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x08000000>; // 128MB at 0
|
||||
};
|
||||
|
||||
localbus@e0005000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
|
||||
reg = <0xe0005000 0x1000>;
|
||||
interrupts = <77 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
|
||||
// CS0 and CS1 are swapped when
|
||||
// booting from nand, but the
|
||||
// addresses are the same.
|
||||
ranges = <0x0 0x0 0xfe000000 0x00800000
|
||||
0x1 0x0 0xe0600000 0x00002000
|
||||
0x2 0x0 0xf0000000 0x00020000
|
||||
0x3 0x0 0xfa000000 0x00008000>;
|
||||
|
||||
flash@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x800000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
u-boot@0 {
|
||||
reg = <0x0 0x60000>;
|
||||
read-only;
|
||||
};
|
||||
env@60000 {
|
||||
reg = <0x60000 0x10000>;
|
||||
};
|
||||
env1@70000 {
|
||||
reg = <0x70000 0x10000>;
|
||||
};
|
||||
kernel@80000 {
|
||||
reg = <0x80000 0x200000>;
|
||||
};
|
||||
dtb@280000 {
|
||||
reg = <0x280000 0x10000>;
|
||||
};
|
||||
ramdisk@290000 {
|
||||
reg = <0x290000 0x570000>;
|
||||
};
|
||||
};
|
||||
|
||||
nand@1,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8315-fcm-nand",
|
||||
"fsl,elbc-fcm-nand";
|
||||
reg = <0x1 0x0 0x2000>;
|
||||
|
||||
jffs2@0 {
|
||||
reg = <0x0 0x2000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
immr@e0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,mpc8315-immr", "simple-bus";
|
||||
ranges = <0 0xe0000000 0x00100000>;
|
||||
reg = <0xe0000000 0x00000200>;
|
||||
bus-frequency = <0>;
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <14 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
dfsrr;
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1339";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
usb@23000 {
|
||||
compatible = "fsl-usb2-dr";
|
||||
reg = <0x23000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <38 0x8>;
|
||||
dr_mode = "peripheral";
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <32 0x8 33 0x8 34 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
tbi-handle = < &tbi0 >;
|
||||
phy-handle = < &phy2 >;
|
||||
fsl,magic-packet;
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x520 0x20>;
|
||||
phy2: ethernet-phy@2 {
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <17 0x8>;
|
||||
reg = <0x2>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x25000 0x1000>;
|
||||
ranges = <0x0 0x25000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <35 0x8 36 0x8 37 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
tbi-handle = < &tbi1 >;
|
||||
/* Vitesse 7385 isn't on the MDIO bus */
|
||||
fixed-link = <1 1 1000 0 0>;
|
||||
fsl,magic-packet;
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <133333333>;
|
||||
interrupts = <9 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <133333333>;
|
||||
interrupts = <10 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
};
|
||||
|
||||
gpio@c00 {
|
||||
#gpio-cells = <2>;
|
||||
device_type = "gpio";
|
||||
compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio";
|
||||
reg = <0xc00 0x18>;
|
||||
interrupts = <74 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
gpio-controller;
|
||||
};
|
||||
|
||||
/* IPIC
|
||||
* interrupts cell = <intr #, sense>
|
||||
* sense values match linux IORESOURCE_IRQ_* defines:
|
||||
* sense == 8: Level, low assertion
|
||||
* sense == 2: Edge, high-to-low change
|
||||
*/
|
||||
ipic: interrupt-controller@700 {
|
||||
compatible = "fsl,ipic";
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x700 0x100>;
|
||||
device_type = "ipic";
|
||||
};
|
||||
|
||||
ipic-msi@7c0 {
|
||||
compatible = "fsl,ipic-msi";
|
||||
reg = <0x7c0 0x40>;
|
||||
msi-available-ranges = <0x0 0x100>;
|
||||
interrupts = < 0x43 0x8
|
||||
0x4 0x8
|
||||
0x51 0x8
|
||||
0x52 0x8
|
||||
0x56 0x8
|
||||
0x57 0x8
|
||||
0x58 0x8
|
||||
0x59 0x8 >;
|
||||
interrupt-parent = < &ipic >;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
pci0: pcie@e0009000 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
device_type = "pci";
|
||||
compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie";
|
||||
reg = <0xe0009000 0x00001000
|
||||
0xb0000000 0x01000000>;
|
||||
ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
|
||||
0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
|
||||
bus-range = <0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &ipic 1 8
|
||||
0 0 0 2 &ipic 1 8
|
||||
0 0 0 3 &ipic 1 8
|
||||
0 0 0 4 &ipic 1 8>;
|
||||
interrupts = <0x1 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
clock-frequency = <0>;
|
||||
|
||||
pcie@0 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
reg = <0 0 0 0 0>;
|
||||
ranges = <0x02000000 0 0xa0000000
|
||||
0x02000000 0 0xa0000000
|
||||
0 0x10000000
|
||||
0x01000000 0 0x00000000
|
||||
0x01000000 0 0x00000000
|
||||
0 0x00800000>;
|
||||
};
|
||||
};
|
||||
};
|
|
@ -71,14 +71,14 @@
|
|||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,8540-memory-controller";
|
||||
compatible = "fsl,mpc8540-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,8540-l2-cache-controller";
|
||||
compatible = "fsl,mpc8540-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x40000>; // L2, 256K
|
||||
|
|
|
@ -71,14 +71,14 @@
|
|||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,8541-memory-controller";
|
||||
compatible = "fsl,mpc8541-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,8541-l2-cache-controller";
|
||||
compatible = "fsl,mpc8541-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x40000>; // L2, 256K
|
||||
|
|
|
@ -73,14 +73,14 @@
|
|||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,8544-memory-controller";
|
||||
compatible = "fsl,mpc8544-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,8544-l2-cache-controller";
|
||||
compatible = "fsl,mpc8544-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x40000>; // L2, 256K
|
||||
|
|
|
@ -74,14 +74,14 @@
|
|||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,8548-memory-controller";
|
||||
compatible = "fsl,mpc8548-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,8548-l2-cache-controller";
|
||||
compatible = "fsl,mpc8548-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x80000>; // L2, 512K
|
||||
|
|
|
@ -71,14 +71,14 @@
|
|||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,8555-memory-controller";
|
||||
compatible = "fsl,mpc8555-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,8555-l2-cache-controller";
|
||||
compatible = "fsl,mpc8555-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x40000>; // L2, 256K
|
||||
|
|
|
@ -71,14 +71,14 @@
|
|||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,8540-memory-controller";
|
||||
compatible = "fsl,mpc8540-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,8540-l2-cache-controller";
|
||||
compatible = "fsl,mpc8540-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x40000>; // L2, 256K
|
||||
|
|
|
@ -124,14 +124,14 @@
|
|||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,8568-memory-controller";
|
||||
compatible = "fsl,mpc8568-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,8568-l2-cache-controller";
|
||||
compatible = "fsl,mpc8568-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x80000>; // L2, 512K
|
||||
|
|
|
@ -617,6 +617,7 @@
|
|||
bus-frequency = <0>;
|
||||
fsl,qe-num-riscs = <1>;
|
||||
fsl,qe-num-snums = <28>;
|
||||
status = "disabled"; /* no firmware loaded */
|
||||
|
||||
qeic: interrupt-controller@80 {
|
||||
interrupt-controller;
|
||||
|
|
|
@ -0,0 +1,633 @@
|
|||
/*
|
||||
* P1022 DS 36Bit Physical Address Map Device Tree Source
|
||||
*
|
||||
* Copyright 2010 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
model = "fsl,P1022";
|
||||
compatible = "fsl,P1022DS";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
pci2 = &pci2;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,P1022@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
PowerPC,P1022@1 {
|
||||
device_type = "cpu";
|
||||
reg = <0x1>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
localbus@fffe05000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p1022-elbc", "fsl,elbc", "simple-bus";
|
||||
reg = <0 0xffe05000 0 0x1000>;
|
||||
interrupts = <19 2>;
|
||||
|
||||
ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
|
||||
0x1 0x0 0xf 0xe0000000 0x08000000
|
||||
0x2 0x0 0x0 0xffa00000 0x00040000
|
||||
0x3 0x0 0xf 0xffdf0000 0x00008000>;
|
||||
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x8000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x0 0x03000000>;
|
||||
label = "ramdisk-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@3000000 {
|
||||
reg = <0x03000000 0x00e00000>;
|
||||
label = "diagnostic-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@3e00000 {
|
||||
reg = <0x03e00000 0x00200000>;
|
||||
label = "dink-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@4000000 {
|
||||
reg = <0x04000000 0x00400000>;
|
||||
label = "kernel-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@4400000 {
|
||||
reg = <0x04400000 0x03b00000>;
|
||||
label = "jffs2-nor";
|
||||
};
|
||||
|
||||
partition@7f00000 {
|
||||
reg = <0x07f00000 0x00080000>;
|
||||
label = "dtb-nor";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@7f80000 {
|
||||
reg = <0x07f80000 0x00080000>;
|
||||
label = "u-boot-nor";
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
nand@2,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,elbc-fcm-nand";
|
||||
reg = <0x2 0x0 0x40000>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x0 0x02000000>;
|
||||
label = "u-boot-nand";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@2000000 {
|
||||
reg = <0x02000000 0x10000000>;
|
||||
label = "jffs2-nand";
|
||||
};
|
||||
|
||||
partition@12000000 {
|
||||
reg = <0x12000000 0x10000000>;
|
||||
label = "ramdisk-nand";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@22000000 {
|
||||
reg = <0x22000000 0x04000000>;
|
||||
label = "kernel-nand";
|
||||
};
|
||||
|
||||
partition@26000000 {
|
||||
reg = <0x26000000 0x01000000>;
|
||||
label = "dtb-nand";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@27000000 {
|
||||
reg = <0x27000000 0x19000000>;
|
||||
label = "reserved-nand";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
soc@fffe00000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "fsl,p1022-immr", "simple-bus";
|
||||
ranges = <0x0 0xf 0xffe00000 0x100000>;
|
||||
bus-frequency = <0>; // Filled out by uboot.
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <12>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,p1022-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <16 2>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,p1022-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupts = <16 2>;
|
||||
};
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <43 2>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <43 2>;
|
||||
dfsrr;
|
||||
|
||||
wm8776:codec@1a {
|
||||
compatible = "wlf,wm8776";
|
||||
reg = <0x1a>;
|
||||
/* MCLK source is a stand-alone oscillator */
|
||||
clock-frequency = <12288000>;
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <42 2>;
|
||||
};
|
||||
|
||||
spi@7000 {
|
||||
cell-index = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,espi";
|
||||
reg = <0x7000 0x1000>;
|
||||
interrupts = <59 0x2>;
|
||||
espi,num-ss-bits = <4>;
|
||||
mode = "cpu";
|
||||
|
||||
fsl_m25p80@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,espi-flash";
|
||||
reg = <0>;
|
||||
linux,modalias = "fsl_m25p80";
|
||||
spi-max-frequency = <40000000>; /* input clock */
|
||||
partition@0 {
|
||||
label = "u-boot-spi";
|
||||
reg = <0x00000000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@100000 {
|
||||
label = "kernel-spi";
|
||||
reg = <0x00100000 0x00500000>;
|
||||
read-only;
|
||||
};
|
||||
partition@600000 {
|
||||
label = "dtb-spi";
|
||||
reg = <0x00600000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@700000 {
|
||||
label = "file system-spi";
|
||||
reg = <0x00700000 0x00900000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ssi@15000 {
|
||||
compatible = "fsl,mpc8610-ssi";
|
||||
cell-index = <0>;
|
||||
reg = <0x15000 0x100>;
|
||||
interrupts = <75 2>;
|
||||
fsl,mode = "i2s-slave";
|
||||
codec-handle = <&wm8776>;
|
||||
fsl,playback-dma = <&dma00>;
|
||||
fsl,capture-dma = <&dma01>;
|
||||
fsl,fifo-depth = <16>;
|
||||
};
|
||||
|
||||
dma@c300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,eloplus-dma";
|
||||
reg = <0xc300 0x4>;
|
||||
ranges = <0x0 0xc100 0x200>;
|
||||
cell-index = <1>;
|
||||
dma00: dma-channel@0 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupts = <76 2>;
|
||||
};
|
||||
dma01: dma-channel@80 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupts = <77 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupts = <78 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupts = <79 2>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio: gpio-controller@f000 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "fsl,mpc8572-gpio";
|
||||
reg = <0xf000 0x100>;
|
||||
interrupts = <47 0x2>;
|
||||
gpio-controller;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,p1022-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x40000>; // L2, 256K
|
||||
interrupts = <16 2>;
|
||||
};
|
||||
|
||||
dma@21300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,eloplus-dma";
|
||||
reg = <0x21300 0x4>;
|
||||
ranges = <0x0 0x21100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupts = <20 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupts = <21 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupts = <22 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupts = <23 2>;
|
||||
};
|
||||
};
|
||||
|
||||
usb@22000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl-usb2-dr";
|
||||
reg = <0x22000 0x1000>;
|
||||
interrupts = <28 0x2>;
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
mdio@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,etsec2-mdio";
|
||||
reg = <0x24000 0x1000 0xb0030 0x4>;
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
interrupts = <3 1>;
|
||||
reg = <0x1>;
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupts = <9 1>;
|
||||
reg = <0x2>;
|
||||
};
|
||||
};
|
||||
|
||||
mdio@25000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,etsec2-mdio";
|
||||
reg = <0x25000 0x1000 0xb1030 0x4>;
|
||||
};
|
||||
|
||||
enet0: ethernet@B0000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "fsl,etsec2";
|
||||
fsl,num_rx_queues = <0x8>;
|
||||
fsl,num_tx_queues = <0x8>;
|
||||
fsl,magic-packet;
|
||||
fsl,wake-on-filer;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
fixed-link = <1 1 1000 0 0>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
queue-group@0{
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xB0000 0x1000>;
|
||||
interrupts = <29 2 30 2 34 2>;
|
||||
};
|
||||
queue-group@1{
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xB4000 0x1000>;
|
||||
interrupts = <17 2 18 2 24 2>;
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@B1000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "fsl,etsec2";
|
||||
fsl,num_rx_queues = <0x8>;
|
||||
fsl,num_tx_queues = <0x8>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
fixed-link = <1 1 1000 0 0>;
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
queue-group@0{
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xB1000 0x1000>;
|
||||
interrupts = <35 2 36 2 40 2>;
|
||||
};
|
||||
queue-group@1{
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xB5000 0x1000>;
|
||||
interrupts = <51 2 52 2 67 2>;
|
||||
};
|
||||
};
|
||||
|
||||
sdhci@2e000 {
|
||||
compatible = "fsl,p1022-esdhc", "fsl,esdhc";
|
||||
reg = <0x2e000 0x1000>;
|
||||
interrupts = <72 0x2>;
|
||||
fsl,sdhci-auto-cmd12;
|
||||
/* Filled in by U-Boot */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0",
|
||||
"fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
|
||||
"fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2 58 2>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0x97c>;
|
||||
fsl,descriptor-types-mask = <0x3a30abf>;
|
||||
};
|
||||
|
||||
sata@18000 {
|
||||
compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
|
||||
reg = <0x18000 0x1000>;
|
||||
cell-index = <1>;
|
||||
interrupts = <74 0x2>;
|
||||
};
|
||||
|
||||
sata@19000 {
|
||||
compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
|
||||
reg = <0x19000 0x1000>;
|
||||
cell-index = <2>;
|
||||
interrupts = <41 0x2>;
|
||||
};
|
||||
|
||||
power@e0070{
|
||||
compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc";
|
||||
reg = <0xe0070 0x20>;
|
||||
};
|
||||
|
||||
display@10000 {
|
||||
compatible = "fsl,diu", "fsl,p1022-diu";
|
||||
reg = <0x10000 1000>;
|
||||
interrupts = <64 2>;
|
||||
};
|
||||
|
||||
timer@41100 {
|
||||
compatible = "fsl,mpic-global-timer";
|
||||
reg = <0x41100 0x204>;
|
||||
interrupts = <0xf7 0x2>;
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
};
|
||||
|
||||
msi@41600 {
|
||||
compatible = "fsl,p1022-msi", "fsl,mpic-msi";
|
||||
reg = <0x41600 0x80>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe0 0
|
||||
0xe1 0
|
||||
0xe2 0
|
||||
0xe3 0
|
||||
0xe4 0
|
||||
0xe5 0
|
||||
0xe6 0
|
||||
0xe7 0>;
|
||||
};
|
||||
|
||||
global-utilities@e0000 { //global utilities block
|
||||
compatible = "fsl,p1022-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pcie@fffe09000 {
|
||||
compatible = "fsl,p1022-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xf 0xffe09000 0 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0xc 0x20000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 4 1
|
||||
0000 0 0 2 &mpic 5 1
|
||||
0000 0 0 3 &mpic 6 1
|
||||
0000 0 0 4 &mpic 7 1
|
||||
>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@fffe0a000 {
|
||||
compatible = "fsl,p1022-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xf 0xffe0a000 0 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0xc0000000 0xc 0x40000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x10000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 0 1
|
||||
0000 0 0 2 &mpic 1 1
|
||||
0000 0 0 3 &mpic 2 1
|
||||
0000 0 0 4 &mpic 3 1
|
||||
>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
pci2: pcie@fffe0b000 {
|
||||
compatible = "fsl,p1022-pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xf 0xffe0b000 0 0x1000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupts = <16 2>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 8 1
|
||||
0000 0 0 2 &mpic 9 1
|
||||
0000 0 0 3 &mpic 10 1
|
||||
0000 0 0 4 &mpic 11 1
|
||||
>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x2000000 0x0 0xe0000000
|
||||
0x2000000 0x0 0xe0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
};
|
|
@ -0,0 +1,380 @@
|
|||
/*
|
||||
* MPC8555-based STx GP3 Device Tree Source
|
||||
*
|
||||
* Copyright 2006, 2008 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Copyright 2010 Silicon Turnkey Express LLC.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
model = "stx,gp3";
|
||||
compatible = "stx,gp3-8560", "stx,gp3";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
pci0 = &pci0;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8555@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x8000>; // L1, 32K
|
||||
i-cache-size = <0x8000>; // L1, 32K
|
||||
timebase-frequency = <0>; // 33 MHz, from uboot
|
||||
bus-frequency = <0>; // 166 MHz
|
||||
clock-frequency = <0>; // 825 MHz, from uboot
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x10000000>;
|
||||
};
|
||||
|
||||
soc8555@e0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0xe0000000 0x100000>;
|
||||
bus-frequency = <0>;
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <8>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8555-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8555-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <18 2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8555-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <32>; // 32 bytes
|
||||
cache-size = <0x40000>; // L2, 256K
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <16 2>;
|
||||
};
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <43 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
dma@21300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma";
|
||||
reg = <0x21300 0x4>;
|
||||
ranges = <0x0 0x21100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8555-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <20 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8555-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <21 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8555-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <22 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8555-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <23 2>;
|
||||
};
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "TSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <29 2 30 2 34 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy0>;
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
phy0: ethernet-phy@2 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <5 1>;
|
||||
reg = <0x2>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy1: ethernet-phy@4 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <5 1>;
|
||||
reg = <0x4>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <1>;
|
||||
device_type = "network";
|
||||
model = "TSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x25000 0x1000>;
|
||||
ranges = <0x0 0x25000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <35 2 36 2 40 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-handle = <&phy1>;
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4500 0x100>; // reg base, size
|
||||
clock-frequency = <0>; // should we fill in in uboot?
|
||||
interrupts = <42 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x4600 0x100>; // reg base, size
|
||||
clock-frequency = <0>; // should we fill in in uboot?
|
||||
interrupts = <42 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0x7e>;
|
||||
fsl,descriptor-types-mask = <0x01010ebf>;
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
};
|
||||
|
||||
cpm@919c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8555-cpm", "fsl,cpm2";
|
||||
reg = <0x919c0 0x30>;
|
||||
ranges;
|
||||
|
||||
muram@80000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x80000 0x10000>;
|
||||
|
||||
data@0 {
|
||||
compatible = "fsl,cpm-muram-data";
|
||||
reg = <0x0 0x2000 0x9000 0x1000>;
|
||||
};
|
||||
};
|
||||
|
||||
brg@919f0 {
|
||||
compatible = "fsl,mpc8555-brg",
|
||||
"fsl,cpm2-brg",
|
||||
"fsl,cpm-brg";
|
||||
reg = <0x919f0 0x10 0x915f0 0x10>;
|
||||
};
|
||||
|
||||
cpmpic: pic@90c00 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <46 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
reg = <0x90c00 0x80>;
|
||||
compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pci@e0008000 {
|
||||
interrupt-map-mask = <0x1f800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x10 */
|
||||
0x8000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0x8000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0x8000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0x8000 0x0 0x0 0x4 &mpic 0x3 0x1
|
||||
|
||||
/* IDSEL 0x11 */
|
||||
0x8800 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0x8800 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0x8800 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0x8800 0x0 0x0 0x4 &mpic 0x3 0x1
|
||||
|
||||
/* IDSEL 0x12 (Slot 1) */
|
||||
0x9000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0x9000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0x9000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0x9000 0x0 0x0 0x4 &mpic 0x3 0x1
|
||||
|
||||
/* IDSEL 0x13 (Slot 2) */
|
||||
0x9800 0x0 0x0 0x1 &mpic 0x1 0x1
|
||||
0x9800 0x0 0x0 0x2 &mpic 0x2 0x1
|
||||
0x9800 0x0 0x0 0x3 &mpic 0x3 0x1
|
||||
0x9800 0x0 0x0 0x4 &mpic 0x0 0x1
|
||||
|
||||
/* IDSEL 0x14 (Slot 3) */
|
||||
0xa000 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0xa000 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0xa000 0x0 0x0 0x3 &mpic 0x0 0x1
|
||||
0xa000 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x15 (Slot 4) */
|
||||
0xa800 0x0 0x0 0x1 &mpic 0x3 0x1
|
||||
0xa800 0x0 0x0 0x2 &mpic 0x0 0x1
|
||||
0xa800 0x0 0x0 0x3 &mpic 0x1 0x1
|
||||
0xa800 0x0 0x0 0x4 &mpic 0x2 0x1
|
||||
|
||||
/* Bus 1 (Tundra Bridge) */
|
||||
/* IDSEL 0x12 (ISA bridge) */
|
||||
0x19000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0x19000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0x19000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 2>;
|
||||
bus-range = <0 0>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>;
|
||||
clock-frequency = <66666666>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xe0008000 0x1000>;
|
||||
compatible = "fsl,mpc8540-pci";
|
||||
device_type = "pci";
|
||||
|
||||
i8259@19000 {
|
||||
interrupt-controller;
|
||||
device_type = "interrupt-controller";
|
||||
reg = <0x19000 0x0 0x0 0x0 0x1>;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "chrp,iic";
|
||||
interrupts = <1>;
|
||||
interrupt-parent = <&pci0>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pci@e0009000 {
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x15 */
|
||||
0xa800 0x0 0x0 0x1 &mpic 0xb 0x1
|
||||
0xa800 0x0 0x0 0x2 &mpic 0xb 0x1
|
||||
0xa800 0x0 0x0 0x3 &mpic 0xb 0x1
|
||||
0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <25 2>;
|
||||
bus-range = <0 0>;
|
||||
ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x0 0xe3000000 0x0 0x100000>;
|
||||
clock-frequency = <66666666>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xe0009000 0x1000>;
|
||||
compatible = "fsl,mpc8540-pci";
|
||||
device_type = "pci";
|
||||
};
|
||||
};
|
|
@ -289,7 +289,14 @@
|
|||
interrupt-map = <
|
||||
/* IDSEL 28 */
|
||||
0xe000 0 0 1 &mpic 2 1
|
||||
0xe000 0 0 2 &mpic 3 1>;
|
||||
0xe000 0 0 2 &mpic 3 1
|
||||
0xe000 0 0 3 &mpic 6 1
|
||||
0xe000 0 0 4 &mpic 5 1
|
||||
|
||||
/* IDSEL 11 */
|
||||
0x5800 0 0 1 &mpic 6 1
|
||||
0x5800 0 0 2 &mpic 5 1
|
||||
>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 2>;
|
||||
|
|
|
@ -311,7 +311,14 @@
|
|||
interrupt-map = <
|
||||
/* IDSEL 28 */
|
||||
0xe000 0 0 1 &mpic 2 1
|
||||
0xe000 0 0 2 &mpic 3 1>;
|
||||
0xe000 0 0 2 &mpic 3 1
|
||||
0xe000 0 0 3 &mpic 6 1
|
||||
0xe000 0 0 4 &mpic 5 1
|
||||
|
||||
/* IDSEL 11 */
|
||||
0x5800 0 0 1 &mpic 6 1
|
||||
0x5800 0 0 2 &mpic 5 1
|
||||
>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 2>;
|
||||
|
|
|
@ -442,7 +442,14 @@
|
|||
interrupt-map = <
|
||||
/* IDSEL 28 */
|
||||
0xe000 0 0 1 &mpic 2 1
|
||||
0xe000 0 0 2 &mpic 3 1>;
|
||||
0xe000 0 0 2 &mpic 3 1
|
||||
0xe000 0 0 3 &mpic 6 1
|
||||
0xe000 0 0 4 &mpic 5 1
|
||||
|
||||
/* IDSEL 11 */
|
||||
0x5800 0 0 1 &mpic 6 1
|
||||
0x5800 0 0 2 &mpic 5 1
|
||||
>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 2>;
|
||||
|
|
|
@ -442,7 +442,14 @@
|
|||
interrupt-map = <
|
||||
/* IDSEL 28 */
|
||||
0xe000 0 0 1 &mpic 2 1
|
||||
0xe000 0 0 2 &mpic 3 1>;
|
||||
0xe000 0 0 2 &mpic 3 1
|
||||
0xe000 0 0 3 &mpic 6 1
|
||||
0xe000 0 0 4 &mpic 5 1
|
||||
|
||||
/* IDSEL 11 */
|
||||
0x5800 0 0 1 &mpic 6 1
|
||||
0x5800 0 0 2 &mpic 5 1
|
||||
>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 2>;
|
||||
|
|
|
@ -311,7 +311,14 @@
|
|||
interrupt-map = <
|
||||
/* IDSEL 28 */
|
||||
0xe000 0 0 1 &mpic 2 1
|
||||
0xe000 0 0 2 &mpic 3 1>;
|
||||
0xe000 0 0 2 &mpic 3 1
|
||||
0xe000 0 0 3 &mpic 6 1
|
||||
0xe000 0 0 4 &mpic 5 1
|
||||
|
||||
/* IDSEL 11 */
|
||||
0x5800 0 0 1 &mpic 6 1
|
||||
0x5800 0 0 2 &mpic 5 1
|
||||
>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 2>;
|
||||
|
|
|
@ -382,7 +382,14 @@
|
|||
interrupt-map = <
|
||||
/* IDSEL 28 */
|
||||
0xe000 0 0 1 &mpic 2 1
|
||||
0xe000 0 0 2 &mpic 3 1>;
|
||||
0xe000 0 0 2 &mpic 3 1
|
||||
0xe000 0 0 3 &mpic 6 1
|
||||
0xe000 0 0 4 &mpic 5 1
|
||||
|
||||
/* IDSEL 11 */
|
||||
0x5800 0 0 1 &mpic 6 1
|
||||
0x5800 0 0 2 &mpic 5 1
|
||||
>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <24 2>;
|
||||
|
|
|
@ -0,0 +1,172 @@
|
|||
/*
|
||||
* TQM8XX Device Tree Source
|
||||
*
|
||||
* Heiko Schocher <hs@denx.de>
|
||||
* 2010 DENX Software Engineering GmbH
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
model = "TQM8xx";
|
||||
compatible = "tqc,tqm8xx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = ð0;
|
||||
ethernet1 = ð1;
|
||||
mdio1 = &phy1;
|
||||
serial0 = &smc1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,860@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <16>; // 16 bytes
|
||||
i-cache-line-size = <16>; // 16 bytes
|
||||
d-cache-size = <0x1000>; // L1, 4K
|
||||
i-cache-size = <0x1000>; // L1, 4K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <15 2>; // decrementer interrupt
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x2000000>;
|
||||
};
|
||||
|
||||
localbus@fff00100 {
|
||||
compatible = "fsl,mpc860-localbus", "fsl,pq1-localbus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xfff00100 0x40>;
|
||||
|
||||
ranges = <
|
||||
0x0 0x0 0x40000000 0x800000
|
||||
>;
|
||||
|
||||
flash@0,0 {
|
||||
compatible = "cfi-flash";
|
||||
reg = <0 0 0x800000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
bank-width = <4>;
|
||||
device-width = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
soc@fff00000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
ranges = <0x0 0xfff00000 0x00004000>;
|
||||
|
||||
phy1: mdio@e00 {
|
||||
compatible = "fsl,mpc866-fec-mdio", "fsl,pq1-fec-mdio";
|
||||
reg = <0xe00 0x188>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
PHY: ethernet-phy@f {
|
||||
reg = <0xf>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
};
|
||||
|
||||
eth1: ethernet@e00 {
|
||||
device_type = "network";
|
||||
compatible = "fsl,mpc866-fec-enet",
|
||||
"fsl,pq1-fec-enet";
|
||||
reg = <0xe00 0x188>;
|
||||
interrupts = <3 1>;
|
||||
interrupt-parent = <&PIC>;
|
||||
phy-handle = <&PHY>;
|
||||
linux,network-index = <1>;
|
||||
};
|
||||
|
||||
PIC: pic@0 {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x0 0x24>;
|
||||
compatible = "fsl,mpc860-pic", "fsl,pq1-pic";
|
||||
};
|
||||
|
||||
cpm@9c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc860-cpm", "fsl,cpm1";
|
||||
ranges;
|
||||
reg = <0x9c0 0x40>;
|
||||
brg-frequency = <0>;
|
||||
interrupts = <0 2>; // cpm error interrupt
|
||||
interrupt-parent = <&CPM_PIC>;
|
||||
|
||||
muram@2000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x2000 0x2000>;
|
||||
|
||||
data@0 {
|
||||
compatible = "fsl,cpm-muram-data";
|
||||
reg = <0x0 0x2000>;
|
||||
};
|
||||
};
|
||||
|
||||
brg@9f0 {
|
||||
compatible = "fsl,mpc860-brg",
|
||||
"fsl,cpm1-brg",
|
||||
"fsl,cpm-brg";
|
||||
reg = <0x9f0 0x10>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
CPM_PIC: pic@930 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupts = <5 2 0 2>;
|
||||
interrupt-parent = <&PIC>;
|
||||
reg = <0x930 0x20>;
|
||||
compatible = "fsl,mpc860-cpm-pic",
|
||||
"fsl,cpm1-pic";
|
||||
};
|
||||
|
||||
|
||||
smc1: serial@a80 {
|
||||
device_type = "serial";
|
||||
compatible = "fsl,mpc860-smc-uart",
|
||||
"fsl,cpm1-smc-uart";
|
||||
reg = <0xa80 0x10 0x3e80 0x40>;
|
||||
interrupts = <4>;
|
||||
interrupt-parent = <&CPM_PIC>;
|
||||
fsl,cpm-brg = <1>;
|
||||
fsl,cpm-command = <0x90>;
|
||||
};
|
||||
|
||||
eth0: ethernet@a00 {
|
||||
device_type = "network";
|
||||
compatible = "fsl,mpc860-scc-enet",
|
||||
"fsl,cpm1-scc-enet";
|
||||
reg = <0xa00 0x18 0x3c00 0x100>;
|
||||
interrupts = <30>;
|
||||
interrupt-parent = <&CPM_PIC>;
|
||||
fsl,cpm-command = <0000>;
|
||||
linux,network-index = <0>;
|
||||
fixed-link = <0 0 10 0 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
|
@ -19,7 +19,8 @@ CONFIG_E500=y
|
|||
CONFIG_FSL_EMB_PERFMON=y
|
||||
CONFIG_BOOKE=y
|
||||
CONFIG_FSL_BOOKE=y
|
||||
# CONFIG_PHYS_64BIT is not set
|
||||
CONFIG_PTE_64BIT=y
|
||||
CONFIG_PHYS_64BIT=y
|
||||
CONFIG_SPE=y
|
||||
CONFIG_PPC_MMU_NOHASH=y
|
||||
CONFIG_PPC_MMU_NOHASH_32=y
|
||||
|
@ -28,7 +29,7 @@ CONFIG_PPC_BOOK3E_MMU=y
|
|||
# CONFIG_SMP is not set
|
||||
CONFIG_PPC32=y
|
||||
CONFIG_WORD_SIZE=32
|
||||
# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
|
||||
CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
|
||||
CONFIG_MMU=y
|
||||
CONFIG_GENERIC_CMOS_UPDATE=y
|
||||
CONFIG_GENERIC_TIME=y
|
||||
|
@ -239,6 +240,7 @@ CONFIG_MPC85xx_MDS=y
|
|||
CONFIG_MPC8536_DS=y
|
||||
CONFIG_MPC85xx_DS=y
|
||||
CONFIG_MPC85xx_RDB=y
|
||||
CONFIG_P1022_DS=y
|
||||
CONFIG_SOCRATES=y
|
||||
CONFIG_KSI8560=y
|
||||
CONFIG_XES_MPC85xx=y
|
||||
|
@ -311,7 +313,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y
|
|||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4
|
||||
CONFIG_MIGRATION=y
|
||||
# CONFIG_PHYS_ADDR_T_64BIT is not set
|
||||
CONFIG_PHYS_ADDR_T_64BIT=y
|
||||
CONFIG_ZONE_DMA_FLAG=1
|
||||
CONFIG_BOUNCE=y
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
|
@ -321,7 +323,7 @@ CONFIG_PPC_4K_PAGES=y
|
|||
# CONFIG_PPC_16K_PAGES is not set
|
||||
# CONFIG_PPC_64K_PAGES is not set
|
||||
# CONFIG_PPC_256K_PAGES is not set
|
||||
CONFIG_FORCE_MAX_ZONEORDER=11
|
||||
CONFIG_FORCE_MAX_ZONEORDER=12
|
||||
CONFIG_PROC_DEVICETREE=y
|
||||
# CONFIG_CMDLINE_BOOL is not set
|
||||
CONFIG_EXTRA_TARGETS=""
|
||||
|
@ -1122,16 +1124,13 @@ CONFIG_VGA_CONSOLE=y
|
|||
# CONFIG_VGACON_SOFT_SCROLLBACK is not set
|
||||
CONFIG_DUMMY_CONSOLE=y
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SOUND_OSS_CORE=y
|
||||
CONFIG_SOUND_OSS_CORE_PRECLAIM=y
|
||||
# CONFIG_SOUND_OSS_CORE is not set
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_TIMER=y
|
||||
CONFIG_SND_PCM=y
|
||||
# CONFIG_SND_SEQUENCER is not set
|
||||
CONFIG_SND_OSSEMUL=y
|
||||
CONFIG_SND_MIXER_OSS=y
|
||||
CONFIG_SND_PCM_OSS=y
|
||||
CONFIG_SND_PCM_OSS_PLUGINS=y
|
||||
# CONFIG_SND_MIXER_OSS is not set
|
||||
# CONFIG_SND_PCM_OSS is not set
|
||||
# CONFIG_SND_HRTIMER is not set
|
||||
# CONFIG_SND_DYNAMIC_MINORS is not set
|
||||
# CONFIG_SND_SUPPORT_OLD_API is not set
|
||||
|
@ -1145,12 +1144,7 @@ CONFIG_SND_VMASTER=y
|
|||
# CONFIG_SND_SBAWE_SEQ is not set
|
||||
# CONFIG_SND_EMU10K1_SEQ is not set
|
||||
CONFIG_SND_AC97_CODEC=y
|
||||
CONFIG_SND_DRIVERS=y
|
||||
# CONFIG_SND_DUMMY is not set
|
||||
# CONFIG_SND_MTPAV is not set
|
||||
# CONFIG_SND_SERIAL_U16550 is not set
|
||||
# CONFIG_SND_MPU401 is not set
|
||||
# CONFIG_SND_AC97_POWER_SAVE is not set
|
||||
# CONFIG_SND_DRIVERS is not set
|
||||
CONFIG_SND_PCI=y
|
||||
# CONFIG_SND_AD1889 is not set
|
||||
# CONFIG_SND_ALS300 is not set
|
||||
|
@ -1218,12 +1212,8 @@ CONFIG_SND_INTEL8X0=y
|
|||
# CONFIG_SND_VIRTUOSO is not set
|
||||
# CONFIG_SND_VX222 is not set
|
||||
# CONFIG_SND_YMFPCI is not set
|
||||
CONFIG_SND_PPC=y
|
||||
CONFIG_SND_USB=y
|
||||
# CONFIG_SND_USB_AUDIO is not set
|
||||
# CONFIG_SND_USB_UA101 is not set
|
||||
# CONFIG_SND_USB_USX2Y is not set
|
||||
# CONFIG_SND_USB_CAIAQ is not set
|
||||
# CONFIG_SND_PPC is not set
|
||||
# CONFIG_SND_USB is not set
|
||||
# CONFIG_SND_SOC is not set
|
||||
# CONFIG_SOUND_PRIME is not set
|
||||
CONFIG_AC97_BUS=y
|
||||
|
|
|
@ -19,7 +19,8 @@ CONFIG_E500=y
|
|||
CONFIG_FSL_EMB_PERFMON=y
|
||||
CONFIG_BOOKE=y
|
||||
CONFIG_FSL_BOOKE=y
|
||||
# CONFIG_PHYS_64BIT is not set
|
||||
CONFIG_PTE_64BIT=y
|
||||
CONFIG_PHYS_64BIT=y
|
||||
CONFIG_SPE=y
|
||||
CONFIG_PPC_MMU_NOHASH=y
|
||||
CONFIG_PPC_MMU_NOHASH_32=y
|
||||
|
@ -29,7 +30,7 @@ CONFIG_SMP=y
|
|||
CONFIG_NR_CPUS=8
|
||||
CONFIG_PPC32=y
|
||||
CONFIG_WORD_SIZE=32
|
||||
# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
|
||||
CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
|
||||
CONFIG_MMU=y
|
||||
CONFIG_GENERIC_CMOS_UPDATE=y
|
||||
CONFIG_GENERIC_TIME=y
|
||||
|
@ -243,6 +244,7 @@ CONFIG_MPC85xx_MDS=y
|
|||
CONFIG_MPC8536_DS=y
|
||||
CONFIG_MPC85xx_DS=y
|
||||
CONFIG_MPC85xx_RDB=y
|
||||
CONFIG_P1022_DS=y
|
||||
CONFIG_SOCRATES=y
|
||||
CONFIG_KSI8560=y
|
||||
CONFIG_XES_MPC85xx=y
|
||||
|
@ -316,7 +318,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y
|
|||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4
|
||||
CONFIG_MIGRATION=y
|
||||
# CONFIG_PHYS_ADDR_T_64BIT is not set
|
||||
CONFIG_PHYS_ADDR_T_64BIT=y
|
||||
CONFIG_ZONE_DMA_FLAG=1
|
||||
CONFIG_BOUNCE=y
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
|
@ -326,7 +328,7 @@ CONFIG_PPC_4K_PAGES=y
|
|||
# CONFIG_PPC_16K_PAGES is not set
|
||||
# CONFIG_PPC_64K_PAGES is not set
|
||||
# CONFIG_PPC_256K_PAGES is not set
|
||||
CONFIG_FORCE_MAX_ZONEORDER=11
|
||||
CONFIG_FORCE_MAX_ZONEORDER=12
|
||||
CONFIG_PROC_DEVICETREE=y
|
||||
# CONFIG_CMDLINE_BOOL is not set
|
||||
CONFIG_EXTRA_TARGETS=""
|
||||
|
@ -1127,16 +1129,13 @@ CONFIG_VGA_CONSOLE=y
|
|||
# CONFIG_VGACON_SOFT_SCROLLBACK is not set
|
||||
CONFIG_DUMMY_CONSOLE=y
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SOUND_OSS_CORE=y
|
||||
CONFIG_SOUND_OSS_CORE_PRECLAIM=y
|
||||
# CONFIG_SOUND_OSS_CORE is not set
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_TIMER=y
|
||||
CONFIG_SND_PCM=y
|
||||
# CONFIG_SND_SEQUENCER is not set
|
||||
CONFIG_SND_OSSEMUL=y
|
||||
CONFIG_SND_MIXER_OSS=y
|
||||
CONFIG_SND_PCM_OSS=y
|
||||
CONFIG_SND_PCM_OSS_PLUGINS=y
|
||||
# CONFIG_SND_MIXER_OSS is not set
|
||||
# CONFIG_SND_PCM_OSS is not set
|
||||
# CONFIG_SND_HRTIMER is not set
|
||||
# CONFIG_SND_DYNAMIC_MINORS is not set
|
||||
# CONFIG_SND_SUPPORT_OLD_API is not set
|
||||
|
@ -1150,12 +1149,7 @@ CONFIG_SND_VMASTER=y
|
|||
# CONFIG_SND_SBAWE_SEQ is not set
|
||||
# CONFIG_SND_EMU10K1_SEQ is not set
|
||||
CONFIG_SND_AC97_CODEC=y
|
||||
CONFIG_SND_DRIVERS=y
|
||||
# CONFIG_SND_DUMMY is not set
|
||||
# CONFIG_SND_MTPAV is not set
|
||||
# CONFIG_SND_SERIAL_U16550 is not set
|
||||
# CONFIG_SND_MPU401 is not set
|
||||
# CONFIG_SND_AC97_POWER_SAVE is not set
|
||||
# CONFIG_SND_DRIVERS is not set
|
||||
CONFIG_SND_PCI=y
|
||||
# CONFIG_SND_AD1889 is not set
|
||||
# CONFIG_SND_ALS300 is not set
|
||||
|
@ -1223,12 +1217,8 @@ CONFIG_SND_INTEL8X0=y
|
|||
# CONFIG_SND_VIRTUOSO is not set
|
||||
# CONFIG_SND_VX222 is not set
|
||||
# CONFIG_SND_YMFPCI is not set
|
||||
CONFIG_SND_PPC=y
|
||||
CONFIG_SND_USB=y
|
||||
# CONFIG_SND_USB_AUDIO is not set
|
||||
# CONFIG_SND_USB_UA101 is not set
|
||||
# CONFIG_SND_USB_USX2Y is not set
|
||||
# CONFIG_SND_USB_CAIAQ is not set
|
||||
# CONFIG_SND_PPC is not set
|
||||
# CONFIG_SND_USB is not set
|
||||
# CONFIG_SND_SOC is not set
|
||||
# CONFIG_SOUND_PRIME is not set
|
||||
CONFIG_AC97_BUS=y
|
||||
|
|
|
@ -0,0 +1,934 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.34-rc1
|
||||
# Tue Mar 23 08:22:15 2010
|
||||
#
|
||||
# CONFIG_PPC64 is not set
|
||||
|
||||
#
|
||||
# Processor support
|
||||
#
|
||||
# CONFIG_PPC_BOOK3S_32 is not set
|
||||
# CONFIG_PPC_85xx is not set
|
||||
CONFIG_PPC_8xx=y
|
||||
# CONFIG_40x is not set
|
||||
# CONFIG_44x is not set
|
||||
# CONFIG_E200 is not set
|
||||
CONFIG_8xx=y
|
||||
CONFIG_PPC_MMU_NOHASH=y
|
||||
CONFIG_PPC_MMU_NOHASH_32=y
|
||||
# CONFIG_PPC_MM_SLICES is not set
|
||||
CONFIG_NOT_COHERENT_CACHE=y
|
||||
CONFIG_PPC32=y
|
||||
CONFIG_WORD_SIZE=32
|
||||
# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
|
||||
CONFIG_MMU=y
|
||||
CONFIG_GENERIC_CMOS_UPDATE=y
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
||||
# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
|
||||
# CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK is not set
|
||||
CONFIG_IRQ_PER_CPU=y
|
||||
CONFIG_NR_IRQS=512
|
||||
CONFIG_STACKTRACE_SUPPORT=y
|
||||
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
|
||||
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
|
||||
CONFIG_LOCKDEP_SUPPORT=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
CONFIG_ARCH_HAS_ILOG2_U32=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
|
||||
CONFIG_PPC=y
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
CONFIG_GENERIC_NVRAM=y
|
||||
CONFIG_SCHED_OMIT_FRAME_POINTER=y
|
||||
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
|
||||
CONFIG_PPC_OF=y
|
||||
CONFIG_OF=y
|
||||
# CONFIG_PPC_UDBG_16550 is not set
|
||||
# CONFIG_GENERIC_TBSYNC is not set
|
||||
CONFIG_AUDIT_ARCH=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_DTC=y
|
||||
# CONFIG_DEFAULT_UIMAGE is not set
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
# CONFIG_PPC_DCR_NATIVE is not set
|
||||
# CONFIG_PPC_DCR_MMIO is not set
|
||||
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
CONFIG_CONSTRUCTORS=y
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_BROKEN_ON_SMP=y
|
||||
CONFIG_INIT_ENV_ARG_LIMIT=32
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_LOCALVERSION_AUTO=y
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_SYSVIPC_SYSCTL=y
|
||||
# CONFIG_POSIX_MQUEUE is not set
|
||||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
# CONFIG_TASKSTATS is not set
|
||||
# CONFIG_AUDIT is not set
|
||||
|
||||
#
|
||||
# RCU Subsystem
|
||||
#
|
||||
CONFIG_TREE_RCU=y
|
||||
# CONFIG_TREE_PREEMPT_RCU is not set
|
||||
# CONFIG_TINY_RCU is not set
|
||||
# CONFIG_RCU_TRACE is not set
|
||||
CONFIG_RCU_FANOUT=32
|
||||
# CONFIG_RCU_FANOUT_EXACT is not set
|
||||
# CONFIG_TREE_RCU_TRACE is not set
|
||||
# CONFIG_IKCONFIG is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
# CONFIG_CGROUPS is not set
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
CONFIG_SYSFS_DEPRECATED_V2=y
|
||||
# CONFIG_RELAY is not set
|
||||
# CONFIG_NAMESPACES is not set
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_ANON_INODES=y
|
||||
CONFIG_EMBEDDED=y
|
||||
# CONFIG_SYSCTL_SYSCALL is not set
|
||||
CONFIG_KALLSYMS=y
|
||||
# CONFIG_KALLSYMS_ALL is not set
|
||||
# CONFIG_KALLSYMS_EXTRA_PASS is not set
|
||||
CONFIG_HOTPLUG=y
|
||||
CONFIG_PRINTK=y
|
||||
CONFIG_BUG=y
|
||||
# CONFIG_ELF_CORE is not set
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_FUTEX is not set
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_SIGNALFD=y
|
||||
CONFIG_TIMERFD=y
|
||||
CONFIG_EVENTFD=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_AIO=y
|
||||
CONFIG_HAVE_PERF_EVENTS=y
|
||||
|
||||
#
|
||||
# Kernel Performance Events And Counters
|
||||
#
|
||||
# CONFIG_PERF_EVENTS is not set
|
||||
# CONFIG_PERF_COUNTERS is not set
|
||||
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||
CONFIG_SLUB_DEBUG=y
|
||||
CONFIG_COMPAT_BRK=y
|
||||
# CONFIG_SLAB is not set
|
||||
CONFIG_SLUB=y
|
||||
# CONFIG_SLOB is not set
|
||||
# CONFIG_PROFILING is not set
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
# CONFIG_KPROBES is not set
|
||||
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
CONFIG_HAVE_IOREMAP_PROT=y
|
||||
CONFIG_HAVE_KPROBES=y
|
||||
CONFIG_HAVE_KRETPROBES=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
CONFIG_HAVE_DMA_ATTRS=y
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_HAVE_DMA_API_DEBUG=y
|
||||
|
||||
#
|
||||
# GCOV-based kernel profiling
|
||||
#
|
||||
# CONFIG_SLOW_WORK is not set
|
||||
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
|
||||
CONFIG_SLABINFO=y
|
||||
CONFIG_BASE_SMALL=1
|
||||
CONFIG_MODULES=y
|
||||
# CONFIG_MODULE_FORCE_LOAD is not set
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||
# CONFIG_MODVERSIONS is not set
|
||||
CONFIG_MODULE_SRCVERSION_ALL=y
|
||||
CONFIG_BLOCK=y
|
||||
CONFIG_LBDAF=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_BLK_DEV_INTEGRITY is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
CONFIG_IOSCHED_DEADLINE=y
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_DEFAULT_DEADLINE=y
|
||||
# CONFIG_DEFAULT_CFQ is not set
|
||||
# CONFIG_DEFAULT_NOOP is not set
|
||||
CONFIG_DEFAULT_IOSCHED="deadline"
|
||||
# CONFIG_INLINE_SPIN_TRYLOCK is not set
|
||||
# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_BH is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
|
||||
CONFIG_INLINE_SPIN_UNLOCK=y
|
||||
# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
|
||||
CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
|
||||
# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_INLINE_READ_TRYLOCK is not set
|
||||
# CONFIG_INLINE_READ_LOCK is not set
|
||||
# CONFIG_INLINE_READ_LOCK_BH is not set
|
||||
# CONFIG_INLINE_READ_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
|
||||
CONFIG_INLINE_READ_UNLOCK=y
|
||||
# CONFIG_INLINE_READ_UNLOCK_BH is not set
|
||||
CONFIG_INLINE_READ_UNLOCK_IRQ=y
|
||||
# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_INLINE_WRITE_TRYLOCK is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_BH is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
|
||||
CONFIG_INLINE_WRITE_UNLOCK=y
|
||||
# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
|
||||
CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
|
||||
# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_MUTEX_SPIN_ON_OWNER is not set
|
||||
# CONFIG_FREEZER is not set
|
||||
|
||||
#
|
||||
# Platform support
|
||||
#
|
||||
# CONFIG_PPC_CELL is not set
|
||||
# CONFIG_PPC_CELL_NATIVE is not set
|
||||
CONFIG_CPM1=y
|
||||
# CONFIG_MPC8XXFADS is not set
|
||||
# CONFIG_MPC86XADS is not set
|
||||
# CONFIG_MPC885ADS is not set
|
||||
# CONFIG_PPC_EP88XC is not set
|
||||
# CONFIG_PPC_ADDER875 is not set
|
||||
# CONFIG_PPC_MGSUVD is not set
|
||||
CONFIG_TQM8XX=y
|
||||
|
||||
#
|
||||
# MPC8xx CPM Options
|
||||
#
|
||||
|
||||
#
|
||||
# Generic MPC8xx Options
|
||||
#
|
||||
CONFIG_8xx_COPYBACK=y
|
||||
# CONFIG_8xx_GPIO is not set
|
||||
# CONFIG_8xx_CPU6 is not set
|
||||
# CONFIG_8xx_CPU15 is not set
|
||||
CONFIG_NO_UCODE_PATCH=y
|
||||
# CONFIG_USB_SOF_UCODE_PATCH is not set
|
||||
# CONFIG_I2C_SPI_UCODE_PATCH is not set
|
||||
# CONFIG_I2C_SPI_SMC1_UCODE_PATCH is not set
|
||||
# CONFIG_PQ2ADS is not set
|
||||
# CONFIG_IPIC is not set
|
||||
# CONFIG_MPIC is not set
|
||||
# CONFIG_MPIC_WEIRD is not set
|
||||
# CONFIG_PPC_I8259 is not set
|
||||
# CONFIG_PPC_RTAS is not set
|
||||
# CONFIG_MMIO_NVRAM is not set
|
||||
# CONFIG_PPC_MPC106 is not set
|
||||
# CONFIG_PPC_970_NAP is not set
|
||||
# CONFIG_PPC_INDIRECT_IO is not set
|
||||
# CONFIG_GENERIC_IOMAP is not set
|
||||
# CONFIG_CPU_FREQ is not set
|
||||
# CONFIG_QUICC_ENGINE is not set
|
||||
# CONFIG_FSL_ULI1575 is not set
|
||||
CONFIG_CPM=y
|
||||
# CONFIG_SIMPLE_GPIO is not set
|
||||
|
||||
#
|
||||
# Kernel options
|
||||
#
|
||||
# CONFIG_HIGHMEM is not set
|
||||
CONFIG_TICK_ONESHOT=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
|
||||
CONFIG_HZ_100=y
|
||||
# CONFIG_HZ_250 is not set
|
||||
# CONFIG_HZ_300 is not set
|
||||
# CONFIG_HZ_1000 is not set
|
||||
CONFIG_HZ=100
|
||||
CONFIG_SCHED_HRTICK=y
|
||||
CONFIG_PREEMPT_NONE=y
|
||||
# CONFIG_PREEMPT_VOLUNTARY is not set
|
||||
# CONFIG_PREEMPT is not set
|
||||
CONFIG_BINFMT_ELF=y
|
||||
# CONFIG_HAVE_AOUT is not set
|
||||
# CONFIG_BINFMT_MISC is not set
|
||||
# CONFIG_MATH_EMULATION is not set
|
||||
CONFIG_8XX_MINIMAL_FPEMU=y
|
||||
# CONFIG_IOMMU_HELPER is not set
|
||||
# CONFIG_SWIOTLB is not set
|
||||
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
|
||||
CONFIG_ARCH_HAS_WALK_MEMORY=y
|
||||
CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_MAX_ACTIVE_REGIONS=32
|
||||
CONFIG_ARCH_FLATMEM_ENABLE=y
|
||||
CONFIG_ARCH_POPULATES_NODE_MAP=y
|
||||
CONFIG_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_FLATMEM_MANUAL=y
|
||||
# CONFIG_DISCONTIGMEM_MANUAL is not set
|
||||
# CONFIG_SPARSEMEM_MANUAL is not set
|
||||
CONFIG_FLATMEM=y
|
||||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4
|
||||
CONFIG_MIGRATION=y
|
||||
# CONFIG_PHYS_ADDR_T_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=1
|
||||
CONFIG_BOUNCE=y
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
# CONFIG_KSM is not set
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
|
||||
CONFIG_PPC_4K_PAGES=y
|
||||
# CONFIG_PPC_16K_PAGES is not set
|
||||
# CONFIG_PPC_64K_PAGES is not set
|
||||
# CONFIG_PPC_256K_PAGES is not set
|
||||
CONFIG_FORCE_MAX_ZONEORDER=11
|
||||
CONFIG_PROC_DEVICETREE=y
|
||||
# CONFIG_CMDLINE_BOOL is not set
|
||||
CONFIG_EXTRA_TARGETS=""
|
||||
# CONFIG_PM is not set
|
||||
# CONFIG_SECCOMP is not set
|
||||
CONFIG_ISA_DMA_API=y
|
||||
|
||||
#
|
||||
# Bus options
|
||||
#
|
||||
CONFIG_ZONE_DMA=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_FSL_SOC=y
|
||||
# CONFIG_PCI is not set
|
||||
# CONFIG_PCI_DOMAINS is not set
|
||||
# CONFIG_PCI_SYSCALL is not set
|
||||
# CONFIG_PCI_QSPAN is not set
|
||||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||
# CONFIG_PCCARD is not set
|
||||
# CONFIG_HAS_RAPIDIO is not set
|
||||
|
||||
#
|
||||
# Advanced setup
|
||||
#
|
||||
# CONFIG_ADVANCED_OPTIONS is not set
|
||||
|
||||
#
|
||||
# Default settings for advanced configuration options are used
|
||||
#
|
||||
CONFIG_LOWMEM_SIZE=0x30000000
|
||||
CONFIG_PAGE_OFFSET=0xc0000000
|
||||
CONFIG_KERNEL_START=0xc0000000
|
||||
CONFIG_PHYSICAL_START=0x00000000
|
||||
CONFIG_TASK_SIZE=0x80000000
|
||||
CONFIG_CONSISTENT_SIZE=0x00200000
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
# CONFIG_NET_KEY is not set
|
||||
CONFIG_INET=y
|
||||
# CONFIG_IP_MULTICAST is not set
|
||||
# CONFIG_IP_ADVANCED_ROUTER is not set
|
||||
CONFIG_IP_FIB_HASH=y
|
||||
CONFIG_IP_PNP=y
|
||||
# CONFIG_IP_PNP_DHCP is not set
|
||||
# CONFIG_IP_PNP_BOOTP is not set
|
||||
# CONFIG_IP_PNP_RARP is not set
|
||||
# CONFIG_NET_IPIP is not set
|
||||
# CONFIG_NET_IPGRE is not set
|
||||
# CONFIG_ARPD is not set
|
||||
CONFIG_SYN_COOKIES=y
|
||||
# CONFIG_INET_AH is not set
|
||||
# CONFIG_INET_ESP is not set
|
||||
# CONFIG_INET_IPCOMP is not set
|
||||
# CONFIG_INET_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
||||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_INET_LRO is not set
|
||||
CONFIG_INET_DIAG=y
|
||||
CONFIG_INET_TCP_DIAG=y
|
||||
# CONFIG_TCP_CONG_ADVANCED is not set
|
||||
CONFIG_TCP_CONG_CUBIC=y
|
||||
CONFIG_DEFAULT_TCP_CONG="cubic"
|
||||
# CONFIG_TCP_MD5SIG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_NETWORK_SECMARK is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
# CONFIG_IP_DCCP is not set
|
||||
# CONFIG_IP_SCTP is not set
|
||||
# CONFIG_RDS is not set
|
||||
# CONFIG_TIPC is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
# CONFIG_NET_DSA is not set
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
# CONFIG_DECNET is not set
|
||||
# CONFIG_LLC2 is not set
|
||||
# CONFIG_IPX is not set
|
||||
# CONFIG_ATALK is not set
|
||||
# CONFIG_X25 is not set
|
||||
# CONFIG_LAPB is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
# CONFIG_PHONET is not set
|
||||
# CONFIG_IEEE802154 is not set
|
||||
# CONFIG_NET_SCHED is not set
|
||||
# CONFIG_DCB is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
# CONFIG_NET_PKTGEN is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_CAN is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
# CONFIG_AF_RXRPC is not set
|
||||
# CONFIG_WIRELESS is not set
|
||||
# CONFIG_WIMAX is not set
|
||||
# CONFIG_RFKILL is not set
|
||||
# CONFIG_NET_9P is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Generic Driver Options
|
||||
#
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_DEVTMPFS is not set
|
||||
CONFIG_STANDALONE=y
|
||||
CONFIG_PREVENT_FIRMWARE_BUILD=y
|
||||
# CONFIG_FW_LOADER is not set
|
||||
# CONFIG_DEBUG_DRIVER is not set
|
||||
# CONFIG_DEBUG_DEVRES is not set
|
||||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
# CONFIG_CONNECTOR is not set
|
||||
CONFIG_MTD=y
|
||||
# CONFIG_MTD_DEBUG is not set
|
||||
# CONFIG_MTD_TESTS is not set
|
||||
CONFIG_MTD_CONCAT=y
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
# CONFIG_MTD_REDBOOT_PARTS is not set
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_OF_PARTS=y
|
||||
# CONFIG_MTD_AR7_PARTS is not set
|
||||
|
||||
#
|
||||
# User Modules And Translation Layers
|
||||
#
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLKDEVS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
# CONFIG_FTL is not set
|
||||
# CONFIG_NFTL is not set
|
||||
# CONFIG_INFTL is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
# CONFIG_SSFDC is not set
|
||||
# CONFIG_MTD_OOPS is not set
|
||||
|
||||
#
|
||||
# RAM/ROM/Flash chip drivers
|
||||
#
|
||||
CONFIG_MTD_CFI=y
|
||||
# CONFIG_MTD_JEDECPROBE is not set
|
||||
CONFIG_MTD_GEN_PROBE=y
|
||||
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_1=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_2=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
|
||||
CONFIG_MTD_CFI_I1=y
|
||||
CONFIG_MTD_CFI_I2=y
|
||||
# CONFIG_MTD_CFI_I4 is not set
|
||||
# CONFIG_MTD_CFI_I8 is not set
|
||||
CONFIG_MTD_CFI_INTELEXT=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
# CONFIG_MTD_CFI_STAA is not set
|
||||
CONFIG_MTD_CFI_UTIL=y
|
||||
# CONFIG_MTD_RAM is not set
|
||||
# CONFIG_MTD_ROM is not set
|
||||
# CONFIG_MTD_ABSENT is not set
|
||||
|
||||
#
|
||||
# Mapping drivers for chip access
|
||||
#
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
# CONFIG_MTD_PHYSMAP is not set
|
||||
CONFIG_MTD_PHYSMAP_OF=y
|
||||
# CONFIG_MTD_CFI_FLAGADM is not set
|
||||
# CONFIG_MTD_PLATRAM is not set
|
||||
|
||||
#
|
||||
# Self-contained MTD device drivers
|
||||
#
|
||||
# CONFIG_MTD_SLRAM is not set
|
||||
# CONFIG_MTD_PHRAM is not set
|
||||
# CONFIG_MTD_MTDRAM is not set
|
||||
# CONFIG_MTD_BLOCK2MTD is not set
|
||||
|
||||
#
|
||||
# Disk-On-Chip Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_DOC2000 is not set
|
||||
# CONFIG_MTD_DOC2001 is not set
|
||||
# CONFIG_MTD_DOC2001PLUS is not set
|
||||
# CONFIG_MTD_NAND is not set
|
||||
# CONFIG_MTD_ONENAND is not set
|
||||
|
||||
#
|
||||
# LPDDR flash memory drivers
|
||||
#
|
||||
# CONFIG_MTD_LPDDR is not set
|
||||
|
||||
#
|
||||
# UBI - Unsorted block images
|
||||
#
|
||||
# CONFIG_MTD_UBI is not set
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_DYNAMIC=y
|
||||
CONFIG_OF_DEVICE=y
|
||||
CONFIG_OF_MDIO=y
|
||||
# CONFIG_PARPORT is not set
|
||||
# CONFIG_BLK_DEV is not set
|
||||
# CONFIG_MISC_DEVICES is not set
|
||||
CONFIG_HAVE_IDE=y
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
#
|
||||
# SCSI device support
|
||||
#
|
||||
# CONFIG_RAID_ATTRS is not set
|
||||
# CONFIG_SCSI is not set
|
||||
# CONFIG_SCSI_DMA is not set
|
||||
# CONFIG_SCSI_NETLINK is not set
|
||||
# CONFIG_ATA is not set
|
||||
# CONFIG_MD is not set
|
||||
# CONFIG_MACINTOSH_DRIVERS is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_MACVLAN is not set
|
||||
# CONFIG_EQUALIZER is not set
|
||||
# CONFIG_TUN is not set
|
||||
# CONFIG_VETH is not set
|
||||
CONFIG_PHYLIB=y
|
||||
|
||||
#
|
||||
# MII PHY device drivers
|
||||
#
|
||||
# CONFIG_MARVELL_PHY is not set
|
||||
CONFIG_DAVICOM_PHY=y
|
||||
# CONFIG_QSEMI_PHY is not set
|
||||
# CONFIG_LXT_PHY is not set
|
||||
# CONFIG_CICADA_PHY is not set
|
||||
# CONFIG_VITESSE_PHY is not set
|
||||
# CONFIG_SMSC_PHY is not set
|
||||
# CONFIG_BROADCOM_PHY is not set
|
||||
# CONFIG_ICPLUS_PHY is not set
|
||||
# CONFIG_REALTEK_PHY is not set
|
||||
# CONFIG_NATIONAL_PHY is not set
|
||||
# CONFIG_STE10XP is not set
|
||||
# CONFIG_LSI_ET1011C_PHY is not set
|
||||
CONFIG_FIXED_PHY=y
|
||||
# CONFIG_MDIO_BITBANG is not set
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_MII=y
|
||||
# CONFIG_ETHOC is not set
|
||||
# CONFIG_DNET is not set
|
||||
# CONFIG_IBM_NEW_EMAC_ZMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_RGMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_TAH is not set
|
||||
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
|
||||
# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
|
||||
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
|
||||
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
|
||||
# CONFIG_B44 is not set
|
||||
# CONFIG_KS8842 is not set
|
||||
# CONFIG_KS8851_MLL is not set
|
||||
# CONFIG_XILINX_EMACLITE is not set
|
||||
CONFIG_FS_ENET=y
|
||||
CONFIG_FS_ENET_HAS_SCC=y
|
||||
CONFIG_FS_ENET_HAS_FEC=y
|
||||
CONFIG_FS_ENET_MDIO_FEC=y
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
# CONFIG_WLAN is not set
|
||||
|
||||
#
|
||||
# Enable WiMAX (Networking options) to see the WiMAX drivers
|
||||
#
|
||||
# CONFIG_WAN is not set
|
||||
# CONFIG_PPP is not set
|
||||
# CONFIG_SLIP is not set
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
# CONFIG_ISDN is not set
|
||||
# CONFIG_PHONE is not set
|
||||
|
||||
#
|
||||
# Input device support
|
||||
#
|
||||
# CONFIG_INPUT is not set
|
||||
|
||||
#
|
||||
# Hardware I/O ports
|
||||
#
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
|
||||
#
|
||||
# Character devices
|
||||
#
|
||||
# CONFIG_VT is not set
|
||||
CONFIG_DEVKMEM=y
|
||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||
|
||||
#
|
||||
# Serial drivers
|
||||
#
|
||||
# CONFIG_SERIAL_8250 is not set
|
||||
|
||||
#
|
||||
# Non-8250 serial port support
|
||||
#
|
||||
# CONFIG_SERIAL_UARTLITE is not set
|
||||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
CONFIG_SERIAL_CPM=y
|
||||
CONFIG_SERIAL_CPM_CONSOLE=y
|
||||
# CONFIG_SERIAL_TIMBERDALE is not set
|
||||
# CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
# CONFIG_HVC_UDBG is not set
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
CONFIG_HW_RANDOM=y
|
||||
# CONFIG_HW_RANDOM_TIMERIOMEM is not set
|
||||
# CONFIG_NVRAM is not set
|
||||
CONFIG_GEN_RTC=y
|
||||
# CONFIG_GEN_RTC_X is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
# CONFIG_TCG_TPM is not set
|
||||
# CONFIG_I2C is not set
|
||||
# CONFIG_SPI is not set
|
||||
|
||||
#
|
||||
# PPS support
|
||||
#
|
||||
# CONFIG_PPS is not set
|
||||
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
|
||||
# CONFIG_GPIOLIB is not set
|
||||
# CONFIG_W1 is not set
|
||||
# CONFIG_POWER_SUPPLY is not set
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_THERMAL is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
CONFIG_SSB_POSSIBLE=y
|
||||
|
||||
#
|
||||
# Sonics Silicon Backplane
|
||||
#
|
||||
# CONFIG_SSB is not set
|
||||
|
||||
#
|
||||
# Multifunction device drivers
|
||||
#
|
||||
# CONFIG_MFD_CORE is not set
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
# CONFIG_HTC_PASIC3 is not set
|
||||
# CONFIG_MFD_TMIO is not set
|
||||
# CONFIG_REGULATOR is not set
|
||||
# CONFIG_MEDIA_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
# CONFIG_VGASTATE is not set
|
||||
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
|
||||
# CONFIG_FB is not set
|
||||
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Display device support
|
||||
#
|
||||
# CONFIG_DISPLAY_SUPPORT is not set
|
||||
# CONFIG_SOUND is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
# CONFIG_MMC is not set
|
||||
# CONFIG_MEMSTICK is not set
|
||||
# CONFIG_NEW_LEDS is not set
|
||||
# CONFIG_ACCESSIBILITY is not set
|
||||
# CONFIG_EDAC is not set
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
# CONFIG_DMADEVICES is not set
|
||||
# CONFIG_AUXDISPLAY is not set
|
||||
# CONFIG_UIO is not set
|
||||
|
||||
#
|
||||
# TI VLYNQ
|
||||
#
|
||||
# CONFIG_STAGING is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
#
|
||||
# CONFIG_EXT2_FS is not set
|
||||
# CONFIG_EXT3_FS is not set
|
||||
# CONFIG_EXT4_FS is not set
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_BTRFS_FS is not set
|
||||
# CONFIG_NILFS2_FS is not set
|
||||
CONFIG_FILE_LOCKING=y
|
||||
CONFIG_FSNOTIFY=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
# CONFIG_INOTIFY is not set
|
||||
CONFIG_INOTIFY_USER=y
|
||||
# CONFIG_QUOTA is not set
|
||||
# CONFIG_AUTOFS_FS is not set
|
||||
# CONFIG_AUTOFS4_FS is not set
|
||||
# CONFIG_FUSE_FS is not set
|
||||
|
||||
#
|
||||
# Caches
|
||||
#
|
||||
# CONFIG_FSCACHE is not set
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
#
|
||||
# CONFIG_ISO9660_FS is not set
|
||||
# CONFIG_UDF_FS is not set
|
||||
|
||||
#
|
||||
# DOS/FAT/NT Filesystems
|
||||
#
|
||||
# CONFIG_MSDOS_FS is not set
|
||||
# CONFIG_VFAT_FS is not set
|
||||
# CONFIG_NTFS_FS is not set
|
||||
|
||||
#
|
||||
# Pseudo filesystems
|
||||
#
|
||||
CONFIG_PROC_FS=y
|
||||
# CONFIG_PROC_KCORE is not set
|
||||
CONFIG_PROC_SYSCTL=y
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
CONFIG_SYSFS=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_TMPFS_POSIX_ACL is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
# CONFIG_CONFIGFS_FS is not set
|
||||
CONFIG_MISC_FILESYSTEMS=y
|
||||
# CONFIG_ADFS_FS is not set
|
||||
# CONFIG_AFFS_FS is not set
|
||||
# CONFIG_HFS_FS is not set
|
||||
# CONFIG_HFSPLUS_FS is not set
|
||||
# CONFIG_BEFS_FS is not set
|
||||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
# CONFIG_JFFS2_FS is not set
|
||||
# CONFIG_LOGFS is not set
|
||||
CONFIG_CRAMFS=y
|
||||
# CONFIG_SQUASHFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_OMFS_FS is not set
|
||||
# CONFIG_HPFS_FS is not set
|
||||
# CONFIG_QNX4FS_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
CONFIG_NETWORK_FILESYSTEMS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
# CONFIG_NFS_V3_ACL is not set
|
||||
# CONFIG_NFS_V4 is not set
|
||||
CONFIG_ROOT_NFS=y
|
||||
# CONFIG_NFSD is not set
|
||||
CONFIG_LOCKD=y
|
||||
CONFIG_LOCKD_V4=y
|
||||
CONFIG_NFS_COMMON=y
|
||||
CONFIG_SUNRPC=y
|
||||
# CONFIG_RPCSEC_GSS_KRB5 is not set
|
||||
# CONFIG_RPCSEC_GSS_SPKM3 is not set
|
||||
# CONFIG_SMB_FS is not set
|
||||
# CONFIG_CIFS is not set
|
||||
# CONFIG_NCP_FS is not set
|
||||
# CONFIG_CODA_FS is not set
|
||||
# CONFIG_AFS_FS is not set
|
||||
|
||||
#
|
||||
# Partition Types
|
||||
#
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
# CONFIG_ACORN_PARTITION is not set
|
||||
# CONFIG_OSF_PARTITION is not set
|
||||
# CONFIG_AMIGA_PARTITION is not set
|
||||
# CONFIG_ATARI_PARTITION is not set
|
||||
# CONFIG_MAC_PARTITION is not set
|
||||
CONFIG_MSDOS_PARTITION=y
|
||||
# CONFIG_BSD_DISKLABEL is not set
|
||||
# CONFIG_MINIX_SUBPARTITION is not set
|
||||
# CONFIG_SOLARIS_X86_PARTITION is not set
|
||||
# CONFIG_UNIXWARE_DISKLABEL is not set
|
||||
# CONFIG_LDM_PARTITION is not set
|
||||
# CONFIG_SGI_PARTITION is not set
|
||||
# CONFIG_ULTRIX_PARTITION is not set
|
||||
# CONFIG_SUN_PARTITION is not set
|
||||
# CONFIG_KARMA_PARTITION is not set
|
||||
# CONFIG_EFI_PARTITION is not set
|
||||
# CONFIG_SYSV68_PARTITION is not set
|
||||
# CONFIG_NLS is not set
|
||||
# CONFIG_DLM is not set
|
||||
# CONFIG_BINARY_PRINTF is not set
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
CONFIG_GENERIC_FIND_LAST_BIT=y
|
||||
# CONFIG_CRC_CCITT is not set
|
||||
# CONFIG_CRC16 is not set
|
||||
# CONFIG_CRC_T10DIF is not set
|
||||
# CONFIG_CRC_ITU_T is not set
|
||||
# CONFIG_CRC32 is not set
|
||||
# CONFIG_CRC7 is not set
|
||||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAVE_LMB=y
|
||||
CONFIG_NLATTR=y
|
||||
CONFIG_GENERIC_ATOMIC64=y
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
#
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
CONFIG_ENABLE_WARN_DEPRECATED=y
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
CONFIG_FRAME_WARN=1024
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
# CONFIG_DEBUG_SHIRQ is not set
|
||||
CONFIG_DETECT_SOFTLOCKUP=y
|
||||
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
|
||||
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
|
||||
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
|
||||
CONFIG_SCHED_DEBUG=y
|
||||
# CONFIG_SCHEDSTATS is not set
|
||||
# CONFIG_TIMER_STATS is not set
|
||||
# CONFIG_DEBUG_OBJECTS is not set
|
||||
# CONFIG_SLUB_DEBUG_ON is not set
|
||||
# CONFIG_SLUB_STATS is not set
|
||||
# CONFIG_DEBUG_KMEMLEAK is not set
|
||||
# CONFIG_DEBUG_SPINLOCK is not set
|
||||
# CONFIG_DEBUG_MUTEXES is not set
|
||||
# CONFIG_DEBUG_LOCK_ALLOC is not set
|
||||
# CONFIG_PROVE_LOCKING is not set
|
||||
# CONFIG_LOCK_STAT is not set
|
||||
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
|
||||
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
|
||||
# CONFIG_DEBUG_KOBJECT is not set
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
# CONFIG_DEBUG_VM is not set
|
||||
# CONFIG_DEBUG_WRITECOUNT is not set
|
||||
# CONFIG_DEBUG_MEMORY_INIT is not set
|
||||
# CONFIG_DEBUG_LIST is not set
|
||||
# CONFIG_DEBUG_SG is not set
|
||||
# CONFIG_DEBUG_NOTIFIERS is not set
|
||||
# CONFIG_DEBUG_CREDENTIALS is not set
|
||||
# CONFIG_RCU_TORTURE_TEST is not set
|
||||
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
||||
# CONFIG_BACKTRACE_SELF_TEST is not set
|
||||
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
|
||||
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
|
||||
# CONFIG_FAULT_INJECTION is not set
|
||||
# CONFIG_LATENCYTOP is not set
|
||||
# CONFIG_SYSCTL_SYSCALL_CHECK is not set
|
||||
# CONFIG_DEBUG_PAGEALLOC is not set
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_TRACING_SUPPORT=y
|
||||
CONFIG_FTRACE=y
|
||||
# CONFIG_FUNCTION_TRACER is not set
|
||||
# CONFIG_IRQSOFF_TRACER is not set
|
||||
# CONFIG_SCHED_TRACER is not set
|
||||
# CONFIG_ENABLE_DEFAULT_TRACERS is not set
|
||||
# CONFIG_BOOT_TRACER is not set
|
||||
CONFIG_BRANCH_PROFILE_NONE=y
|
||||
# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
|
||||
# CONFIG_PROFILE_ALL_BRANCHES is not set
|
||||
# CONFIG_STACK_TRACER is not set
|
||||
# CONFIG_KMEMTRACE is not set
|
||||
# CONFIG_WORKQUEUE_TRACER is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_DMA_API_DEBUG is not set
|
||||
# CONFIG_SAMPLES is not set
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
# CONFIG_KGDB is not set
|
||||
# CONFIG_PPC_DISABLE_WERROR is not set
|
||||
CONFIG_PPC_WERROR=y
|
||||
CONFIG_PRINT_STACK_DEPTH=64
|
||||
# CONFIG_DEBUG_STACKOVERFLOW is not set
|
||||
# CONFIG_DEBUG_STACK_USAGE is not set
|
||||
# CONFIG_CODE_PATCHING_SELFTEST is not set
|
||||
# CONFIG_FTR_FIXUP_SELFTEST is not set
|
||||
# CONFIG_MSI_BITMAP_SELFTEST is not set
|
||||
# CONFIG_XMON is not set
|
||||
# CONFIG_IRQSTACKS is not set
|
||||
# CONFIG_BDI_SWITCH is not set
|
||||
# CONFIG_PPC_EARLY_DEBUG is not set
|
||||
|
||||
#
|
||||
# Security options
|
||||
#
|
||||
# CONFIG_KEYS is not set
|
||||
# CONFIG_SECURITY is not set
|
||||
# CONFIG_SECURITYFS is not set
|
||||
# CONFIG_DEFAULT_SECURITY_SELINUX is not set
|
||||
# CONFIG_DEFAULT_SECURITY_SMACK is not set
|
||||
# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
|
||||
CONFIG_DEFAULT_SECURITY_DAC=y
|
||||
CONFIG_DEFAULT_SECURITY=""
|
||||
# CONFIG_CRYPTO is not set
|
||||
CONFIG_PPC_CLOCK=y
|
||||
CONFIG_PPC_LIB_RHEAP=y
|
||||
# CONFIG_VIRTUALIZATION is not set
|
|
@ -9,6 +9,14 @@ menuconfig PPC_83xx
|
|||
|
||||
if PPC_83xx
|
||||
|
||||
config MPC830x_RDB
|
||||
bool "Freescale MPC830x RDB"
|
||||
select DEFAULT_UIMAGE
|
||||
select PPC_MPC831x
|
||||
select FSL_GTM
|
||||
help
|
||||
This option enables support for the MPC8308 RDB board.
|
||||
|
||||
config MPC831x_RDB
|
||||
bool "Freescale MPC831x RDB"
|
||||
select DEFAULT_UIMAGE
|
||||
|
|
|
@ -4,6 +4,7 @@
|
|||
obj-y := misc.o usb.o
|
||||
obj-$(CONFIG_SUSPEND) += suspend.o suspend-asm.o
|
||||
obj-$(CONFIG_MCU_MPC8349EMITX) += mcu_mpc8349emitx.o
|
||||
obj-$(CONFIG_MPC830x_RDB) += mpc830x_rdb.o
|
||||
obj-$(CONFIG_MPC831x_RDB) += mpc831x_rdb.o
|
||||
obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o
|
||||
obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
|
||||
|
|
|
@ -0,0 +1,94 @@
|
|||
/*
|
||||
* arch/powerpc/platforms/83xx/mpc830x_rdb.c
|
||||
*
|
||||
* Description: MPC830x RDB board specific routines.
|
||||
* This file is based on mpc831x_rdb.c
|
||||
*
|
||||
* Copyright (C) Freescale Semiconductor, Inc. 2009. All rights reserved.
|
||||
* Copyright (C) 2010. Ilya Yanok, Emcraft Systems, yanok@emcraft.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/pci.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/ipic.h>
|
||||
#include <asm/udbg.h>
|
||||
#include <sysdev/fsl_pci.h>
|
||||
#include <sysdev/fsl_soc.h>
|
||||
#include "mpc83xx.h"
|
||||
|
||||
/*
|
||||
* Setup the architecture
|
||||
*/
|
||||
static void __init mpc830x_rdb_setup_arch(void)
|
||||
{
|
||||
#ifdef CONFIG_PCI
|
||||
struct device_node *np;
|
||||
#endif
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("mpc830x_rdb_setup_arch()", 0);
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
for_each_compatible_node(np, "pci", "fsl,mpc8308-pcie")
|
||||
mpc83xx_add_bridge(np);
|
||||
#endif
|
||||
mpc831x_usb_cfg();
|
||||
}
|
||||
|
||||
static void __init mpc830x_rdb_init_IRQ(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_node_by_type(NULL, "ipic");
|
||||
if (!np)
|
||||
return;
|
||||
|
||||
ipic_init(np, 0);
|
||||
|
||||
/* Initialize the default interrupt mapping priorities,
|
||||
* in case the boot rom changed something on us.
|
||||
*/
|
||||
ipic_set_default_priority();
|
||||
}
|
||||
|
||||
/*
|
||||
* Called very early, MMU is off, device-tree isn't unflattened
|
||||
*/
|
||||
static int __init mpc830x_rdb_probe(void)
|
||||
{
|
||||
unsigned long root = of_get_flat_dt_root();
|
||||
|
||||
return of_flat_dt_is_compatible(root, "MPC8308RDB") ||
|
||||
of_flat_dt_is_compatible(root, "fsl,mpc8308rdb");
|
||||
}
|
||||
|
||||
static struct of_device_id __initdata of_bus_ids[] = {
|
||||
{ .compatible = "simple-bus" },
|
||||
{ .compatible = "gianfar" },
|
||||
{},
|
||||
};
|
||||
|
||||
static int __init declare_of_platform_devices(void)
|
||||
{
|
||||
of_platform_bus_probe(NULL, of_bus_ids, NULL);
|
||||
return 0;
|
||||
}
|
||||
machine_device_initcall(mpc830x_rdb, declare_of_platform_devices);
|
||||
|
||||
define_machine(mpc830x_rdb) {
|
||||
.name = "MPC830x RDB",
|
||||
.probe = mpc830x_rdb_probe,
|
||||
.setup_arch = mpc830x_rdb_setup_arch,
|
||||
.init_IRQ = mpc830x_rdb_init_IRQ,
|
||||
.get_irq = ipic_get_irq,
|
||||
.restart = mpc83xx_restart,
|
||||
.time_init = mpc83xx_time_init,
|
||||
.calibrate_decr = generic_calibrate_decr,
|
||||
.progress = udbg_progress,
|
||||
};
|
|
@ -65,6 +65,14 @@ config MPC85xx_RDB
|
|||
help
|
||||
This option enables support for the MPC85xx RDB (P2020 RDB) board
|
||||
|
||||
config P1022_DS
|
||||
bool "Freescale P1022 DS"
|
||||
select DEFAULT_UIMAGE
|
||||
select CONFIG_PHYS_64BIT # The DTS has 36-bit addresses
|
||||
select SWIOTLB
|
||||
help
|
||||
This option enables support for the Freescale P1022DS reference board.
|
||||
|
||||
config SOCRATES
|
||||
bool "Socrates"
|
||||
select DEFAULT_UIMAGE
|
||||
|
|
|
@ -10,6 +10,7 @@ obj-$(CONFIG_MPC8536_DS) += mpc8536_ds.o
|
|||
obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o
|
||||
obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
|
||||
obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o
|
||||
obj-$(CONFIG_P1022_DS) += p1022_ds.o
|
||||
obj-$(CONFIG_P4080_DS) += p4080_ds.o corenet_ds.o
|
||||
obj-$(CONFIG_STX_GP3) += stx_gp3.o
|
||||
obj-$(CONFIG_TQM85xx) += tqm85xx.o
|
||||
|
|
|
@ -158,51 +158,108 @@ static int mpc8568_mds_phy_fixups(struct phy_device *phydev)
|
|||
extern void __init mpc85xx_smp_init(void);
|
||||
#endif
|
||||
|
||||
static void __init mpc85xx_mds_setup_arch(void)
|
||||
#ifdef CONFIG_QUICC_ENGINE
|
||||
static struct of_device_id mpc85xx_qe_ids[] __initdata = {
|
||||
{ .type = "qe", },
|
||||
{ .compatible = "fsl,qe", },
|
||||
{ },
|
||||
};
|
||||
|
||||
static void __init mpc85xx_publish_qe_devices(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
static u8 __iomem *bcsr_regs = NULL;
|
||||
#ifdef CONFIG_PCI
|
||||
struct pci_controller *hose;
|
||||
#endif
|
||||
dma_addr_t max = 0xffffffff;
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("mpc85xx_mds_setup_arch()", 0);
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,qe");
|
||||
if (!of_device_is_available(np)) {
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
of_platform_bus_probe(NULL, mpc85xx_qe_ids, NULL);
|
||||
}
|
||||
|
||||
static void __init mpc85xx_mds_reset_ucc_phys(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
static u8 __iomem *bcsr_regs;
|
||||
|
||||
/* Map BCSR area */
|
||||
np = of_find_node_by_name(NULL, "bcsr");
|
||||
if (np != NULL) {
|
||||
struct resource res;
|
||||
if (!np)
|
||||
return;
|
||||
|
||||
of_address_to_resource(np, 0, &res);
|
||||
bcsr_regs = ioremap(res.start, res.end - res.start +1);
|
||||
of_node_put(np);
|
||||
}
|
||||
bcsr_regs = of_iomap(np, 0);
|
||||
of_node_put(np);
|
||||
if (!bcsr_regs)
|
||||
return;
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
for_each_node_by_type(np, "pci") {
|
||||
if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
|
||||
of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
|
||||
struct resource rsrc;
|
||||
of_address_to_resource(np, 0, &rsrc);
|
||||
if ((rsrc.start & 0xfffff) == 0x8000)
|
||||
fsl_add_bridge(np, 1);
|
||||
else
|
||||
fsl_add_bridge(np, 0);
|
||||
if (machine_is(mpc8568_mds)) {
|
||||
#define BCSR_UCC1_GETH_EN (0x1 << 7)
|
||||
#define BCSR_UCC2_GETH_EN (0x1 << 7)
|
||||
#define BCSR_UCC1_MODE_MSK (0x3 << 4)
|
||||
#define BCSR_UCC2_MODE_MSK (0x3 << 0)
|
||||
|
||||
hose = pci_find_hose_for_OF_device(np);
|
||||
max = min(max, hose->dma_window_base_cur +
|
||||
hose->dma_window_size);
|
||||
/* Turn off UCC1 & UCC2 */
|
||||
clrbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN);
|
||||
clrbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN);
|
||||
|
||||
/* Mode is RGMII, all bits clear */
|
||||
clrbits8(&bcsr_regs[11], BCSR_UCC1_MODE_MSK |
|
||||
BCSR_UCC2_MODE_MSK);
|
||||
|
||||
/* Turn UCC1 & UCC2 on */
|
||||
setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN);
|
||||
setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN);
|
||||
} else if (machine_is(mpc8569_mds)) {
|
||||
#define BCSR7_UCC12_GETHnRST (0x1 << 2)
|
||||
#define BCSR8_UEM_MARVELL_RST (0x1 << 1)
|
||||
#define BCSR_UCC_RGMII (0x1 << 6)
|
||||
#define BCSR_UCC_RTBI (0x1 << 5)
|
||||
/*
|
||||
* U-Boot mangles interrupt polarity for Marvell PHYs,
|
||||
* so reset built-in and UEM Marvell PHYs, this puts
|
||||
* the PHYs into their normal state.
|
||||
*/
|
||||
clrbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST);
|
||||
setbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST);
|
||||
|
||||
setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST);
|
||||
clrbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST);
|
||||
|
||||
for (np = NULL; (np = of_find_compatible_node(np,
|
||||
"network",
|
||||
"ucc_geth")) != NULL;) {
|
||||
const unsigned int *prop;
|
||||
int ucc_num;
|
||||
|
||||
prop = of_get_property(np, "cell-index", NULL);
|
||||
if (prop == NULL)
|
||||
continue;
|
||||
|
||||
ucc_num = *prop - 1;
|
||||
|
||||
prop = of_get_property(np, "phy-connection-type", NULL);
|
||||
if (prop == NULL)
|
||||
continue;
|
||||
|
||||
if (strcmp("rtbi", (const char *)prop) == 0)
|
||||
clrsetbits_8(&bcsr_regs[7 + ucc_num],
|
||||
BCSR_UCC_RGMII, BCSR_UCC_RTBI);
|
||||
}
|
||||
} else if (machine_is(p1021_mds)) {
|
||||
#define BCSR11_ENET_MICRST (0x1 << 5)
|
||||
/* Reset Micrel PHY */
|
||||
clrbits8(&bcsr_regs[11], BCSR11_ENET_MICRST);
|
||||
setbits8(&bcsr_regs[11], BCSR11_ENET_MICRST);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
mpc85xx_smp_init();
|
||||
#endif
|
||||
iounmap(bcsr_regs);
|
||||
}
|
||||
|
||||
static void __init mpc85xx_mds_qe_init(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
||||
#ifdef CONFIG_QUICC_ENGINE
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,qe");
|
||||
if (!np) {
|
||||
np = of_find_node_by_name(NULL, "qe");
|
||||
|
@ -210,6 +267,11 @@ static void __init mpc85xx_mds_setup_arch(void)
|
|||
return;
|
||||
}
|
||||
|
||||
if (!of_device_is_available(np)) {
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
qe_reset();
|
||||
of_node_put(np);
|
||||
|
||||
|
@ -224,70 +286,7 @@ static void __init mpc85xx_mds_setup_arch(void)
|
|||
par_io_of_config(ucc);
|
||||
}
|
||||
|
||||
if (bcsr_regs) {
|
||||
if (machine_is(mpc8568_mds)) {
|
||||
#define BCSR_UCC1_GETH_EN (0x1 << 7)
|
||||
#define BCSR_UCC2_GETH_EN (0x1 << 7)
|
||||
#define BCSR_UCC1_MODE_MSK (0x3 << 4)
|
||||
#define BCSR_UCC2_MODE_MSK (0x3 << 0)
|
||||
|
||||
/* Turn off UCC1 & UCC2 */
|
||||
clrbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN);
|
||||
clrbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN);
|
||||
|
||||
/* Mode is RGMII, all bits clear */
|
||||
clrbits8(&bcsr_regs[11], BCSR_UCC1_MODE_MSK |
|
||||
BCSR_UCC2_MODE_MSK);
|
||||
|
||||
/* Turn UCC1 & UCC2 on */
|
||||
setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN);
|
||||
setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN);
|
||||
} else if (machine_is(mpc8569_mds)) {
|
||||
#define BCSR7_UCC12_GETHnRST (0x1 << 2)
|
||||
#define BCSR8_UEM_MARVELL_RST (0x1 << 1)
|
||||
#define BCSR_UCC_RGMII (0x1 << 6)
|
||||
#define BCSR_UCC_RTBI (0x1 << 5)
|
||||
/*
|
||||
* U-Boot mangles interrupt polarity for Marvell PHYs,
|
||||
* so reset built-in and UEM Marvell PHYs, this puts
|
||||
* the PHYs into their normal state.
|
||||
*/
|
||||
clrbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST);
|
||||
setbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST);
|
||||
|
||||
setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST);
|
||||
clrbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST);
|
||||
|
||||
for (np = NULL; (np = of_find_compatible_node(np,
|
||||
"network",
|
||||
"ucc_geth")) != NULL;) {
|
||||
const unsigned int *prop;
|
||||
int ucc_num;
|
||||
|
||||
prop = of_get_property(np, "cell-index", NULL);
|
||||
if (prop == NULL)
|
||||
continue;
|
||||
|
||||
ucc_num = *prop - 1;
|
||||
|
||||
prop = of_get_property(np, "phy-connection-type", NULL);
|
||||
if (prop == NULL)
|
||||
continue;
|
||||
|
||||
if (strcmp("rtbi", (const char *)prop) == 0)
|
||||
clrsetbits_8(&bcsr_regs[7 + ucc_num],
|
||||
BCSR_UCC_RGMII, BCSR_UCC_RTBI);
|
||||
}
|
||||
|
||||
} else if (machine_is(p1021_mds)) {
|
||||
#define BCSR11_ENET_MICRST (0x1 << 5)
|
||||
/* Reset Micrel PHY */
|
||||
clrbits8(&bcsr_regs[11], BCSR11_ENET_MICRST);
|
||||
setbits8(&bcsr_regs[11], BCSR11_ENET_MICRST);
|
||||
}
|
||||
|
||||
iounmap(bcsr_regs);
|
||||
}
|
||||
mpc85xx_mds_reset_ucc_phys();
|
||||
|
||||
if (machine_is(p1021_mds)) {
|
||||
#define MPC85xx_PMUXCR_OFFSET 0x60
|
||||
|
@ -322,8 +321,72 @@ static void __init mpc85xx_mds_setup_arch(void)
|
|||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
static void __init mpc85xx_mds_qeic_init(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,qe");
|
||||
if (!of_device_is_available(np)) {
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
|
||||
if (!np) {
|
||||
np = of_find_node_by_type(NULL, "qeic");
|
||||
if (!np)
|
||||
return;
|
||||
}
|
||||
|
||||
if (machine_is(p1021_mds))
|
||||
qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
|
||||
qe_ic_cascade_high_mpic);
|
||||
else
|
||||
qe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);
|
||||
of_node_put(np);
|
||||
}
|
||||
#else
|
||||
static void __init mpc85xx_publish_qe_devices(void) { }
|
||||
static void __init mpc85xx_mds_qe_init(void) { }
|
||||
static void __init mpc85xx_mds_qeic_init(void) { }
|
||||
#endif /* CONFIG_QUICC_ENGINE */
|
||||
|
||||
static void __init mpc85xx_mds_setup_arch(void)
|
||||
{
|
||||
#ifdef CONFIG_PCI
|
||||
struct pci_controller *hose;
|
||||
#endif
|
||||
dma_addr_t max = 0xffffffff;
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("mpc85xx_mds_setup_arch()", 0);
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
for_each_node_by_type(np, "pci") {
|
||||
if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
|
||||
of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
|
||||
struct resource rsrc;
|
||||
of_address_to_resource(np, 0, &rsrc);
|
||||
if ((rsrc.start & 0xfffff) == 0x8000)
|
||||
fsl_add_bridge(np, 1);
|
||||
else
|
||||
fsl_add_bridge(np, 0);
|
||||
|
||||
hose = pci_find_hose_for_OF_device(np);
|
||||
max = min(max, hose->dma_window_base_cur +
|
||||
hose->dma_window_size);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
mpc85xx_smp_init();
|
||||
#endif
|
||||
|
||||
mpc85xx_mds_qe_init();
|
||||
|
||||
#ifdef CONFIG_SWIOTLB
|
||||
if (memblock_end_of_DRAM() > max) {
|
||||
ppc_swiotlb_enable = 1;
|
||||
|
@ -369,8 +432,6 @@ static struct of_device_id mpc85xx_ids[] = {
|
|||
{ .type = "soc", },
|
||||
{ .compatible = "soc", },
|
||||
{ .compatible = "simple-bus", },
|
||||
{ .type = "qe", },
|
||||
{ .compatible = "fsl,qe", },
|
||||
{ .compatible = "gianfar", },
|
||||
{ .compatible = "fsl,rapidio-delta", },
|
||||
{ .compatible = "fsl,mpc8548-guts", },
|
||||
|
@ -382,8 +443,6 @@ static struct of_device_id p1021_ids[] = {
|
|||
{ .type = "soc", },
|
||||
{ .compatible = "soc", },
|
||||
{ .compatible = "simple-bus", },
|
||||
{ .type = "qe", },
|
||||
{ .compatible = "fsl,qe", },
|
||||
{ .compatible = "gianfar", },
|
||||
{},
|
||||
};
|
||||
|
@ -395,16 +454,16 @@ static int __init mpc85xx_publish_devices(void)
|
|||
if (machine_is(mpc8569_mds))
|
||||
simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio");
|
||||
|
||||
/* Publish the QE devices */
|
||||
of_platform_bus_probe(NULL, mpc85xx_ids, NULL);
|
||||
mpc85xx_publish_qe_devices();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init p1021_publish_devices(void)
|
||||
{
|
||||
/* Publish the QE devices */
|
||||
of_platform_bus_probe(NULL, p1021_ids, NULL);
|
||||
mpc85xx_publish_qe_devices();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -441,21 +500,7 @@ static void __init mpc85xx_mds_pic_init(void)
|
|||
of_node_put(np);
|
||||
|
||||
mpic_init(mpic);
|
||||
|
||||
#ifdef CONFIG_QUICC_ENGINE
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
|
||||
if (!np) {
|
||||
np = of_find_node_by_type(NULL, "qeic");
|
||||
if (!np)
|
||||
return;
|
||||
}
|
||||
if (machine_is(p1021_mds))
|
||||
qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
|
||||
qe_ic_cascade_high_mpic);
|
||||
else
|
||||
qe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);
|
||||
of_node_put(np);
|
||||
#endif /* CONFIG_QUICC_ENGINE */
|
||||
mpc85xx_mds_qeic_init();
|
||||
}
|
||||
|
||||
static int __init mpc85xx_mds_probe(void)
|
||||
|
|
|
@ -0,0 +1,148 @@
|
|||
/*
|
||||
* P1022DS board specific routines
|
||||
*
|
||||
* Authors: Travis Wheatley <travis.wheatley@freescale.com>
|
||||
* Dave Liu <daveliu@freescale.com>
|
||||
* Timur Tabi <timur@freescale.com>
|
||||
*
|
||||
* Copyright 2010 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* This file is taken from the Freescale P1022DS BSP, with modifications:
|
||||
* 1) No DIU support (pending rewrite of DIU code)
|
||||
* 2) No AMP support
|
||||
* 3) No PCI endpoint support
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#include <linux/pci.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/lmb.h>
|
||||
|
||||
#include <asm/mpic.h>
|
||||
#include <asm/swiotlb.h>
|
||||
|
||||
#include <sysdev/fsl_soc.h>
|
||||
#include <sysdev/fsl_pci.h>
|
||||
|
||||
void __init p1022_ds_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_node_by_type(NULL, "open-pic");
|
||||
if (!np) {
|
||||
pr_err("Could not find open-pic node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (of_address_to_resource(np, 0, &r)) {
|
||||
pr_err("Failed to map mpic register space\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
mpic = mpic_alloc(np, r.start,
|
||||
MPIC_PRIMARY | MPIC_WANTS_RESET |
|
||||
MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
|
||||
MPIC_SINGLE_DEST_CPU,
|
||||
0, 256, " OpenPIC ");
|
||||
|
||||
BUG_ON(mpic == NULL);
|
||||
of_node_put(np);
|
||||
|
||||
mpic_init(mpic);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
void __init mpc85xx_smp_init(void);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Setup the architecture
|
||||
*/
|
||||
static void __init p1022_ds_setup_arch(void)
|
||||
{
|
||||
#ifdef CONFIG_PCI
|
||||
struct device_node *np;
|
||||
#endif
|
||||
dma_addr_t max = 0xffffffff;
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("p1022_ds_setup_arch()", 0);
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
for_each_compatible_node(np, "pci", "fsl,p1022-pcie") {
|
||||
struct resource rsrc;
|
||||
struct pci_controller *hose;
|
||||
|
||||
of_address_to_resource(np, 0, &rsrc);
|
||||
|
||||
if ((rsrc.start & 0xfffff) == 0x8000)
|
||||
fsl_add_bridge(np, 1);
|
||||
else
|
||||
fsl_add_bridge(np, 0);
|
||||
|
||||
hose = pci_find_hose_for_OF_device(np);
|
||||
max = min(max, hose->dma_window_base_cur +
|
||||
hose->dma_window_size);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
mpc85xx_smp_init();
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SWIOTLB
|
||||
if (lmb_end_of_DRAM() > max) {
|
||||
ppc_swiotlb_enable = 1;
|
||||
set_pci_dma_ops(&swiotlb_dma_ops);
|
||||
ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
|
||||
}
|
||||
#endif
|
||||
|
||||
pr_info("Freescale P1022 DS reference board\n");
|
||||
}
|
||||
|
||||
static struct of_device_id __initdata p1022_ds_ids[] = {
|
||||
{ .type = "soc", },
|
||||
{ .compatible = "soc", },
|
||||
{ .compatible = "simple-bus", },
|
||||
{ .compatible = "gianfar", },
|
||||
{},
|
||||
};
|
||||
|
||||
static int __init p1022_ds_publish_devices(void)
|
||||
{
|
||||
return of_platform_bus_probe(NULL, p1022_ds_ids, NULL);
|
||||
}
|
||||
machine_device_initcall(p1022_ds, p1022_ds_publish_devices);
|
||||
|
||||
machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier);
|
||||
|
||||
/*
|
||||
* Called very early, device-tree isn't unflattened
|
||||
*/
|
||||
static int __init p1022_ds_probe(void)
|
||||
{
|
||||
unsigned long root = of_get_flat_dt_root();
|
||||
|
||||
return of_flat_dt_is_compatible(root, "fsl,p1022ds");
|
||||
}
|
||||
|
||||
define_machine(p1022_ds) {
|
||||
.name = "P1022 DS",
|
||||
.probe = p1022_ds_probe,
|
||||
.setup_arch = p1022_ds_setup_arch,
|
||||
.init_IRQ = p1022_ds_pic_init,
|
||||
#ifdef CONFIG_PCI
|
||||
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
||||
#endif
|
||||
.get_irq = mpic_get_irq,
|
||||
.restart = fsl_rstcr_restart,
|
||||
.calibrate_decr = generic_calibrate_decr,
|
||||
.progress = udbg_progress,
|
||||
};
|
|
@ -15,6 +15,7 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/kexec.h>
|
||||
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
@ -24,6 +25,7 @@
|
|||
#include <asm/dbell.h>
|
||||
|
||||
#include <sysdev/fsl_soc.h>
|
||||
#include <sysdev/mpic.h>
|
||||
|
||||
extern void __early_start(void);
|
||||
|
||||
|
@ -105,8 +107,64 @@ smp_85xx_setup_cpu(int cpu_nr)
|
|||
|
||||
struct smp_ops_t smp_85xx_ops = {
|
||||
.kick_cpu = smp_85xx_kick_cpu,
|
||||
#ifdef CONFIG_KEXEC
|
||||
.give_timebase = smp_generic_give_timebase,
|
||||
.take_timebase = smp_generic_take_timebase,
|
||||
#endif
|
||||
};
|
||||
|
||||
#ifdef CONFIG_KEXEC
|
||||
static int kexec_down_cpus = 0;
|
||||
|
||||
void mpc85xx_smp_kexec_cpu_down(int crash_shutdown, int secondary)
|
||||
{
|
||||
mpic_teardown_this_cpu(1);
|
||||
|
||||
/* When crashing, this gets called on all CPU's we only
|
||||
* take down the non-boot cpus */
|
||||
if (smp_processor_id() != boot_cpuid)
|
||||
{
|
||||
local_irq_disable();
|
||||
kexec_down_cpus++;
|
||||
|
||||
while (1);
|
||||
}
|
||||
}
|
||||
|
||||
static void mpc85xx_smp_kexec_down(void *arg)
|
||||
{
|
||||
if (ppc_md.kexec_cpu_down)
|
||||
ppc_md.kexec_cpu_down(0,1);
|
||||
}
|
||||
|
||||
static void mpc85xx_smp_machine_kexec(struct kimage *image)
|
||||
{
|
||||
int timeout = 2000;
|
||||
int i;
|
||||
|
||||
set_cpus_allowed(current, cpumask_of_cpu(boot_cpuid));
|
||||
|
||||
smp_call_function(mpc85xx_smp_kexec_down, NULL, 0);
|
||||
|
||||
while ( (kexec_down_cpus != (num_online_cpus() - 1)) &&
|
||||
( timeout > 0 ) )
|
||||
{
|
||||
timeout--;
|
||||
}
|
||||
|
||||
if ( !timeout )
|
||||
printk(KERN_ERR "Unable to bring down secondary cpu(s)");
|
||||
|
||||
for (i = 0; i < num_present_cpus(); i++)
|
||||
{
|
||||
if ( i == smp_processor_id() ) continue;
|
||||
mpic_reset_core(i);
|
||||
}
|
||||
|
||||
default_machine_kexec(image);
|
||||
}
|
||||
#endif /* CONFIG_KEXEC */
|
||||
|
||||
void __init mpc85xx_smp_init(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
@ -124,4 +182,9 @@ void __init mpc85xx_smp_init(void)
|
|||
BUG_ON(!smp_85xx_ops.message_pass);
|
||||
|
||||
smp_ops = &smp_85xx_ops;
|
||||
|
||||
#ifdef CONFIG_KEXEC
|
||||
ppc_md.kexec_cpu_down = mpc85xx_smp_kexec_cpu_down;
|
||||
ppc_md.machine_kexec = mpc85xx_smp_machine_kexec;
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -151,6 +151,27 @@ static void tqm85xx_show_cpuinfo(struct seq_file *m)
|
|||
seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
|
||||
}
|
||||
|
||||
static void __init tqm85xx_ti1520_fixup(struct pci_dev *pdev)
|
||||
{
|
||||
unsigned int val;
|
||||
|
||||
/* Do not do the fixup on other platforms! */
|
||||
if (!machine_is(tqm85xx))
|
||||
return;
|
||||
|
||||
dev_info(&pdev->dev, "Using TI 1520 fixup on TQM85xx\n");
|
||||
|
||||
/*
|
||||
* Enable P2CCLK bit in system control register
|
||||
* to enable CLOCK output to power chip
|
||||
*/
|
||||
pci_read_config_dword(pdev, 0x80, &val);
|
||||
pci_write_config_dword(pdev, 0x80, val | (1 << 27));
|
||||
|
||||
}
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520,
|
||||
tqm85xx_ti1520_fixup);
|
||||
|
||||
static struct of_device_id __initdata of_bus_ids[] = {
|
||||
{ .compatible = "simple-bus", },
|
||||
{ .compatible = "gianfar", },
|
||||
|
|
|
@ -55,6 +55,12 @@ config PPC_MGSUVD
|
|||
help
|
||||
This enables support for the Keymile MGSUVD board.
|
||||
|
||||
config TQM8XX
|
||||
bool "TQM8XX"
|
||||
select CPM1
|
||||
help
|
||||
support for the mpc8xx based boards from TQM.
|
||||
|
||||
endchoice
|
||||
|
||||
menu "Freescale Ethernet driver platform-specific options"
|
||||
|
|
|
@ -7,3 +7,4 @@ obj-$(CONFIG_MPC86XADS) += mpc86xads_setup.o
|
|||
obj-$(CONFIG_PPC_EP88XC) += ep88xc.o
|
||||
obj-$(CONFIG_PPC_ADDER875) += adder875.o
|
||||
obj-$(CONFIG_PPC_MGSUVD) += mgsuvd.o
|
||||
obj-$(CONFIG_TQM8XX) += tqm8xx_setup.o
|
||||
|
|
|
@ -0,0 +1,156 @@
|
|||
/*
|
||||
* Platform setup for the MPC8xx based boards from TQM.
|
||||
*
|
||||
* Heiko Schocher <hs@denx.de>
|
||||
* Copyright 2010 DENX Software Engineering GmbH
|
||||
*
|
||||
* based on:
|
||||
* Vitaly Bordug <vbordug@ru.mvista.com>
|
||||
*
|
||||
* Copyright 2005 MontaVista Software Inc.
|
||||
*
|
||||
* Heavily modified by Scott Wood <scottwood@freescale.com>
|
||||
* Copyright 2007 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/param.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include <linux/fs_enet_pd.h>
|
||||
#include <linux/fs_uart_pd.h>
|
||||
#include <linux/fsl_devices.h>
|
||||
#include <linux/mii.h>
|
||||
#include <linux/of_platform.h>
|
||||
|
||||
#include <asm/delay.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/mpc8xx.h>
|
||||
#include <asm/8xx_immap.h>
|
||||
#include <asm/cpm1.h>
|
||||
#include <asm/fs_pd.h>
|
||||
#include <asm/udbg.h>
|
||||
|
||||
#include "mpc8xx.h"
|
||||
|
||||
struct cpm_pin {
|
||||
int port, pin, flags;
|
||||
};
|
||||
|
||||
static struct __initdata cpm_pin tqm8xx_pins[] = {
|
||||
/* SMC1 */
|
||||
{CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */
|
||||
{CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
|
||||
|
||||
/* SCC1 */
|
||||
{CPM_PORTA, 5, CPM_PIN_INPUT}, /* CLK1 */
|
||||
{CPM_PORTA, 7, CPM_PIN_INPUT}, /* CLK2 */
|
||||
{CPM_PORTA, 14, CPM_PIN_INPUT}, /* TX */
|
||||
{CPM_PORTA, 15, CPM_PIN_INPUT}, /* RX */
|
||||
{CPM_PORTC, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TENA */
|
||||
{CPM_PORTC, 10, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO},
|
||||
{CPM_PORTC, 11, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO},
|
||||
};
|
||||
|
||||
static struct __initdata cpm_pin tqm8xx_fec_pins[] = {
|
||||
/* MII */
|
||||
{CPM_PORTD, 3, CPM_PIN_OUTPUT},
|
||||
{CPM_PORTD, 4, CPM_PIN_OUTPUT},
|
||||
{CPM_PORTD, 5, CPM_PIN_OUTPUT},
|
||||
{CPM_PORTD, 6, CPM_PIN_OUTPUT},
|
||||
{CPM_PORTD, 7, CPM_PIN_OUTPUT},
|
||||
{CPM_PORTD, 8, CPM_PIN_OUTPUT},
|
||||
{CPM_PORTD, 9, CPM_PIN_OUTPUT},
|
||||
{CPM_PORTD, 10, CPM_PIN_OUTPUT},
|
||||
{CPM_PORTD, 11, CPM_PIN_OUTPUT},
|
||||
{CPM_PORTD, 12, CPM_PIN_OUTPUT},
|
||||
{CPM_PORTD, 13, CPM_PIN_OUTPUT},
|
||||
{CPM_PORTD, 14, CPM_PIN_OUTPUT},
|
||||
{CPM_PORTD, 15, CPM_PIN_OUTPUT},
|
||||
};
|
||||
|
||||
static void __init init_pins(int n, struct cpm_pin *pin)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < n; i++) {
|
||||
cpm1_set_pin(pin->port, pin->pin, pin->flags);
|
||||
pin++;
|
||||
}
|
||||
}
|
||||
|
||||
static void __init init_ioports(void)
|
||||
{
|
||||
struct device_node *dnode;
|
||||
struct property *prop;
|
||||
int len;
|
||||
|
||||
init_pins(ARRAY_SIZE(tqm8xx_pins), &tqm8xx_pins[0]);
|
||||
|
||||
cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
|
||||
|
||||
dnode = of_find_node_by_name(NULL, "aliases");
|
||||
if (dnode == NULL)
|
||||
return;
|
||||
prop = of_find_property(dnode, "ethernet1", &len);
|
||||
if (prop == NULL)
|
||||
return;
|
||||
|
||||
/* init FEC pins */
|
||||
init_pins(ARRAY_SIZE(tqm8xx_fec_pins), &tqm8xx_fec_pins[0]);
|
||||
}
|
||||
|
||||
static void __init tqm8xx_setup_arch(void)
|
||||
{
|
||||
cpm_reset();
|
||||
init_ioports();
|
||||
}
|
||||
|
||||
static int __init tqm8xx_probe(void)
|
||||
{
|
||||
unsigned long node = of_get_flat_dt_root();
|
||||
|
||||
return of_flat_dt_is_compatible(node, "tqc,tqm8xx");
|
||||
}
|
||||
|
||||
static struct of_device_id __initdata of_bus_ids[] = {
|
||||
{ .name = "soc", },
|
||||
{ .name = "cpm", },
|
||||
{ .name = "localbus", },
|
||||
{ .compatible = "simple-bus" },
|
||||
{},
|
||||
};
|
||||
|
||||
static int __init declare_of_platform_devices(void)
|
||||
{
|
||||
of_platform_bus_probe(NULL, of_bus_ids, NULL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
machine_device_initcall(tqm8xx, declare_of_platform_devices);
|
||||
|
||||
define_machine(tqm8xx) {
|
||||
.name = "TQM8xx",
|
||||
.probe = tqm8xx_probe,
|
||||
.setup_arch = tqm8xx_setup_arch,
|
||||
.init_IRQ = mpc8xx_pics_init,
|
||||
.get_irq = mpc8xx_get_irq,
|
||||
.restart = mpc8xx_restart,
|
||||
.calibrate_decr = mpc8xx_calibrate_decr,
|
||||
.set_rtc_time = mpc8xx_set_rtc_time,
|
||||
.get_rtc_time = mpc8xx_get_rtc_time,
|
||||
.progress = udbg_progress,
|
||||
};
|
|
@ -412,6 +412,7 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4080, quirk_fsl_pcie_header);
|
|||
#endif /* CONFIG_FSL_SOC_BOOKE || CONFIG_PPC_86xx */
|
||||
|
||||
#if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x)
|
||||
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8308, quirk_fsl_pcie_header);
|
||||
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314E, quirk_fsl_pcie_header);
|
||||
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314, quirk_fsl_pcie_header);
|
||||
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8315E, quirk_fsl_pcie_header);
|
||||
|
|
|
@ -2264,6 +2264,7 @@
|
|||
#define PCI_DEVICE_ID_TDI_EHCI 0x0101
|
||||
|
||||
#define PCI_VENDOR_ID_FREESCALE 0x1957
|
||||
#define PCI_DEVICE_ID_MPC8308 0xc006
|
||||
#define PCI_DEVICE_ID_MPC8315E 0x00b4
|
||||
#define PCI_DEVICE_ID_MPC8315 0x00b5
|
||||
#define PCI_DEVICE_ID_MPC8314E 0x00b6
|
||||
|
|
Загрузка…
Ссылка в новой задаче