MIPS: Kconfig: Enable common clock framework for Malta and SEAD3

Now that we're ready to enable COMMON_CLK for GIC platforms do so for
Malta and SEAD3.  The only other user of the GIC Pistachio does already
do so.

[ralf@linux-mips.org: Rewrite the commit message because applied in the
right order there is no breakage thus no fix required.]

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11038/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Guenter Roeck 2015-08-22 02:40:41 -07:00 коммит произвёл Ralf Baechle
Родитель 67d4e669c1
Коммит 42b002ab73
1 изменённых файлов: 2 добавлений и 0 удалений

Просмотреть файл

@ -409,6 +409,7 @@ config MIPS_MALTA
select CEVT_R4K select CEVT_R4K
select CSRC_R4K select CSRC_R4K
select CLKSRC_MIPS_GIC select CLKSRC_MIPS_GIC
select COMMON_CLK
select DMA_MAYBE_COHERENT select DMA_MAYBE_COHERENT
select GENERIC_ISA_DMA select GENERIC_ISA_DMA
select HAVE_PCSPKR_PLATFORM select HAVE_PCSPKR_PLATFORM
@ -459,6 +460,7 @@ config MIPS_SEAD3
select CEVT_R4K select CEVT_R4K
select CSRC_R4K select CSRC_R4K
select CLKSRC_MIPS_GIC select CLKSRC_MIPS_GIC
select COMMON_CLK
select CPU_MIPSR2_IRQ_VI select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_IRQ_EI select CPU_MIPSR2_IRQ_EI
select DMA_NONCOHERENT select DMA_NONCOHERENT