arm: mach-omap2: hsmmc_reset: fix clk_get() error handling
clk_get() return value should be checked with IS_ERR(). Furthermore, clocks should be put and disabled properly. Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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434c23a7ef
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@ -638,6 +638,7 @@ static struct platform_device dummy_pdev = {
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static void __init omap_hsmmc_reset(void)
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{
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u32 i, nr_controllers;
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struct clk *iclk, *fclk;
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if (cpu_is_omap242x())
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return;
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@ -647,7 +648,6 @@ static void __init omap_hsmmc_reset(void)
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for (i = 0; i < nr_controllers; i++) {
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u32 v, base = 0;
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struct clk *iclk, *fclk;
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struct device *dev = &dummy_pdev.dev;
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switch (i) {
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@ -678,19 +678,16 @@ static void __init omap_hsmmc_reset(void)
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dummy_pdev.id = i;
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dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i);
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iclk = clk_get(dev, "ick");
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if (iclk && clk_enable(iclk))
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iclk = NULL;
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if (IS_ERR(iclk))
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goto err1;
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if (clk_enable(iclk))
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goto err2;
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fclk = clk_get(dev, "fck");
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if (fclk && clk_enable(fclk))
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fclk = NULL;
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if (!iclk || !fclk) {
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printk(KERN_WARNING
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"%s: Unable to enable clocks for MMC%d, "
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"cannot reset.\n", __func__, i);
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break;
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}
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if (IS_ERR(fclk))
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goto err3;
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if (clk_enable(fclk))
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goto err4;
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omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
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v = omap_readl(base + MMCHS_SYSSTATUS);
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@ -698,15 +695,22 @@ static void __init omap_hsmmc_reset(void)
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MMCHS_SYSSTATUS_RESETDONE))
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cpu_relax();
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if (fclk) {
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clk_disable(fclk);
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clk_put(fclk);
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}
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if (iclk) {
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clk_disable(iclk);
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clk_put(iclk);
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}
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clk_disable(fclk);
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clk_put(fclk);
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clk_disable(iclk);
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clk_put(iclk);
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}
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return;
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err4:
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clk_put(fclk);
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err3:
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clk_disable(iclk);
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err2:
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clk_put(iclk);
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err1:
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printk(KERN_WARNING "%s: Unable to enable clocks for MMC%d, "
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"cannot reset.\n", __func__, i);
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}
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#else
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static inline void omap_hsmmc_reset(void) {}
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