regulator: ab8500: Clean out SoC registers
Clean out initialisation that is handled by SoC. Regulator settings for Vpll (partly), Vsmps1, Vsmps2, Vsmps3 (partly), Vrf1, Varm, Vape, Vbb, Vmod are cleaned out. They should not be touched by the kernel. We also update many of the initialisation values to be more in-line with the current development efforts of ST-Ericsson internal engineers. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Lee Jones
Mark Brown
Родитель
fa679523b6
Коммит
43a5911b3d
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@ -139,10 +139,9 @@ static struct regulator_consumer_supply ab8500_vana_consumers[] = {
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static struct ab8500_regulator_reg_init ab8500_reg_init[] = {
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/*
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* VanaRequestCtrl = HP/LP depending on VxRequest
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* VpllRequestCtrl = HP/LP depending on VxRequest
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* VextSupply1RequestCtrl = HP/LP depending on VxRequest
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0xfc, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0xf0, 0x00),
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/*
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* VextSupply2RequestCtrl = HP/LP depending on VxRequest
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* VextSupply3RequestCtrl = HP/LP depending on VxRequest
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@ -156,16 +155,12 @@ static struct ab8500_regulator_reg_init ab8500_reg_init[] = {
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x07, 0x00),
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/*
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* Vsmps1SysClkReq1HPValid = enabled
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* Vsmps2SysClkReq1HPValid = enabled
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* Vsmps3SysClkReq1HPValid = enabled
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* VanaSysClkReq1HPValid = disabled
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* VpllSysClkReq1HPValid = enabled
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* Vaux1SysClkReq1HPValid = disabled
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* Vaux2SysClkReq1HPValid = disabled
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* Vaux3SysClkReq1HPValid = disabled
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0xff, 0x17),
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INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00),
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/*
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* VextSupply1SysClkReq1HPValid = disabled
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* VextSupply2SysClkReq1HPValid = disabled
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@ -252,17 +247,7 @@ static struct ab8500_regulator_reg_init ab8500_reg_init[] = {
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x03, 0x00),
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/*
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* Vsmps1Regu = HW control
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* Vsmps1SelCtrl = Vsmps1 voltage defined by Vsmsp1Sel2
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*/
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INIT_REGULATOR_REGISTER(AB8500_VSMPS1REGU, 0x0f, 0x06),
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/*
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* Vsmps2Regu = HW control
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* Vsmps2SelCtrl = Vsmps2 voltage defined by Vsmsp2Sel2
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*/
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INIT_REGULATOR_REGISTER(AB8500_VSMPS2REGU, 0x0f, 0x06),
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/*
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* VPll = Hw controlled
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* VPll = Hw controlled (NOTE! PRCMU bits)
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* VanaRegu = force off
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*/
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INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x0f, 0x02),
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@ -285,14 +270,9 @@ static struct ab8500_regulator_reg_init ab8500_reg_init[] = {
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*/
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INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x0f, 0x01),
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/*
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* Vrf1Regu = HW control
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* Vaux3Regu = force off
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*/
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INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x0f, 0x08),
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/*
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* Vsmps1 = 1.15V
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*/
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INIT_REGULATOR_REGISTER(AB8500_VSMPS1SEL1, 0x3f, 0x24),
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INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x03, 0x00),
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/*
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* Vaux1Sel = 2.5 V
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*/
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@ -613,19 +613,10 @@ struct ab8500_reg_init {
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static struct ab8500_reg_init ab8500_reg_init[] = {
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/*
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* 0x03, VarmRequestCtrl
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* 0x0c, VapeRequestCtrl
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* 0x30, Vsmps1RequestCtrl
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* 0xc0, Vsmps2RequestCtrl
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*/
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REG_INIT(AB8500_REGUREQUESTCTRL1, 0x03, 0x03, 0xff),
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/*
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* 0x03, Vsmps3RequestCtrl
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* 0x0c, VpllRequestCtrl
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* 0x30, VanaRequestCtrl
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* 0xc0, VextSupply1RequestCtrl
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*/
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REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xff),
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REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xf0),
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/*
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* 0x03, VextSupply2RequestCtrl
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* 0x0c, VextSupply3RequestCtrl
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@ -639,91 +630,74 @@ static struct ab8500_reg_init ab8500_reg_init[] = {
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*/
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REG_INIT(AB8500_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
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/*
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* 0x01, Vsmps1SysClkReq1HPValid
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* 0x02, Vsmps2SysClkReq1HPValid
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* 0x04, Vsmps3SysClkReq1HPValid
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* 0x08, VanaSysClkReq1HPValid
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* 0x10, VpllSysClkReq1HPValid
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* 0x20, Vaux1SysClkReq1HPValid
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* 0x40, Vaux2SysClkReq1HPValid
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* 0x80, Vaux3SysClkReq1HPValid
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*/
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REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
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REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
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/*
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* 0x01, VapeSysClkReq1HPValid
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* 0x02, VarmSysClkReq1HPValid
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* 0x04, VbbSysClkReq1HPValid
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* 0x08, VmodSysClkReq1HPValid
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* 0x10, VextSupply1SysClkReq1HPValid
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* 0x20, VextSupply2SysClkReq1HPValid
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* 0x40, VextSupply3SysClkReq1HPValid
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*/
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REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x7f),
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REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
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/*
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* 0x01, Vsmps1HwHPReq1Valid
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* 0x02, Vsmps2HwHPReq1Valid
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* 0x04, Vsmps3HwHPReq1Valid
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* 0x08, VanaHwHPReq1Valid
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* 0x10, VpllHwHPReq1Valid
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* 0x20, Vaux1HwHPReq1Valid
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* 0x40, Vaux2HwHPReq1Valid
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* 0x80, Vaux3HwHPReq1Valid
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*/
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REG_INIT(AB8500_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xff),
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REG_INIT(AB8500_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xe8),
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/*
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* 0x01, VextSupply1HwHPReq1Valid
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* 0x02, VextSupply2HwHPReq1Valid
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* 0x04, VextSupply3HwHPReq1Valid
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* 0x08, VmodHwHPReq1Valid
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*/
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REG_INIT(AB8500_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x0f),
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REG_INIT(AB8500_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x07),
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/*
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* 0x01, Vsmps1HwHPReq2Valid
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* 0x02, Vsmps2HwHPReq2Valid
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* 0x03, Vsmps3HwHPReq2Valid
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* 0x08, VanaHwHPReq2Valid
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* 0x10, VpllHwHPReq2Valid
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* 0x20, Vaux1HwHPReq2Valid
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* 0x40, Vaux2HwHPReq2Valid
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* 0x80, Vaux3HwHPReq2Valid
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*/
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REG_INIT(AB8500_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xff),
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REG_INIT(AB8500_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xe8),
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/*
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* 0x01, VextSupply1HwHPReq2Valid
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* 0x02, VextSupply2HwHPReq2Valid
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* 0x04, VextSupply3HwHPReq2Valid
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* 0x08, VmodHwHPReq2Valid
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*/
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REG_INIT(AB8500_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x0f),
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REG_INIT(AB8500_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x07),
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/*
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* 0x01, VapeSwHPReqValid
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* 0x02, VarmSwHPReqValid
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* 0x04, Vsmps1SwHPReqValid
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* 0x08, Vsmps2SwHPReqValid
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* 0x10, Vsmps3SwHPReqValid
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* 0x20, VanaSwHPReqValid
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* 0x40, VpllSwHPReqValid
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* 0x80, Vaux1SwHPReqValid
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*/
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REG_INIT(AB8500_REGUSWHPREQVALID1, 0x03, 0x0d, 0xff),
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REG_INIT(AB8500_REGUSWHPREQVALID1, 0x03, 0x0d, 0xa0),
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/*
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* 0x01, Vaux2SwHPReqValid
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* 0x02, Vaux3SwHPReqValid
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* 0x04, VextSupply1SwHPReqValid
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* 0x08, VextSupply2SwHPReqValid
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* 0x10, VextSupply3SwHPReqValid
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* 0x20, VmodSwHPReqValid
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*/
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REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x3f),
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REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x1f),
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/*
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* 0x02, SysClkReq2Valid1
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* ...
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* 0x04, SysClkReq3Valid1
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* 0x08, SysClkReq4Valid1
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* 0x10, SysClkReq5Valid1
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* 0x20, SysClkReq6Valid1
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* 0x40, SysClkReq7Valid1
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* 0x80, SysClkReq8Valid1
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*/
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REG_INIT(AB8500_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe),
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/*
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* 0x02, SysClkReq2Valid2
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* ...
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* 0x04, SysClkReq3Valid2
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* 0x08, SysClkReq4Valid2
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* 0x10, SysClkReq5Valid2
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* 0x20, SysClkReq6Valid2
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* 0x40, SysClkReq7Valid2
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* 0x80, SysClkReq8Valid2
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*/
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REG_INIT(AB8500_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe),
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@ -748,21 +722,7 @@ static struct ab8500_reg_init ab8500_reg_init[] = {
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*/
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REG_INIT(AB8500_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
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/*
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* 0x03, Vsmps1Regu
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* 0x0c, Vsmps1SelCtrl
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* 0x10, Vsmps1AutoMode
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* 0x20, Vsmps1PWMMode
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*/
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REG_INIT(AB8500_VSMPS1REGU, 0x04, 0x03, 0x3f),
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/*
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* 0x03, Vsmps2Regu
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* 0x0c, Vsmps2SelCtrl
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* 0x10, Vsmps2AutoMode
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* 0x20, Vsmps2PWMMode
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*/
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REG_INIT(AB8500_VSMPS2REGU, 0x04, 0x04, 0x3f),
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/*
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* 0x03, VpllRegu
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* 0x03, VpllRegu (NOTE! PRCMU register bits)
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* 0x0c, VanaRegu
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*/
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REG_INIT(AB8500_VPLLVANAREGU, 0x04, 0x06, 0x0f),
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@ -785,14 +745,9 @@ static struct ab8500_reg_init ab8500_reg_init[] = {
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*/
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REG_INIT(AB8500_VAUX12REGU, 0x04, 0x09, 0x0f),
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/*
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* 0x0c, Vrf1Regu
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* 0x03, Vaux3Regu
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*/
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REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x0f),
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/*
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* 0x3f, Vsmps1Sel1
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*/
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REG_INIT(AB8500_VSMPS1SEL1, 0x04, 0x13, 0x3f),
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REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x03),
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/*
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* 0x0f, Vaux1Sel
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*/
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@ -803,16 +758,13 @@ static struct ab8500_reg_init ab8500_reg_init[] = {
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REG_INIT(AB8500_VAUX2SEL, 0x04, 0x20, 0x0f),
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/*
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* 0x07, Vaux3Sel
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* 0x30, Vrf1Sel
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*/
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REG_INIT(AB8500_VRF1VAUX3SEL, 0x04, 0x21, 0x37),
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REG_INIT(AB8500_VRF1VAUX3SEL, 0x04, 0x21, 0x07),
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/*
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* 0x01, VextSupply12LP
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*/
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REG_INIT(AB8500_REGUCTRL2SPARE, 0x04, 0x22, 0x01),
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/*
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* 0x01, VpllDisch
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* 0x02, Vrf1Disch
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* 0x04, Vaux1Disch
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* 0x08, Vaux2Disch
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* 0x10, Vaux3Disch
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@ -820,15 +772,13 @@ static struct ab8500_reg_init ab8500_reg_init[] = {
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* 0x40, VTVoutDisch
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* 0x80, VaudioDisch
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*/
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REG_INIT(AB8500_REGUCTRLDISCH, 0x04, 0x43, 0xff),
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REG_INIT(AB8500_REGUCTRLDISCH, 0x04, 0x43, 0xfc),
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/*
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* 0x01, VsimDisch
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* 0x02, VanaDisch
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* 0x04, VdmicPullDownEna
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* 0x08, VpllPullDownEna
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* 0x10, VdmicDisch
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*/
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REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x1f),
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REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
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};
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static int ab8500_regulator_init_registers(struct platform_device *pdev,
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@ -61,7 +61,6 @@ struct ab8500_regulator_reg_init {
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/* AB8500 registers */
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enum ab8500_regulator_reg {
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AB8500_REGUREQUESTCTRL1,
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AB8500_REGUREQUESTCTRL2,
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AB8500_REGUREQUESTCTRL3,
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AB8500_REGUREQUESTCTRL4,
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@ -78,22 +77,11 @@ enum ab8500_regulator_reg {
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AB8500_REGUMISC1,
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AB8500_VAUDIOSUPPLY,
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AB8500_REGUCTRL1VAMIC,
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AB8500_VSMPS1REGU,
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AB8500_VSMPS2REGU,
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AB8500_VSMPS3REGU, /* NOTE! PRCMU register */
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AB8500_VPLLVANAREGU,
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AB8500_VREFDDR,
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AB8500_EXTSUPPLYREGU,
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AB8500_VAUX12REGU,
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AB8500_VRF1VAUX3REGU,
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AB8500_VSMPS1SEL1,
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AB8500_VSMPS1SEL2,
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AB8500_VSMPS1SEL3,
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AB8500_VSMPS2SEL1,
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AB8500_VSMPS2SEL2,
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AB8500_VSMPS2SEL3,
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AB8500_VSMPS3SEL1, /* NOTE! PRCMU register */
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AB8500_VSMPS3SEL2, /* NOTE! PRCMU register */
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AB8500_VAUX1SEL,
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AB8500_VAUX2SEL,
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AB8500_VRF1VAUX3SEL,
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