Merge 'upstream-2.6.13' branch of rsync://rsync.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
This commit is contained in:
Linus Torvalds
Коммит
43fde784a6
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@ -39,7 +39,7 @@
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#include <asm/io.h>
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#define DRV_NAME "ahci"
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#define DRV_VERSION "1.00"
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#define DRV_VERSION "1.01"
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enum {
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@ -50,6 +50,7 @@ enum {
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AHCI_CMD_SLOT_SZ = 32 * 32,
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AHCI_RX_FIS_SZ = 256,
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AHCI_CMD_TBL_HDR = 0x80,
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AHCI_CMD_TBL_CDB = 0x40,
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AHCI_CMD_TBL_SZ = AHCI_CMD_TBL_HDR + (AHCI_MAX_SG * 16),
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AHCI_PORT_PRIV_DMA_SZ = AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_SZ +
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AHCI_RX_FIS_SZ,
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@ -134,6 +135,9 @@ enum {
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PORT_CMD_ICC_ACTIVE = (0x1 << 28), /* Put i/f in active state */
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PORT_CMD_ICC_PARTIAL = (0x2 << 28), /* Put i/f in partial state */
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PORT_CMD_ICC_SLUMBER = (0x6 << 28), /* Put i/f in slumber state */
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/* hpriv->flags bits */
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AHCI_FLAG_MSI = (1 << 0),
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};
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struct ahci_cmd_hdr {
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@ -183,6 +187,7 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc);
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static u8 ahci_check_status(struct ata_port *ap);
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static u8 ahci_check_err(struct ata_port *ap);
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static inline int ahci_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
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static void ahci_remove_one (struct pci_dev *pdev);
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static Scsi_Host_Template ahci_sht = {
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.module = THIS_MODULE,
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@ -272,7 +277,7 @@ static struct pci_driver ahci_pci_driver = {
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.name = DRV_NAME,
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.id_table = ahci_pci_tbl,
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.probe = ahci_init_one,
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.remove = ata_pci_remove_one,
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.remove = ahci_remove_one,
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};
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@ -506,7 +511,8 @@ static void ahci_fill_sg(struct ata_queued_cmd *qc)
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static void ahci_qc_prep(struct ata_queued_cmd *qc)
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{
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struct ahci_port_priv *pp = qc->ap->private_data;
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struct ata_port *ap = qc->ap;
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struct ahci_port_priv *pp = ap->private_data;
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u32 opts;
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const u32 cmd_fis_len = 5; /* five dwords */
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@ -518,18 +524,8 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc)
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opts = (qc->n_elem << 16) | cmd_fis_len;
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if (qc->tf.flags & ATA_TFLAG_WRITE)
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opts |= AHCI_CMD_WRITE;
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switch (qc->tf.protocol) {
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case ATA_PROT_ATAPI:
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case ATA_PROT_ATAPI_NODATA:
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case ATA_PROT_ATAPI_DMA:
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if (is_atapi_taskfile(&qc->tf))
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opts |= AHCI_CMD_ATAPI;
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break;
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default:
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/* do nothing */
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break;
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}
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pp->cmd_slot[0].opts = cpu_to_le32(opts);
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pp->cmd_slot[0].status = 0;
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@ -541,6 +537,10 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc)
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* a SATA Register - Host to Device command FIS.
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*/
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ata_tf_to_fis(&qc->tf, pp->cmd_tbl, 0);
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if (opts & AHCI_CMD_ATAPI) {
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memset(pp->cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32);
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memcpy(pp->cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, ap->cdb_len);
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}
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if (!(qc->flags & ATA_QCFLAG_DMAMAP))
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return;
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@ -795,8 +795,6 @@ static int ahci_host_init(struct ata_probe_ent *probe_ent)
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return rc;
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}
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}
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hpriv->flags |= HOST_CAP_64;
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} else {
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rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
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if (rc) {
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@ -879,15 +877,19 @@ static int ahci_host_init(struct ata_probe_ent *probe_ent)
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}
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/* move to PCI layer, integrate w/ MSI stuff */
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static void pci_enable_intx(struct pci_dev *pdev)
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static void pci_intx(struct pci_dev *pdev, int enable)
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{
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u16 pci_command;
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u16 pci_command, new;
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pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
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if (pci_command & PCI_COMMAND_INTX_DISABLE) {
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pci_command &= ~PCI_COMMAND_INTX_DISABLE;
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if (enable)
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new = pci_command & ~PCI_COMMAND_INTX_DISABLE;
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else
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new = pci_command | PCI_COMMAND_INTX_DISABLE;
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if (new != pci_command)
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pci_write_config_word(pdev, PCI_COMMAND, pci_command);
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}
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}
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static void ahci_print_info(struct ata_probe_ent *probe_ent)
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@ -969,7 +971,7 @@ static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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unsigned long base;
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void *mmio_base;
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unsigned int board_idx = (unsigned int) ent->driver_data;
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int pci_dev_busy = 0;
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int have_msi, pci_dev_busy = 0;
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int rc;
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VPRINTK("ENTER\n");
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@ -987,12 +989,17 @@ static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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goto err_out;
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}
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pci_enable_intx(pdev);
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if (pci_enable_msi(pdev) == 0)
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have_msi = 1;
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else {
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pci_intx(pdev, 1);
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have_msi = 0;
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}
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probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
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if (probe_ent == NULL) {
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rc = -ENOMEM;
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goto err_out_regions;
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goto err_out_msi;
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}
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memset(probe_ent, 0, sizeof(*probe_ent));
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@ -1025,6 +1032,9 @@ static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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probe_ent->mmio_base = mmio_base;
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probe_ent->private_data = hpriv;
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if (have_msi)
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hpriv->flags |= AHCI_FLAG_MSI;
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/* initialize adapter */
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rc = ahci_host_init(probe_ent);
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if (rc)
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@ -1044,7 +1054,11 @@ err_out_iounmap:
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iounmap(mmio_base);
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err_out_free_ent:
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kfree(probe_ent);
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err_out_regions:
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err_out_msi:
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if (have_msi)
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pci_disable_msi(pdev);
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else
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pci_intx(pdev, 0);
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pci_release_regions(pdev);
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err_out:
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if (!pci_dev_busy)
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@ -1052,6 +1066,42 @@ err_out:
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return rc;
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}
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static void ahci_remove_one (struct pci_dev *pdev)
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{
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struct device *dev = pci_dev_to_dev(pdev);
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struct ata_host_set *host_set = dev_get_drvdata(dev);
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struct ahci_host_priv *hpriv = host_set->private_data;
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struct ata_port *ap;
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unsigned int i;
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int have_msi;
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for (i = 0; i < host_set->n_ports; i++) {
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ap = host_set->ports[i];
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scsi_remove_host(ap->host);
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}
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have_msi = hpriv->flags & AHCI_FLAG_MSI;
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free_irq(host_set->irq, host_set);
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for (i = 0; i < host_set->n_ports; i++) {
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ap = host_set->ports[i];
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ata_scsi_release(ap->host);
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scsi_host_put(ap->host);
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}
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host_set->ops->host_stop(host_set);
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kfree(host_set);
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if (have_msi)
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pci_disable_msi(pdev);
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else
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pci_intx(pdev, 0);
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pci_release_regions(pdev);
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pci_disable_device(pdev);
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dev_set_drvdata(dev, NULL);
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}
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static int __init ahci_init(void)
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{
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@ -1295,6 +1295,37 @@ err_out:
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DPRINTK("EXIT, err\n");
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}
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static inline u8 ata_dev_knobble(struct ata_port *ap)
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{
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return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
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}
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/**
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* ata_dev_config - Run device specific handlers and check for
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* SATA->PATA bridges
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* @ap: Bus
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* @i: Device
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*
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* LOCKING:
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*/
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void ata_dev_config(struct ata_port *ap, unsigned int i)
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{
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/* limit bridge transfers to udma5, 200 sectors */
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if (ata_dev_knobble(ap)) {
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printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
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ap->id, ap->device->devno);
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ap->udma_mask &= ATA_UDMA5;
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ap->host->max_sectors = ATA_MAX_SECTORS;
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ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
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ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
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}
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if (ap->ops->dev_config)
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ap->ops->dev_config(ap, &ap->device[i]);
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}
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/**
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* ata_bus_probe - Reset and probe ATA bus
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* @ap: Bus to probe
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@ -1322,8 +1353,7 @@ static int ata_bus_probe(struct ata_port *ap)
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ata_dev_identify(ap, i);
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if (ata_dev_present(&ap->device[i])) {
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found = 1;
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if (ap->ops->dev_config)
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ap->ops->dev_config(ap, &ap->device[i]);
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ata_dev_config(ap,i);
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}
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}
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@ -4406,6 +4436,7 @@ EXPORT_SYMBOL_GPL(ata_scsi_release);
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EXPORT_SYMBOL_GPL(ata_host_intr);
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EXPORT_SYMBOL_GPL(ata_dev_classify);
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EXPORT_SYMBOL_GPL(ata_dev_id_string);
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EXPORT_SYMBOL_GPL(ata_dev_config);
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EXPORT_SYMBOL_GPL(ata_scsi_simulate);
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#ifdef CONFIG_PCI
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|
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@ -59,6 +59,7 @@ enum {
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board_2037x = 0, /* FastTrak S150 TX2plus */
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board_20319 = 1, /* FastTrak S150 TX4 */
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board_20619 = 2, /* FastTrak TX4000 */
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PDC_HAS_PATA = (1 << 1), /* PDC20375 has PATA */
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@ -147,6 +148,17 @@ static struct ata_port_info pdc_port_info[] = {
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.udma_mask = 0x7f, /* udma0-6 ; FIXME */
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.port_ops = &pdc_ata_ops,
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},
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/* board_20619 */
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{
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.sht = &pdc_ata_sht,
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.host_flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SRST |
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ATA_FLAG_MMIO | ATA_FLAG_SLAVE_POSS,
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.pio_mask = 0x1f, /* pio0-4 */
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.mwdma_mask = 0x07, /* mwdma0-2 */
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.udma_mask = 0x7f, /* udma0-6 ; FIXME */
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.port_ops = &pdc_ata_ops,
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},
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};
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|
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static struct pci_device_id pdc_ata_pci_tbl[] = {
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@ -172,6 +184,9 @@ static struct pci_device_id pdc_ata_pci_tbl[] = {
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{ PCI_VENDOR_ID_PROMISE, 0x3d18, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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board_20319 },
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{ PCI_VENDOR_ID_PROMISE, 0x6629, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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board_20619 },
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{ } /* terminate list */
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};
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|
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@ -636,6 +651,15 @@ static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *e
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case board_2037x:
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probe_ent->n_ports = 2;
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break;
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case board_20619:
|
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probe_ent->n_ports = 4;
|
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|
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pdc_ata_setup_port(&probe_ent->port[2], base + 0x300);
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pdc_ata_setup_port(&probe_ent->port[3], base + 0x380);
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probe_ent->port[2].scr_addr = base + 0x600;
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probe_ent->port[3].scr_addr = base + 0x700;
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break;
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default:
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BUG();
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break;
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|
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@ -676,7 +700,7 @@ static void __exit pdc_ata_exit(void)
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|
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|
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MODULE_AUTHOR("Jeff Garzik");
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MODULE_DESCRIPTION("Promise SATA TX2/TX4 low-level driver");
|
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MODULE_DESCRIPTION("Promise ATA TX2/TX4/TX4000 low-level driver");
|
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MODULE_LICENSE("GPL");
|
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MODULE_DEVICE_TABLE(pci, pdc_ata_pci_tbl);
|
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MODULE_VERSION(DRV_VERSION);
|
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|
|
|
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|
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@ -49,7 +49,7 @@
|
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#endif /* CONFIG_PPC_OF */
|
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|
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#define DRV_NAME "sata_svw"
|
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#define DRV_VERSION "1.05"
|
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#define DRV_VERSION "1.06"
|
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|
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/* Taskfile registers offsets */
|
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#define K2_SATA_TF_CMD_OFFSET 0x00
|
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|
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@ -344,6 +344,7 @@ static int k2_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *e
|
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void *mmio_base;
|
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int pci_dev_busy = 0;
|
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int rc;
|
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int i;
|
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|
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if (!printed_version++)
|
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printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
|
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|
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@ -421,11 +422,11 @@ static int k2_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *e
|
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probe_ent->mwdma_mask = 0x7;
|
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probe_ent->udma_mask = 0x7f;
|
||||
|
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/* We have 4 ports per PCI function */
|
||||
k2_sata_setup_port(&probe_ent->port[0], base + 0 * K2_SATA_PORT_OFFSET);
|
||||
k2_sata_setup_port(&probe_ent->port[1], base + 1 * K2_SATA_PORT_OFFSET);
|
||||
k2_sata_setup_port(&probe_ent->port[2], base + 2 * K2_SATA_PORT_OFFSET);
|
||||
k2_sata_setup_port(&probe_ent->port[3], base + 3 * K2_SATA_PORT_OFFSET);
|
||||
/* different controllers have different number of ports - currently 4 or 8 */
|
||||
/* All ports are on the same function. Multi-function device is no
|
||||
* longer available. This should not be seen in any system. */
|
||||
for (i = 0; i < ent->driver_data; i++)
|
||||
k2_sata_setup_port(&probe_ent->port[i], base + i * K2_SATA_PORT_OFFSET);
|
||||
|
||||
pci_set_master(pdev);
|
||||
|
||||
|
|
@ -445,11 +446,17 @@ err_out:
|
|||
return rc;
|
||||
}
|
||||
|
||||
|
||||
/* 0x240 is device ID for Apple K2 device
|
||||
* 0x241 is device ID for Serverworks Frodo4
|
||||
* 0x242 is device ID for Serverworks Frodo8
|
||||
* 0x24a is device ID for BCM5785 (aka HT1000) HT southbridge integrated SATA
|
||||
* controller
|
||||
* */
|
||||
static struct pci_device_id k2_sata_pci_tbl[] = {
|
||||
{ 0x1166, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
|
||||
{ 0x1166, 0x0241, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
|
||||
{ 0x1166, 0x0242, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
|
||||
{ 0x1166, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
|
||||
{ 0x1166, 0x0241, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
|
||||
{ 0x1166, 0x0242, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
|
||||
{ 0x1166, 0x024a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
|
||||
{ }
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -224,6 +224,7 @@ struct ata_taskfile {
|
|||
};
|
||||
|
||||
#define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0)
|
||||
#define ata_id_is_sata(id) ((id)[93] == 0)
|
||||
#define ata_id_rahead_enabled(id) ((id)[85] & (1 << 6))
|
||||
#define ata_id_wcache_enabled(id) ((id)[85] & (1 << 5))
|
||||
#define ata_id_has_flush(id) ((id)[83] & (1 << 12))
|
||||
|
|
|
|||
|
|
@ -421,6 +421,7 @@ extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
|
|||
extern unsigned int ata_dev_classify(struct ata_taskfile *tf);
|
||||
extern void ata_dev_id_string(u16 *id, unsigned char *s,
|
||||
unsigned int ofs, unsigned int len);
|
||||
extern void ata_dev_config(struct ata_port *ap, unsigned int i);
|
||||
extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
|
||||
extern void ata_bmdma_start (struct ata_queued_cmd *qc);
|
||||
extern void ata_bmdma_stop(struct ata_port *ap);
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