rt2x00: Move Move pci_dev specific access to rt2x00pci
pci_dev->irq and pci_name(pci_dev) access should be limited to rt2x00pci only. This is more generic and allows a rt2x00 pci driver to be controlled as PCI device but also as platform driver (needed for rt2800pci SoC support). Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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32c1628f15
Коммит
440ddadaee
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@ -1361,7 +1361,7 @@ static int rt2400pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
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*/
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value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
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rt2x00pci_register_read(rt2x00dev, CSR0, ®);
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rt2x00_set_chip(rt2x00dev, RT2460, value, reg);
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rt2x00_set_chip_rf(rt2x00dev, value, reg);
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if (!rt2x00_rf(&rt2x00dev->chip, RF2420) &&
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!rt2x00_rf(&rt2x00dev->chip, RF2421)) {
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@ -1525,7 +1525,7 @@ static int rt2500pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
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*/
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value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
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rt2x00pci_register_read(rt2x00dev, CSR0, ®);
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rt2x00_set_chip(rt2x00dev, RT2560, value, reg);
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rt2x00_set_chip_rf(rt2x00dev, value, reg);
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if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
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!rt2x00_rf(&rt2x00dev->chip, RF2523) &&
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@ -671,6 +671,12 @@ struct rt2x00_dev {
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*/
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unsigned long flags;
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/*
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* Device information, Bus IRQ and name (PCI, SoC)
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*/
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int irq;
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const char *name;
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/*
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* Chipset identification.
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*/
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@ -860,6 +866,18 @@ static inline void rt2x00_set_chip(struct rt2x00_dev *rt2x00dev,
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rt2x00dev->chip.rev = rev;
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}
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static inline void rt2x00_set_chip_rt(struct rt2x00_dev *rt2x00dev,
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const u16 rt)
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{
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rt2x00dev->chip.rt = rt;
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}
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static inline void rt2x00_set_chip_rf(struct rt2x00_dev *rt2x00dev,
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const u16 rf, const u32 rev)
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{
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rt2x00_set_chip(rt2x00dev, rt2x00dev->chip.rt, rf, rev);
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}
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static inline char rt2x00_rt(const struct rt2x00_chip *chipset, const u16 chip)
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{
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return (chipset->rt == chip);
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@ -170,7 +170,6 @@ static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
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int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
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{
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struct pci_dev *pci_dev = to_pci_dev(rt2x00dev->dev);
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struct data_queue *queue;
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int status;
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@ -186,11 +185,11 @@ int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
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/*
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* Register interrupt handler.
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*/
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status = request_irq(pci_dev->irq, rt2x00dev->ops->lib->irq_handler,
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IRQF_SHARED, pci_name(pci_dev), rt2x00dev);
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status = request_irq(rt2x00dev->irq, rt2x00dev->ops->lib->irq_handler,
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IRQF_SHARED, rt2x00dev->name, rt2x00dev);
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if (status) {
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ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
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pci_dev->irq, status);
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rt2x00dev->irq, status);
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goto exit;
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}
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@ -270,6 +269,7 @@ int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
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struct ieee80211_hw *hw;
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struct rt2x00_dev *rt2x00dev;
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int retval;
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u16 chip;
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retval = pci_request_regions(pci_dev, pci_name(pci_dev));
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if (retval) {
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@ -307,6 +307,14 @@ int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
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rt2x00dev->dev = &pci_dev->dev;
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rt2x00dev->ops = ops;
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rt2x00dev->hw = hw;
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rt2x00dev->irq = pci_dev->irq;
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rt2x00dev->name = pci_name(pci_dev);
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/*
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* Determine RT chipset by reading PCI header.
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*/
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pci_read_config_word(pci_dev, PCI_DEVICE_ID, &chip);
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rt2x00_set_chip_rt(rt2x00dev, chip);
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retval = rt2x00pci_alloc_reg(rt2x00dev);
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if (retval)
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@ -2308,7 +2308,6 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
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u32 reg;
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u16 value;
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u16 eeprom;
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u16 device;
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/*
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* Read EEPROM word for configuration.
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@ -2317,14 +2316,10 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
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/*
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* Identify RF chipset.
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* To determine the RT chip we have to read the
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* PCI header of the device.
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*/
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pci_read_config_word(to_pci_dev(rt2x00dev->dev),
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PCI_CONFIG_HEADER_DEVICE, &device);
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value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
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rt2x00pci_register_read(rt2x00dev, MAC_CSR0, ®);
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rt2x00_set_chip(rt2x00dev, device, value, reg);
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rt2x00_set_chip_rf(rt2x00dev, value, reg);
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if (!rt2x00_rf(&rt2x00dev->chip, RF5225) &&
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!rt2x00_rf(&rt2x00dev->chip, RF5325) &&
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@ -62,12 +62,6 @@
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* PCI registers.
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*/
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/*
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* PCI Configuration Header
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*/
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#define PCI_CONFIG_HEADER_VENDOR 0x0000
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#define PCI_CONFIG_HEADER_DEVICE 0x0002
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/*
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* HOST_CMD_CSR: For HOST to interrupt embedded processor
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*/
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