clk: exynos4: Remove remnants of non-DT support
This patch simplifies a bit clock initialization code by removing remnants of non-DT clock initialization, such as reg_base and xom values passed in function parameters. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Родитель
38dbfb59d1
Коммит
442f4948e5
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@ -908,12 +908,13 @@ static unsigned long exynos4_get_xom(void)
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return xom;
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}
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static void __init exynos4_clk_register_finpll(unsigned long xom)
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static void __init exynos4_clk_register_finpll(void)
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{
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struct samsung_fixed_rate_clock fclk;
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struct clk *clk;
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unsigned long finpll_f = 24000000;
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char *parent_name;
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unsigned int xom = exynos4_get_xom();
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parent_name = xom & 1 ? "xusbxti" : "xxti";
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clk = clk_get(NULL, parent_name);
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@ -1038,9 +1039,10 @@ static struct samsung_pll_clock exynos4x12_plls[nr_plls] __initdata = {
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/* register exynos4 clocks */
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static void __init exynos4_clk_init(struct device_node *np,
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enum exynos4_soc exynos4_soc,
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void __iomem *reg_base, unsigned long xom)
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enum exynos4_soc exynos4_soc)
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{
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void __iomem *reg_base;
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reg_base = of_iomap(np, 0);
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if (!reg_base)
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panic("%s: failed to map registers\n", __func__);
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@ -1058,7 +1060,7 @@ static void __init exynos4_clk_init(struct device_node *np,
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ARRAY_SIZE(exynos4_fixed_rate_ext_clks),
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ext_clk_match);
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exynos4_clk_register_finpll(xom);
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exynos4_clk_register_finpll();
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if (exynos4_soc == EXYNOS4210) {
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samsung_clk_register_mux(exynos4210_mux_early,
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@ -1136,12 +1138,12 @@ static void __init exynos4_clk_init(struct device_node *np,
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static void __init exynos4210_clk_init(struct device_node *np)
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{
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exynos4_clk_init(np, EXYNOS4210, NULL, exynos4_get_xom());
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exynos4_clk_init(np, EXYNOS4210);
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}
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CLK_OF_DECLARE(exynos4210_clk, "samsung,exynos4210-clock", exynos4210_clk_init);
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static void __init exynos4412_clk_init(struct device_node *np)
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{
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exynos4_clk_init(np, EXYNOS4X12, NULL, exynos4_get_xom());
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exynos4_clk_init(np, EXYNOS4X12);
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}
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CLK_OF_DECLARE(exynos4412_clk, "samsung,exynos4412-clock", exynos4412_clk_init);
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