AB8500 device tree conversion and the deletion of all

pin-related configuration from the Ux500 board files.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJS+etTAAoJEEEQszewGV1zDgUP/3ERZLEipA94foNp+kD+iD2p
 Jj1uJCmTuEaPZ7J8PbbXredDlPZ5+PRcmPhHRhHzpf261LvKmoRxSrGgBX1V7ktc
 9NhzjgxiVlk4nS2UEwsebgwIs3r0VpCqukBvKlODAEZvDBhA+QjkBbVcAGgvx5kx
 MCdI/MxWzxEDB/NdgLYMNMabWtLTGrfvqp07kkGV3NITU6Xp4PeEMKBAgycoiD7q
 ZoI7AnS3sOcNYL9dIHAlvu0CtJSzvpBkO2jqFjbAmTKFWF13qOHADsax1mGult4g
 0BCjQiVCuuUfFENMiRps+HA9HQa2creBvd6p5DpwHWDXxDoWbeRCDGesKbECgw5p
 r7iRldcs/6ZJ/EWXAwKp/SVMQHtmmsInP5EHdfj75HdWGUDP64rzDBvJnB5Ar28l
 ZltSxDaFCor1GSTl/8EUDH9wrQkx4v0jG4vm1ZlzJizStTqNMeLNQkokvfj3qp3g
 UalNIGGS8fcQRtWt11xwFPSwZDd/qXdLKkLII3YUfUvomuAtSWzx/TqeJx9nki+b
 qAqOomlfF+zEhcYPhsNKkBmD3lRnQoOjsQbSj1ZvSAsfd8OLKKQ2T7197UezugKz
 7WbR98gFUkuLwl2JG1TgEhskYFVWL587mnRKADMTqhyDKmuxRk5twPlsLGTFKYzY
 Vd1a/Bte3udj0+l2TCK2
 =GPK5
 -----END PGP SIGNATURE-----

Merge tag 'ab8500-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt

Merge "Ux500 DT conversion" from Linus Walleij:

AB8500 device tree conversion and the deletion of all pin-related
configuration from the Ux500 board files.

* tag 'ab8500-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: ux500: move last AB8505 set-up to DT
  ARM: ux500: move AB8500 clock out pins to DT
  ARM: ux500: move AB8500 modem I2C settings to DT
  ARM: ux500: move AB8500 EXTCPENA from board file to DT
  ARM: ux500: move AB8500 DMIC settings to DT
  ARM: ux500: move AB8500 USB UICC settings to DT
  ARM: ux500: move AB8500 audio interface 1 settings to DT
  ARM: ux500: move AB8500 PWM out settings to device tree
  ARM: ux500: move AB8500 YCBCR settings to device tree
  ARM: ux500: move AB8500 GPIOs to device tree

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2014-02-20 00:53:56 -08:00
Родитель 11dd54384b 77ad9dfc2c
Коммит 447e3295b7
9 изменённых файлов: 671 добавлений и 306 удалений

Просмотреть файл

@ -0,0 +1,428 @@
/*
* Copyright 2014 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/ {
soc {
prcmu@80157000 {
ab8500 {
ab8500-gpio {
/* Hog a few default settings */
pinctrl-names = "default";
pinctrl-0 = <&gpio2_default_mode>,
<&gpio4_default_mode>,
<&gpio10_default_mode>,
<&gpio11_default_mode>,
<&gpio12_default_mode>,
<&gpio13_default_mode>,
<&gpio16_default_mode>,
<&gpio24_default_mode>,
<&gpio25_default_mode>,
<&gpio36_default_mode>,
<&gpio37_default_mode>,
<&gpio38_default_mode>,
<&gpio39_default_mode>,
<&gpio42_default_mode>,
<&gpio26_default_mode>,
<&gpio35_default_mode>,
<&ycbcr_default_mode>,
<&pwm_default_mode>,
<&adi1_default_mode>,
<&usbuicc_default_mode>,
<&dmic_default_mode>,
<&extcpena_default_mode>,
<&modsclsda_default_mode>;
/*
* Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42
* are muxed in as GPIO, and configured as INPUT PULL DOWN
*/
gpio2 {
gpio2_default_mode: gpio2_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio2_a_1";
};
default_cfg {
ste,pins = "GPIO2_T9";
input-enable;
bias-pull-down;
};
};
};
gpio4 {
gpio4_default_mode: gpio4_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio4_a_1";
};
default_cfg {
ste,pins = "GPIO4_W2";
input-enable;
bias-pull-down;
};
};
};
gpio10 {
gpio10_default_mode: gpio10_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio10_d_1";
};
default_cfg {
ste,pins = "GPIO10_U17";
input-enable;
bias-pull-down;
};
};
};
gpio11 {
gpio11_default_mode: gpio11_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio11_d_1";
};
default_cfg {
ste,pins = "GPIO11_AA18";
input-enable;
bias-pull-down;
};
};
};
gpio12 {
gpio12_default_mode: gpio12_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio12_d_1";
};
default_cfg {
ste,pins = "GPIO12_U16";
input-enable;
bias-pull-down;
};
};
};
gpio13 {
gpio13_default_mode: gpio13_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio13_d_1";
};
default_cfg {
ste,pins = "GPIO13_W17";
input-enable;
bias-pull-down;
};
};
};
gpio16 {
gpio16_default_mode: gpio16_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio16_a_1";
};
default_cfg {
ste,pins = "GPIO16_F15";
input-enable;
bias-pull-down;
};
};
};
gpio24 {
gpio24_default_mode: gpio24_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio24_a_1";
};
default_cfg {
ste,pins = "GPIO24_T14";
input-enable;
bias-pull-down;
};
};
};
gpio25 {
gpio25_default_mode: gpio25_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio25_a_1";
};
default_cfg {
ste,pins = "GPIO25_R16";
input-enable;
bias-pull-down;
};
};
};
gpio36 {
gpio36_default_mode: gpio36_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio36_a_1";
};
default_cfg {
ste,pins = "GPIO36_A17";
input-enable;
bias-pull-down;
};
};
};
gpio37 {
gpio37_default_mode: gpio37_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio37_a_1";
};
default_cfg {
ste,pins = "GPIO37_E15";
input-enable;
bias-pull-down;
};
};
};
gpio38 {
gpio38_default_mode: gpio38_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio38_a_1";
};
default_cfg {
ste,pins = "GPIO38_C17";
input-enable;
bias-pull-down;
};
};
};
gpio39 {
gpio39_default_mode: gpio39_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio39_a_1";
};
default_cfg {
ste,pins = "GPIO39_E16";
input-enable;
bias-pull-down;
};
};
};
gpio42 {
gpio42_default_mode: gpio42_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio42_a_1";
};
default_cfg {
ste,pins = "GPIO42_U2";
input-enable;
bias-pull-down;
};
};
};
/*
* Pins 26 and 35 muxed in as GPIO, and configured as OUTPUT LOW
*/
gpio26 {
gpio26_default_mode: gpio26_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio26_d_1";
};
default_cfg {
ste,pins = "GPIO26_M16";
output-low;
};
};
};
gpio35 {
gpio35_default_mode: gpio35_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio35_d_1";
};
default_cfg {
ste,pins = "GPIO35_W15";
output-low;
};
};
};
/*
* This sets up the YCBCR connector pins, i.e. analog video out.
* Set as input with no bias.
*/
ycbcr {
ycbcr_default_mode: ycbcr_default {
default_mux {
ste,function = "ycbcr";
ste,pins = "ycbcr0123_d_1";
};
default_cfg {
ste,pins = "GPIO6_Y18",
"GPIO7_AA20",
"GPIO8_W18",
"GPIO9_AA19";
input-enable;
bias-disable;
};
};
};
/* This sets up the PWM pins 14 and 15 */
pwm {
pwm_default_mode: pwm_default {
default_mux {
ste,function = "pwmout";
ste,pins = "pwmout1_d_1", "pwmout2_d_1";
};
default_cfg {
ste,pins = "GPIO14_F14",
"GPIO15_B17";
input-enable;
bias-pull-down;
};
};
};
/* This sets up audio interface 1 */
adi1 {
adi1_default_mode: adi1_default {
default_mux {
ste,function = "adi1";
ste,pins = "adi1_d_1";
};
default_cfg {
ste,pins = "GPIO17_P5",
"GPIO18_R5",
"GPIO19_U5",
"GPIO20_T5";
input-enable;
bias-pull-down;
};
};
};
/* This sets up the USB UICC pins */
usbuicc {
usbuicc_default_mode: usbuicc_default {
default_mux {
ste,function = "usbuicc";
ste,pins = "usbuicc_d_1";
};
default_cfg {
ste,pins = "GPIO21_H19",
"GPIO22_G20",
"GPIO23_G19";
input-enable;
bias-pull-down;
};
};
};
/* This sets up the microphone pins */
dmic {
dmic_default_mode: dmic_default {
default_mux {
ste,function = "dmic";
ste,pins = "dmic12_d_1",
"dmic34_d_1",
"dmic56_d_1";
};
default_cfg {
ste,pins = "GPIO27_J6",
"GPIO28_K6",
"GPIO29_G6",
"GPIO30_H6",
"GPIO31_F5",
"GPIO32_G5";
input-enable;
bias-pull-down;
};
};
};
extcpena {
extcpena_default_mode: extcpena_default {
default_mux {
ste,function = "extcpena";
ste,pins = "extcpena_d_1";
};
default_cfg {
ste,pins = "GPIO34_R17";
input-enable;
bias-pull-down;
};
};
};
/* Modem I2C setup (SCL and SDA pins) */
modsclsda {
modsclsda_default_mode: modsclsda_default {
default_mux {
ste,function = "modsclsda";
ste,pins = "modsclsda_d_1";
};
default_cfg {
ste,pins = "GPIO40_T19",
"GPIO41_U19";
input-enable;
bias-pull-down;
};
};
};
/*
* Clock output pins associated with regulators.
*/
sysclkreq2 {
sysclkreq2_default_mode: sysclkreq2_default {
default_mux {
ste,function = "sysclkreq";
ste,pins = "sysclkreq2_d_1";
};
default_cfg {
ste,pins = "GPIO1_T10";
input-enable;
bias-disable;
};
};
sysclkreq2_sleep_mode: sysclkreq2_sleep {
default_mux {
ste,function = "gpio";
ste,pins = "gpio1_a_1";
};
default_cfg {
ste,pins = "GPIO1_T10";
input-enable;
bias-pull-down;
};
};
};
sysclkreq4 {
sysclkreq4_default_mode: sysclkreq4_default {
default_mux {
ste,function = "sysclkreq";
ste,pins = "sysclkreq4_d_1";
};
default_cfg {
ste,pins = "GPIO3_U9";
input-enable;
bias-disable;
};
};
sysclkreq4_sleep_mode: sysclkreq4_sleep {
default_mux {
ste,function = "gpio";
ste,pins = "gpio3_a_1";
};
default_cfg {
ste,pins = "GPIO3_U9";
input-enable;
bias-pull-down;
};
};
};
};
};
};
};
};

Просмотреть файл

@ -0,0 +1,240 @@
/*
* Copyright 2014 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/ {
soc {
prcmu@80157000 {
ab8505 {
ab8505-gpio {
/* Hog a few default settings */
pinctrl-names = "default";
pinctrl-0 = <&gpio2_default_mode>,
<&gpio10_default_mode>,
<&gpio11_default_mode>,
<&gpio13_default_mode>,
<&gpio34_default_mode>,
<&gpio50_default_mode>,
<&pwm_default_mode>,
<&adi2_default_mode>,
<&modsclsda_default_mode>,
<&resethw_default_mode>,
<&service_default_mode>;
/*
* Pins 2, 10, 11, 13, 34 and 50
* are muxed in as GPIO, and configured as INPUT PULL DOWN
*/
gpio2 {
gpio2_default_mode: gpio2_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio2_a_1";
};
default_cfg {
ste,pins = "GPIO2_R5";
input-enable;
bias-pull-down;
};
};
};
gpio10 {
gpio10_default_mode: gpio10_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio10_d_1";
};
default_cfg {
ste,pins = "GPIO10_B16";
input-enable;
bias-pull-down;
};
};
};
gpio11 {
gpio11_default_mode: gpio11_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio11_d_1";
};
default_cfg {
ste,pins = "GPIO11_B17";
input-enable;
bias-pull-down;
};
};
};
gpio13 {
gpio13_default_mode: gpio13_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio13_d_1";
};
default_cfg {
ste,pins = "GPIO13_D17";
input-enable;
bias-disable;
};
};
};
gpio34 {
gpio34_default_mode: gpio34_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio34_a_1";
};
default_cfg {
ste,pins = "GPIO34_H14";
input-enable;
bias-pull-down;
};
};
};
gpio50 {
gpio50_default_mode: gpio50_default {
default_mux {
ste,function = "gpio";
ste,pins = "gpio50_d_1";
};
default_cfg {
ste,pins = "GPIO50_L4";
input-enable;
bias-disable;
};
};
};
/* This sets up the PWM pin 14 */
pwm {
pwm_default_mode: pwm_default {
default_mux {
ste,function = "pwmout";
ste,pins = "pwmout1_d_1";
};
default_cfg {
ste,pins = "GPIO14_C16";
input-enable;
bias-pull-down;
};
};
};
/* This sets up audio interface 2 */
adi2 {
adi2_default_mode: adi2_default {
default_mux {
ste,function = "adi2";
ste,pins = "adi2_d_1";
};
default_cfg {
ste,pins = "GPIO17_P2",
"GPIO18_N3",
"GPIO19_T1",
"GPIO20_P3";
input-enable;
bias-pull-down;
};
};
};
/* Modem I2C setup (SCL and SDA pins) */
modsclsda {
modsclsda_default_mode: modsclsda_default {
default_mux {
ste,function = "modsclsda";
ste,pins = "modsclsda_d_1";
};
default_cfg {
ste,pins = "GPIO40_J15",
"GPIO41_J14";
input-enable;
bias-pull-down;
};
};
};
resethw {
resethw_default_mode: resethw_default {
default_mux {
ste,function = "resethw";
ste,pins = "resethw_d_1";
};
default_cfg {
ste,pins = "GPIO52_D16";
input-enable;
bias-pull-down;
};
};
};
service {
service_default_mode: service_default {
default_mux {
ste,function = "service";
ste,pins = "service_d_1";
};
default_cfg {
ste,pins = "GPIO53_D15";
input-enable;
bias-pull-down;
};
};
};
/*
* Clock output pins associated with regulators.
*/
sysclkreq2 {
sysclkreq2_default_mode: sysclkreq2_default {
default_mux {
ste,function = "sysclkreq";
ste,pins = "sysclkreq2_d_1";
};
default_cfg {
ste,pins = "GPIO1_N4";
input-enable;
bias-disable;
};
};
sysclkreq2_sleep_mode: sysclkreq2_sleep {
default_mux {
ste,function = "gpio";
ste,pins = "gpio1_a_1";
};
default_cfg {
ste,pins = "GPIO1_N4";
input-enable;
bias-pull-down;
};
};
};
sysclkreq4 {
sysclkreq4_default_mode: sysclkreq4_default {
default_mux {
ste,function = "sysclkreq";
ste,pins = "sysclkreq4_d_1";
};
default_cfg {
ste,pins = "GPIO3_P5";
input-enable;
bias-disable;
};
};
sysclkreq4_sleep_mode: sysclkreq4_sleep {
default_mux {
ste,function = "gpio";
ste,pins = "gpio3_a_1";
};
default_cfg {
ste,pins = "GPIO3_P5";
input-enable;
bias-pull-down;
};
};
};
};
};
};
};
};

Просмотреть файл

@ -12,6 +12,7 @@
*/
#include "ste-dbx5x0.dtsi"
#include "ste-href-ab8500.dtsi"
#include "ste-href.dtsi"
/ {

Просмотреть файл

@ -10,6 +10,7 @@
*/
#include "ste-dbx5x0.dtsi"
#include "ste-href-ab8500.dtsi"
#include "ste-href.dtsi"
/ {

Просмотреть файл

@ -11,6 +11,7 @@
/dts-v1/;
#include "ste-dbx5x0.dtsi"
#include "ste-href-ab8500.dtsi"
#include "ste-href-family-pinctrl.dtsi"
/ {

Просмотреть файл

@ -7,7 +7,6 @@ obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o
obj-$(CONFIG_MACH_MOP500) += board-mop500-sdi.o \
board-mop500-regulators.o \
board-mop500-pins.o \
board-mop500-audio.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o

Просмотреть файл

@ -1,291 +0,0 @@
/*
* Copyright (C) ST-Ericsson SA 2010
*
* License terms: GNU General Public License (GPL) version 2
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/bug.h>
#include <linux/string.h>
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <asm/mach-types.h>
#include "board-mop500.h"
/* These simply sets bias for pins */
#define BIAS(a,b) static unsigned long a[] = { b }
BIAS(abx500_out_lo, PIN_CONF_PACKED(PIN_CONFIG_OUTPUT, 0));
BIAS(abx500_in_pd, PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 1));
BIAS(abx500_in_nopull, PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 0));
#define AB8500_MUX_HOG(group, func) \
PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-ab8500.0", group, func)
#define AB8500_PIN_HOG(pin, conf) \
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-ab8500.0", pin, abx500_##conf)
#define AB8500_MUX_STATE(group, func, dev, state) \
PIN_MAP_MUX_GROUP(dev, state, "pinctrl-ab8500.0", group, func)
#define AB8500_PIN_STATE(pin, conf, dev, state) \
PIN_MAP_CONFIGS_PIN(dev, state, "pinctrl-ab8500.0", pin, abx500_##conf)
#define AB8505_MUX_HOG(group, func) \
PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-ab8505.0", group, func)
#define AB8505_PIN_HOG(pin, conf) \
PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-ab8505.0", pin, abx500_##conf)
#define AB8505_MUX_STATE(group, func, dev, state) \
PIN_MAP_MUX_GROUP(dev, state, "pinctrl-ab8505.0", group, func)
#define AB8505_PIN_STATE(pin, conf, dev, state) \
PIN_MAP_CONFIGS_PIN(dev, state, "pinctrl-ab8505.0", pin, abx500_##conf)
static struct pinctrl_map __initdata ab8500_pinmap[] = {
/* Sysclkreq2 */
AB8500_MUX_STATE("sysclkreq2_d_1", "sysclkreq", "regulator.35", PINCTRL_STATE_DEFAULT),
AB8500_PIN_STATE("GPIO1_T10", in_nopull, "regulator.35", PINCTRL_STATE_DEFAULT),
/* sysclkreq2 disable, mux in gpio configured in input pulldown */
AB8500_MUX_STATE("gpio1_a_1", "gpio", "regulator.35", PINCTRL_STATE_SLEEP),
AB8500_PIN_STATE("GPIO1_T10", in_pd, "regulator.35", PINCTRL_STATE_SLEEP),
/* pins 2 is muxed in GPIO, configured in INPUT PULL DOWN */
AB8500_MUX_HOG("gpio2_a_1", "gpio"),
AB8500_PIN_HOG("GPIO2_T9", in_pd),
/* Sysclkreq4 */
AB8500_MUX_STATE("sysclkreq4_d_1", "sysclkreq", "regulator.36", PINCTRL_STATE_DEFAULT),
AB8500_PIN_STATE("GPIO3_U9", in_nopull, "regulator.36", PINCTRL_STATE_DEFAULT),
/* sysclkreq4 disable, mux in gpio configured in input pulldown */
AB8500_MUX_STATE("gpio3_a_1", "gpio", "regulator.36", PINCTRL_STATE_SLEEP),
AB8500_PIN_STATE("GPIO3_U9", in_pd, "regulator.36", PINCTRL_STATE_SLEEP),
/* pins 4 is muxed in GPIO, configured in INPUT PULL DOWN */
AB8500_MUX_HOG("gpio4_a_1", "gpio"),
AB8500_PIN_HOG("GPIO4_W2", in_pd),
/*
* pins 6,7,8 and 9 are muxed in YCBCR0123
* configured in INPUT PULL UP
*/
AB8500_MUX_HOG("ycbcr0123_d_1", "ycbcr"),
AB8500_PIN_HOG("GPIO6_Y18", in_nopull),
AB8500_PIN_HOG("GPIO7_AA20", in_nopull),
AB8500_PIN_HOG("GPIO8_W18", in_nopull),
AB8500_PIN_HOG("GPIO9_AA19", in_nopull),
/*
* pins 10,11,12 and 13 are muxed in GPIO
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("gpio10_d_1", "gpio"),
AB8500_PIN_HOG("GPIO10_U17", in_pd),
AB8500_MUX_HOG("gpio11_d_1", "gpio"),
AB8500_PIN_HOG("GPIO11_AA18", in_pd),
AB8500_MUX_HOG("gpio12_d_1", "gpio"),
AB8500_PIN_HOG("GPIO12_U16", in_pd),
AB8500_MUX_HOG("gpio13_d_1", "gpio"),
AB8500_PIN_HOG("GPIO13_W17", in_pd),
/*
* pins 14,15 are muxed in PWM1 and PWM2
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("pwmout1_d_1", "pwmout"),
AB8500_PIN_HOG("GPIO14_F14", in_pd),
AB8500_MUX_HOG("pwmout2_d_1", "pwmout"),
AB8500_PIN_HOG("GPIO15_B17", in_pd),
/*
* pins 16 is muxed in GPIO
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("gpio16_a_1", "gpio"),
AB8500_PIN_HOG("GPIO14_F14", in_pd),
/*
* pins 17,18,19 and 20 are muxed in AUDIO interface 1
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("adi1_d_1", "adi1"),
AB8500_PIN_HOG("GPIO17_P5", in_pd),
AB8500_PIN_HOG("GPIO18_R5", in_pd),
AB8500_PIN_HOG("GPIO19_U5", in_pd),
AB8500_PIN_HOG("GPIO20_T5", in_pd),
/*
* pins 21,22 and 23 are muxed in USB UICC
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("usbuicc_d_1", "usbuicc"),
AB8500_PIN_HOG("GPIO21_H19", in_pd),
AB8500_PIN_HOG("GPIO22_G20", in_pd),
AB8500_PIN_HOG("GPIO23_G19", in_pd),
/*
* pins 24,25 are muxed in GPIO
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("gpio24_a_1", "gpio"),
AB8500_PIN_HOG("GPIO24_T14", in_pd),
AB8500_MUX_HOG("gpio25_a_1", "gpio"),
AB8500_PIN_HOG("GPIO25_R16", in_pd),
/*
* pins 26 is muxed in GPIO
* configured in OUTPUT LOW
*/
AB8500_MUX_HOG("gpio26_d_1", "gpio"),
AB8500_PIN_HOG("GPIO26_M16", out_lo),
/*
* pins 27,28 are muxed in DMIC12
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("dmic12_d_1", "dmic"),
AB8500_PIN_HOG("GPIO27_J6", in_pd),
AB8500_PIN_HOG("GPIO28_K6", in_pd),
/*
* pins 29,30 are muxed in DMIC34
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("dmic34_d_1", "dmic"),
AB8500_PIN_HOG("GPIO29_G6", in_pd),
AB8500_PIN_HOG("GPIO30_H6", in_pd),
/*
* pins 31,32 are muxed in DMIC56
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("dmic56_d_1", "dmic"),
AB8500_PIN_HOG("GPIO31_F5", in_pd),
AB8500_PIN_HOG("GPIO32_G5", in_pd),
/*
* pins 34 is muxed in EXTCPENA
* configured INPUT PULL DOWN
*/
AB8500_MUX_HOG("extcpena_d_1", "extcpena"),
AB8500_PIN_HOG("GPIO34_R17", in_pd),
/*
* pins 35 is muxed in GPIO
* configured in OUTPUT LOW
*/
AB8500_MUX_HOG("gpio35_d_1", "gpio"),
AB8500_PIN_HOG("GPIO35_W15", in_pd),
/*
* pins 36,37,38 and 39 are muxed in GPIO
* configured in INPUT PULL DOWN
*/
AB8500_MUX_HOG("gpio36_a_1", "gpio"),
AB8500_PIN_HOG("GPIO36_A17", in_pd),
AB8500_MUX_HOG("gpio37_a_1", "gpio"),
AB8500_PIN_HOG("GPIO37_E15", in_pd),
AB8500_MUX_HOG("gpio38_a_1", "gpio"),
AB8500_PIN_HOG("GPIO38_C17", in_pd),
AB8500_MUX_HOG("gpio39_a_1", "gpio"),
AB8500_PIN_HOG("GPIO39_E16", in_pd),
/*
* pins 40 and 41 are muxed in MODCSLSDA
* configured INPUT PULL DOWN
*/
AB8500_MUX_HOG("modsclsda_d_1", "modsclsda"),
AB8500_PIN_HOG("GPIO40_T19", in_pd),
AB8500_PIN_HOG("GPIO41_U19", in_pd),
/*
* pins 42 is muxed in GPIO
* configured INPUT PULL DOWN
*/
AB8500_MUX_HOG("gpio42_a_1", "gpio"),
AB8500_PIN_HOG("GPIO42_U2", in_pd),
};
static struct pinctrl_map __initdata ab8505_pinmap[] = {
/* Sysclkreq2 */
AB8505_MUX_STATE("sysclkreq2_d_1", "sysclkreq", "regulator.36", PINCTRL_STATE_DEFAULT),
AB8505_PIN_STATE("GPIO1_N4", in_nopull, "regulator.36", PINCTRL_STATE_DEFAULT),
/* sysclkreq2 disable, mux in gpio configured in input pulldown */
AB8505_MUX_STATE("gpio1_a_1", "gpio", "regulator.36", PINCTRL_STATE_SLEEP),
AB8505_PIN_STATE("GPIO1_N4", in_pd, "regulator.36", PINCTRL_STATE_SLEEP),
/* pins 2 is muxed in GPIO, configured in INPUT PULL DOWN */
AB8505_MUX_HOG("gpio2_a_1", "gpio"),
AB8505_PIN_HOG("GPIO2_R5", in_pd),
/* Sysclkreq4 */
AB8505_MUX_STATE("sysclkreq4_d_1", "sysclkreq", "regulator.37", PINCTRL_STATE_DEFAULT),
AB8505_PIN_STATE("GPIO3_P5", in_nopull, "regulator.37", PINCTRL_STATE_DEFAULT),
/* sysclkreq4 disable, mux in gpio configured in input pulldown */
AB8505_MUX_STATE("gpio3_a_1", "gpio", "regulator.37", PINCTRL_STATE_SLEEP),
AB8505_PIN_STATE("GPIO3_P5", in_pd, "regulator.37", PINCTRL_STATE_SLEEP),
AB8505_MUX_HOG("gpio10_d_1", "gpio"),
AB8505_PIN_HOG("GPIO10_B16", in_pd),
AB8505_MUX_HOG("gpio11_d_1", "gpio"),
AB8505_PIN_HOG("GPIO11_B17", in_pd),
AB8505_MUX_HOG("gpio13_d_1", "gpio"),
AB8505_PIN_HOG("GPIO13_D17", in_nopull),
AB8505_MUX_HOG("pwmout1_d_1", "pwmout"),
AB8505_PIN_HOG("GPIO14_C16", in_pd),
AB8505_MUX_HOG("adi2_d_1", "adi2"),
AB8505_PIN_HOG("GPIO17_P2", in_pd),
AB8505_PIN_HOG("GPIO18_N3", in_pd),
AB8505_PIN_HOG("GPIO19_T1", in_pd),
AB8505_PIN_HOG("GPIO20_P3", in_pd),
AB8505_MUX_HOG("gpio34_a_1", "gpio"),
AB8505_PIN_HOG("GPIO34_H14", in_pd),
AB8505_MUX_HOG("modsclsda_d_1", "modsclsda"),
AB8505_PIN_HOG("GPIO40_J15", in_pd),
AB8505_PIN_HOG("GPIO41_J14", in_pd),
AB8505_MUX_HOG("gpio50_d_1", "gpio"),
AB8505_PIN_HOG("GPIO50_L4", in_nopull),
AB8505_MUX_HOG("resethw_d_1", "resethw"),
AB8505_PIN_HOG("GPIO52_D16", in_pd),
AB8505_MUX_HOG("service_d_1", "service"),
AB8505_PIN_HOG("GPIO53_D15", in_pd),
};
void __init mop500_pinmaps_init(void)
{
if (machine_is_u8520())
pinctrl_register_mappings(ab8505_pinmap,
ARRAY_SIZE(ab8505_pinmap));
else
pinctrl_register_mappings(ab8500_pinmap,
ARRAY_SIZE(ab8500_pinmap));
}
void __init snowball_pinmaps_init(void)
{
pinctrl_register_mappings(ab8500_pinmap,
ARRAY_SIZE(ab8500_pinmap));
}
void __init hrefv60_pinmaps_init(void)
{
pinctrl_register_mappings(ab8500_pinmap,
ARRAY_SIZE(ab8500_pinmap));
}

Просмотреть файл

@ -88,8 +88,4 @@ extern struct msp_i2s_platform_data msp1_platform_data;
extern struct msp_i2s_platform_data msp2_platform_data;
extern struct msp_i2s_platform_data msp3_platform_data;
void __init mop500_pinmaps_init(void);
void __init snowball_pinmaps_init(void);
void __init hrefv60_pinmaps_init(void);
#endif

Просмотреть файл

@ -191,16 +191,6 @@ static void __init u8500_init_machine(void)
{
struct device *parent = db8500_soc_device_init();
/* Pinmaps must be in place before devices register */
if (of_machine_is_compatible("st-ericsson,mop500"))
mop500_pinmaps_init();
else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
snowball_pinmaps_init();
} else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
hrefv60_pinmaps_init();
else if (of_machine_is_compatible("st-ericsson,ccu9540")) {}
/* TODO: Add pinmaps for ccu9540 board. */
/* automatically probe child nodes of dbx5x0 devices */
if (of_machine_is_compatible("st-ericsson,u8540"))
of_platform_populate(NULL, u8500_local_bus_nodes,