Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (28 commits) powerpc: Fix oops when loading modules powerpc: Wire up preadv and pwritev powerpc/ftrace: Fix printf format warning powerpc/ftrace: Fix #if that should be #ifdef powerpc: Fix ptrace compat wrapper for FPU register access powerpc: Print information about mapping hw irqs to virtual irqs powerpc: Correct dependency of KEXEC powerpc: Disable VSX or current process in giveup_fpu/altivec powerpc/pseries: Enable relay in pseries_defconfig powerpc/pseries: Fix ibm,client-architecture comment powerpc/pseries: Scan for all events in rtasd powerpc/pseries: Add dispatch dispersion statistics powerpc: Clean up some prom printouts powerpc: Print progress of ibm,client-architecture method powerpc: Remove duplicated #include's powerpc/pmac: Fix internal modem IRQ on Wallstreet PowerBook powerpc/wdrtas: Update wdrtas_get_interval to use rtas_data_buf fsl-diu-fb: Pass the proper device for dma mapping routines powerpc/pq2fads: Update device tree for use with device-tree-aware u-boot. cpm_uart: Disable CPM udbg when re-initing CPM uart, even if not the console. ...
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Коммит
44d84afa83
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@ -316,7 +316,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE
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config KEXEC
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bool "kexec system call (EXPERIMENTAL)"
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depends on BOOK3S && EXPERIMENTAL
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depends on PPC_BOOK3S && EXPERIMENTAL
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help
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kexec is a system call that implements the ability to shutdown your
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current kernel, and to start another kernel. It is like a reboot
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@ -775,6 +775,7 @@ config LOWMEM_CAM_NUM_BOOL
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Say N here unless you know what you are doing.
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config LOWMEM_CAM_NUM
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depends on FSL_BOOKE
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int "Number of CAMs to use to map low memory" if LOWMEM_CAM_NUM_BOOL
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default 3
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@ -57,14 +57,14 @@
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bus-frequency = <0>; /* Fixed by bootwrapper */
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memory-controller@2000 {
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compatible = "fsl,8540-memory-controller";
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compatible = "fsl,mpc8540-memory-controller";
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <0x12 0x2>;
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};
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L2: l2-cache-controller@20000 {
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compatible = "fsl,8540-l2-cache-controller";
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compatible = "fsl,mpc8540-l2-cache-controller";
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reg = <0x20000 0x1000>;
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cache-line-size = <0x20>; /* 32 bytes */
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cache-size = <0x40000>; /* L2, 256K */
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@ -17,6 +17,14 @@
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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ethernet0 = &enet0;
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ethernet1 = &enet1;
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serial0 = &serial0;
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serial1 = &serial1;
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pci0 = &pci0;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -45,7 +53,7 @@
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#size-cells = <1>;
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reg = <0xf0010100 0x60>;
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ranges = <0x0 0x0 0xfe000000 0x800000
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ranges = <0x0 0x0 0xff800000 0x800000
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0x1 0x0 0xf4500000 0x8000
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0x8 0x0 0xf8200000 0x8000>;
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@ -71,7 +79,7 @@
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};
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};
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pci@f0010800 {
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pci0: pci@f0010800 {
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device_type = "pci";
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reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
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compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
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@ -142,7 +150,7 @@
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reg = <0x119f0 0x10 0x115f0 0x10>;
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};
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serial@11a00 {
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serial0: serial@11a00 {
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device_type = "serial";
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compatible = "fsl,mpc8280-scc-uart",
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"fsl,cpm2-scc-uart";
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@ -153,7 +161,7 @@
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fsl,cpm-command = <0x800000>;
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};
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serial@11a20 {
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serial1: serial@11a20 {
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device_type = "serial";
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compatible = "fsl,mpc8280-scc-uart",
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"fsl,cpm2-scc-uart";
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@ -164,7 +172,7 @@
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fsl,cpm-command = <0x4a00000>;
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};
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ethernet@11320 {
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enet0: ethernet@11320 {
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device_type = "network";
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compatible = "fsl,mpc8280-fcc-enet",
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"fsl,cpm2-fcc-enet";
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@ -176,7 +184,7 @@
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fsl,cpm-command = <0x16200300>;
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};
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ethernet@11340 {
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enet1: ethernet@11340 {
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device_type = "network";
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compatible = "fsl,mpc8280-fcc-enet",
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"fsl,cpm2-fcc-enet";
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@ -156,14 +156,14 @@
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compatible = "simple-bus";
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memory-controller@2000 {
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compatible = "fsl,8548-memory-controller";
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compatible = "fsl,mpc8548-memory-controller";
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <0x12 0x2>;
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};
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L2: l2-cache-controller@20000 {
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compatible = "fsl,8548-l2-cache-controller";
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compatible = "fsl,mpc8548-l2-cache-controller";
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reg = <0x20000 0x1000>;
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cache-line-size = <0x20>; // 32 bytes
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cache-size = <0x80000>; // L2, 512K
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@ -61,14 +61,14 @@
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clock-frequency = <0>;
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memory-controller@2000 {
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compatible = "fsl,8560-memory-controller";
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compatible = "fsl,mpc8560-memory-controller";
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <0x12 0x2>;
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};
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L2: l2-cache-controller@20000 {
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compatible = "fsl,8560-l2-cache-controller";
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compatible = "fsl,mpc8560-l2-cache-controller";
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reg = <0x20000 0x1000>;
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cache-line-size = <0x20>; // 32 bytes
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cache-size = <0x40000>; // L2, 256K
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@ -52,6 +52,7 @@
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soc8544@e0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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ranges = <0x00000000 0xe0000000 0x00100000>;
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reg = <0xe0000000 0x00001000>; // CCSRBAR 1M
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@ -57,14 +57,14 @@
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compatible = "fsl,mpc8560-immr", "simple-bus";
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memory-controller@2000 {
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compatible = "fsl,8540-memory-controller";
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compatible = "fsl,mpc8540-memory-controller";
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <18 2>;
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};
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L2: l2-cache-controller@20000 {
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compatible = "fsl,8540-l2-cache-controller";
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compatible = "fsl,mpc8540-l2-cache-controller";
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reg = <0x20000 0x1000>;
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cache-line-size = <32>;
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cache-size = <0x40000>; // L2, 256K
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@ -59,14 +59,14 @@
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compatible = "fsl,mpc8540-immr", "simple-bus";
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memory-controller@2000 {
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compatible = "fsl,8540-memory-controller";
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compatible = "fsl,mpc8540-memory-controller";
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <18 2>;
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};
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L2: l2-cache-controller@20000 {
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compatible = "fsl,8540-l2-cache-controller";
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compatible = "fsl,mpc8540-l2-cache-controller";
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reg = <0x20000 0x1000>;
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cache-line-size = <32>;
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cache-size = <0x40000>; // L2, 256K
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@ -58,14 +58,14 @@
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compatible = "fsl,mpc8541-immr", "simple-bus";
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memory-controller@2000 {
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compatible = "fsl,8540-memory-controller";
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compatible = "fsl,mpc8540-memory-controller";
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <18 2>;
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};
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L2: l2-cache-controller@20000 {
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compatible = "fsl,8540-l2-cache-controller";
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compatible = "fsl,mpc8540-l2-cache-controller";
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reg = <0x20000 0x1000>;
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cache-line-size = <32>;
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cache-size = <0x40000>; // L2, 256K
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@ -58,14 +58,14 @@
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compatible = "fsl,mpc8555-immr", "simple-bus";
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memory-controller@2000 {
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compatible = "fsl,8540-memory-controller";
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compatible = "fsl,mpc8540-memory-controller";
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <18 2>;
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};
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L2: l2-cache-controller@20000 {
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compatible = "fsl,8540-l2-cache-controller";
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compatible = "fsl,mpc8540-l2-cache-controller";
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reg = <0x20000 0x1000>;
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cache-line-size = <32>;
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cache-size = <0x40000>; // L2, 256K
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@ -60,14 +60,14 @@
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compatible = "fsl,mpc8560-immr", "simple-bus";
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memory-controller@2000 {
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compatible = "fsl,8540-memory-controller";
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compatible = "fsl,mpc8540-memory-controller";
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <18 2>;
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};
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L2: l2-cache-controller@20000 {
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compatible = "fsl,8540-l2-cache-controller";
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compatible = "fsl,mpc8540-l2-cache-controller";
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reg = <0x20000 0x1000>;
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cache-line-size = <32>;
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cache-size = <0x40000>; // L2, 256K
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@ -95,7 +95,7 @@ CONFIG_CGROUP_CPUACCT=y
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CONFIG_SYSFS_DEPRECATED=y
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CONFIG_SYSFS_DEPRECATED_V2=y
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CONFIG_PROC_PID_CPUSET=y
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# CONFIG_RELAY is not set
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CONFIG_RELAY=y
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CONFIG_NAMESPACES=y
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# CONFIG_UTS_NS is not set
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# CONFIG_IPC_NS is not set
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@ -125,7 +125,7 @@ struct lppaca {
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// NOTE: This value will ALWAYS be zero for dedicated processors and
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// will NEVER be zero for shared processors (ie, initialized to a 1).
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volatile u32 yield_count; // PLIC increments each dispatchx00-x03
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u32 reserved6;
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volatile u32 dispersion_count; // dispatch changed phys cpu x04-x07
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volatile u64 cmo_faults; // CMO page fault count x08-x0F
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volatile u64 cmo_fault_time; // CMO page fault time x10-x17
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u8 reserved7[104]; // Reserved x18-x7F
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@ -22,6 +22,14 @@
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#define MPIC_GREG_FEATURE_1 0x00010
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#define MPIC_GREG_GLOBAL_CONF_0 0x00020
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#define MPIC_GREG_GCONF_RESET 0x80000000
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/* On the FSL mpic implementations the Mode field is expand to be
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* 2 bits wide:
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* 0b00 = pass through (interrupts routed to IRQ0)
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* 0b01 = Mixed mode
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* 0b10 = reserved
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* 0b11 = External proxy / coreint
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*/
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#define MPIC_GREG_GCONF_COREINT 0x60000000
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#define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000
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#define MPIC_GREG_GCONF_NO_BIAS 0x10000000
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#define MPIC_GREG_GCONF_BASE_MASK 0x000fffff
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@ -357,6 +365,8 @@ struct mpic
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#define MPIC_BROKEN_FRR_NIRQS 0x00000800
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/* Destination only supports a single CPU at a time */
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#define MPIC_SINGLE_DEST_CPU 0x00001000
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/* Enable CoreInt delivery of interrupts */
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#define MPIC_ENABLE_COREINT 0x00002000
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/* MPIC HW modification ID */
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#define MPIC_REGSET_MASK 0xf0000000
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@ -470,6 +480,8 @@ extern void mpic_end_irq(unsigned int irq);
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extern unsigned int mpic_get_one_irq(struct mpic *mpic);
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/* This one gets from the primary mpic */
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extern unsigned int mpic_get_irq(void);
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/* This one gets from the primary mpic via CoreInt*/
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extern unsigned int mpic_get_coreint_irq(void);
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/* Fetch Machine Check interrupt from primary mpic */
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extern unsigned int mpic_get_mcirq(void);
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@ -21,7 +21,6 @@
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#include <linux/types.h>
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#include <linux/ioctl.h>
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#include <linux/types.h>
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/* ioctl */
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#define PS3FB_IOCTL_SETMODE _IOW('r', 1, int) /* set video mode */
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|
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@ -151,9 +151,11 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
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_PAGE_NO_CACHE)
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#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
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_PAGE_NO_CACHE | _PAGE_GUARDED)
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#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC)
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#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC | \
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_PAGE_HWEXEC)
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#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
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#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC)
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#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC | \
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_PAGE_HWEXEC)
|
||||
|
||||
/* Protection used for kernel text. We want the debuggers to be able to
|
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* set breakpoints anywhere, so don't write protect the kernel text
|
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|
|
@ -143,6 +143,36 @@
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#define FPSCR_NI 0x00000004 /* FPU non IEEE-Mode */
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#define FPSCR_RN 0x00000003 /* FPU rounding control */
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/* Bit definitions for SPEFSCR. */
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#define SPEFSCR_SOVH 0x80000000 /* Summary integer overflow high */
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#define SPEFSCR_OVH 0x40000000 /* Integer overflow high */
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#define SPEFSCR_FGH 0x20000000 /* Embedded FP guard bit high */
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#define SPEFSCR_FXH 0x10000000 /* Embedded FP sticky bit high */
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#define SPEFSCR_FINVH 0x08000000 /* Embedded FP invalid operation high */
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#define SPEFSCR_FDBZH 0x04000000 /* Embedded FP div by zero high */
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#define SPEFSCR_FUNFH 0x02000000 /* Embedded FP underflow high */
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#define SPEFSCR_FOVFH 0x01000000 /* Embedded FP overflow high */
|
||||
#define SPEFSCR_FINXS 0x00200000 /* Embedded FP inexact sticky */
|
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#define SPEFSCR_FINVS 0x00100000 /* Embedded FP invalid op. sticky */
|
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#define SPEFSCR_FDBZS 0x00080000 /* Embedded FP div by zero sticky */
|
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#define SPEFSCR_FUNFS 0x00040000 /* Embedded FP underflow sticky */
|
||||
#define SPEFSCR_FOVFS 0x00020000 /* Embedded FP overflow sticky */
|
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#define SPEFSCR_MODE 0x00010000 /* Embedded FP mode */
|
||||
#define SPEFSCR_SOV 0x00008000 /* Integer summary overflow */
|
||||
#define SPEFSCR_OV 0x00004000 /* Integer overflow */
|
||||
#define SPEFSCR_FG 0x00002000 /* Embedded FP guard bit */
|
||||
#define SPEFSCR_FX 0x00001000 /* Embedded FP sticky bit */
|
||||
#define SPEFSCR_FINV 0x00000800 /* Embedded FP invalid operation */
|
||||
#define SPEFSCR_FDBZ 0x00000400 /* Embedded FP div by zero */
|
||||
#define SPEFSCR_FUNF 0x00000200 /* Embedded FP underflow */
|
||||
#define SPEFSCR_FOVF 0x00000100 /* Embedded FP overflow */
|
||||
#define SPEFSCR_FINXE 0x00000040 /* Embedded FP inexact enable */
|
||||
#define SPEFSCR_FINVE 0x00000020 /* Embedded FP invalid op. enable */
|
||||
#define SPEFSCR_FDBZE 0x00000010 /* Embedded FP div by zero enable */
|
||||
#define SPEFSCR_FUNFE 0x00000008 /* Embedded FP underflow enable */
|
||||
#define SPEFSCR_FOVFE 0x00000004 /* Embedded FP overflow enable */
|
||||
#define SPEFSCR_FRMC 0x00000003 /* Embedded FP rounding mode control */
|
||||
|
||||
/* Special Purpose Registers (SPRNs)*/
|
||||
#define SPRN_CTR 0x009 /* Count Register */
|
||||
#define SPRN_DSCR 0x11
|
||||
|
|
|
@ -423,36 +423,6 @@
|
|||
#define SGR_NORMAL 0 /* Speculative fetching allowed. */
|
||||
#define SGR_GUARDED 1 /* Speculative fetching disallowed. */
|
||||
|
||||
/* Bit definitions for SPEFSCR. */
|
||||
#define SPEFSCR_SOVH 0x80000000 /* Summary integer overflow high */
|
||||
#define SPEFSCR_OVH 0x40000000 /* Integer overflow high */
|
||||
#define SPEFSCR_FGH 0x20000000 /* Embedded FP guard bit high */
|
||||
#define SPEFSCR_FXH 0x10000000 /* Embedded FP sticky bit high */
|
||||
#define SPEFSCR_FINVH 0x08000000 /* Embedded FP invalid operation high */
|
||||
#define SPEFSCR_FDBZH 0x04000000 /* Embedded FP div by zero high */
|
||||
#define SPEFSCR_FUNFH 0x02000000 /* Embedded FP underflow high */
|
||||
#define SPEFSCR_FOVFH 0x01000000 /* Embedded FP overflow high */
|
||||
#define SPEFSCR_FINXS 0x00200000 /* Embedded FP inexact sticky */
|
||||
#define SPEFSCR_FINVS 0x00100000 /* Embedded FP invalid op. sticky */
|
||||
#define SPEFSCR_FDBZS 0x00080000 /* Embedded FP div by zero sticky */
|
||||
#define SPEFSCR_FUNFS 0x00040000 /* Embedded FP underflow sticky */
|
||||
#define SPEFSCR_FOVFS 0x00020000 /* Embedded FP overflow sticky */
|
||||
#define SPEFSCR_MODE 0x00010000 /* Embedded FP mode */
|
||||
#define SPEFSCR_SOV 0x00008000 /* Integer summary overflow */
|
||||
#define SPEFSCR_OV 0x00004000 /* Integer overflow */
|
||||
#define SPEFSCR_FG 0x00002000 /* Embedded FP guard bit */
|
||||
#define SPEFSCR_FX 0x00001000 /* Embedded FP sticky bit */
|
||||
#define SPEFSCR_FINV 0x00000800 /* Embedded FP invalid operation */
|
||||
#define SPEFSCR_FDBZ 0x00000400 /* Embedded FP div by zero */
|
||||
#define SPEFSCR_FUNF 0x00000200 /* Embedded FP underflow */
|
||||
#define SPEFSCR_FOVF 0x00000100 /* Embedded FP overflow */
|
||||
#define SPEFSCR_FINXE 0x00000040 /* Embedded FP inexact enable */
|
||||
#define SPEFSCR_FINVE 0x00000020 /* Embedded FP invalid op. enable */
|
||||
#define SPEFSCR_FDBZE 0x00000010 /* Embedded FP div by zero enable */
|
||||
#define SPEFSCR_FUNFE 0x00000008 /* Embedded FP underflow enable */
|
||||
#define SPEFSCR_FOVFE 0x00000004 /* Embedded FP overflow enable */
|
||||
#define SPEFSCR_FRMC 0x00000003 /* Embedded FP rounding mode control */
|
||||
|
||||
/*
|
||||
* The IBM-403 is an even more odd special case, as it is much
|
||||
* older than the IBM-405 series. We put these down here incase someone
|
||||
|
|
|
@ -68,7 +68,8 @@ struct rtas_t {
|
|||
#define RTAS_EPOW_WARNING 0x40000000 /* set bit 1 */
|
||||
#define RTAS_POWERMGM_EVENTS 0x20000000 /* set bit 2 */
|
||||
#define RTAS_HOTPLUG_EVENTS 0x10000000 /* set bit 3 */
|
||||
#define RTAS_EVENT_SCAN_ALL_EVENTS 0xf0000000
|
||||
#define RTAS_IO_EVENTS 0x08000000 /* set bit 4 */
|
||||
#define RTAS_EVENT_SCAN_ALL_EVENTS 0xffffffff
|
||||
|
||||
/* RTAS event severity */
|
||||
#define RTAS_SEVERITY_FATAL 0x5
|
||||
|
|
|
@ -29,9 +29,9 @@
|
|||
|
||||
/* basic word size definitions */
|
||||
#define _FP_W_TYPE_SIZE 32
|
||||
#define _FP_W_TYPE unsigned long
|
||||
#define _FP_WS_TYPE signed long
|
||||
#define _FP_I_TYPE long
|
||||
#define _FP_W_TYPE unsigned int
|
||||
#define _FP_WS_TYPE signed int
|
||||
#define _FP_I_TYPE int
|
||||
|
||||
#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
|
||||
#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
|
||||
|
|
|
@ -322,3 +322,6 @@ SYSCALL_SPU(epoll_create1)
|
|||
SYSCALL_SPU(dup3)
|
||||
SYSCALL_SPU(pipe2)
|
||||
SYSCALL(inotify_init1)
|
||||
SYSCALL(ni_syscall)
|
||||
COMPAT_SYS_SPU(preadv)
|
||||
COMPAT_SYS_SPU(pwritev)
|
||||
|
|
|
@ -341,10 +341,12 @@
|
|||
#define __NR_dup3 316
|
||||
#define __NR_pipe2 317
|
||||
#define __NR_inotify_init1 318
|
||||
#define __NR_preadv 320
|
||||
#define __NR_pwritev 321
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#define __NR_syscalls 319
|
||||
#define __NR_syscalls 322
|
||||
|
||||
#define __NR__exit __NR_exit
|
||||
#define NR_syscalls __NR_syscalls
|
||||
|
|
|
@ -145,6 +145,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
|
|||
beq 1f
|
||||
PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
|
||||
li r3,MSR_FP|MSR_FE0|MSR_FE1
|
||||
#ifdef CONFIG_VSX
|
||||
BEGIN_FTR_SECTION
|
||||
oris r3,r3,MSR_VSX@h
|
||||
END_FTR_SECTION_IFSET(CPU_FTR_VSX)
|
||||
#endif
|
||||
andc r4,r4,r3 /* disable FP for previous task */
|
||||
PPC_STL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
|
||||
1:
|
||||
|
|
|
@ -293,7 +293,7 @@ __ftrace_make_nop(struct module *mod,
|
|||
if (tramp & 0x8000)
|
||||
tramp -= 0x10000;
|
||||
|
||||
pr_debug(" %x ", tramp);
|
||||
pr_debug(" %lx ", tramp);
|
||||
|
||||
if (tramp != addr) {
|
||||
printk(KERN_ERR
|
||||
|
@ -564,7 +564,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
|
|||
if (unlikely(atomic_read(¤t->tracing_graph_pause)))
|
||||
return;
|
||||
|
||||
#if CONFIG_PPC64
|
||||
#ifdef CONFIG_PPC64
|
||||
/* non core kernel code needs to save and restore the TOC */
|
||||
if (REGION_ID(self_addr) != KERNEL_REGION_ID)
|
||||
return_hooker = (unsigned long)&mod_return_to_handler;
|
||||
|
|
|
@ -672,11 +672,13 @@ unsigned int irq_create_mapping(struct irq_host *host,
|
|||
return NO_IRQ;
|
||||
}
|
||||
}
|
||||
pr_debug("irq: -> obtained virq %d\n", virq);
|
||||
|
||||
if (irq_setup_virq(host, virq, hwirq))
|
||||
return NO_IRQ;
|
||||
|
||||
printk(KERN_DEBUG "irq: irq %lu on host %s mapped to virtual irq %u\n",
|
||||
hwirq, host->of_node ? host->of_node->full_name : "null", virq);
|
||||
|
||||
return virq;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(irq_create_mapping);
|
||||
|
|
|
@ -434,6 +434,21 @@ static void pseries_cmo_data(struct seq_file *m)
|
|||
seq_printf(m, "cmo_page_size=%lu\n", cmo_get_page_size());
|
||||
}
|
||||
|
||||
static void splpar_dispatch_data(struct seq_file *m)
|
||||
{
|
||||
int cpu;
|
||||
unsigned long dispatches = 0;
|
||||
unsigned long dispatch_dispersions = 0;
|
||||
|
||||
for_each_possible_cpu(cpu) {
|
||||
dispatches += lppaca[cpu].yield_count;
|
||||
dispatch_dispersions += lppaca[cpu].dispersion_count;
|
||||
}
|
||||
|
||||
seq_printf(m, "dispatches=%lu\n", dispatches);
|
||||
seq_printf(m, "dispatch_dispersions=%lu\n", dispatch_dispersions);
|
||||
}
|
||||
|
||||
static int pseries_lparcfg_data(struct seq_file *m, void *v)
|
||||
{
|
||||
int partition_potential_processors;
|
||||
|
@ -460,6 +475,7 @@ static int pseries_lparcfg_data(struct seq_file *m, void *v)
|
|||
parse_ppp_data(m);
|
||||
parse_mpp_data(m);
|
||||
pseries_cmo_data(m);
|
||||
splpar_dispatch_data(m);
|
||||
|
||||
seq_printf(m, "purr=%ld\n", get_purr());
|
||||
} else { /* non SPLPAR case */
|
||||
|
|
|
@ -495,7 +495,15 @@ _GLOBAL(giveup_altivec)
|
|||
stvx vr0,r4,r3
|
||||
beq 1f
|
||||
ld r4,_MSR-STACK_FRAME_OVERHEAD(r5)
|
||||
#ifdef CONFIG_VSX
|
||||
BEGIN_FTR_SECTION
|
||||
lis r3,(MSR_VEC|MSR_VSX)@h
|
||||
FTR_SECTION_ELSE
|
||||
lis r3,MSR_VEC@h
|
||||
ALT_FTR_SECTION_END_IFSET(CPU_FTR_VSX)
|
||||
#else
|
||||
lis r3,MSR_VEC@h
|
||||
#endif
|
||||
andc r4,r4,r3 /* disable FP for previous task */
|
||||
std r4,_MSR-STACK_FRAME_OVERHEAD(r5)
|
||||
1:
|
||||
|
|
|
@ -614,7 +614,7 @@ static unsigned char ibm_architecture_vec[] = {
|
|||
W(0xffffffff), /* virt_base */
|
||||
W(0xffffffff), /* virt_size */
|
||||
W(0xffffffff), /* load_base */
|
||||
W(64), /* 128MB min RMA */
|
||||
W(64), /* 64MB min RMA */
|
||||
W(0xffffffff), /* full client load */
|
||||
0, /* min RMA percentage of total RAM */
|
||||
48, /* max log_2(hash table size) */
|
||||
|
@ -732,15 +732,17 @@ static void __init prom_send_capabilities(void)
|
|||
root = call_prom("open", 1, 1, ADDR("/"));
|
||||
if (root != 0) {
|
||||
/* try calling the ibm,client-architecture-support method */
|
||||
prom_printf("Calling ibm,client-architecture...");
|
||||
if (call_prom_ret("call-method", 3, 2, &ret,
|
||||
ADDR("ibm,client-architecture-support"),
|
||||
root,
|
||||
ADDR(ibm_architecture_vec)) == 0) {
|
||||
/* the call exists... */
|
||||
if (ret)
|
||||
prom_printf("WARNING: ibm,client-architecture"
|
||||
prom_printf("\nWARNING: ibm,client-architecture"
|
||||
"-support call FAILED!\n");
|
||||
call_prom("close", 1, 0, root);
|
||||
prom_printf(" done\n");
|
||||
return;
|
||||
}
|
||||
call_prom("close", 1, 0, root);
|
||||
|
@ -1083,7 +1085,7 @@ static void __init prom_instantiate_rtas(void)
|
|||
return;
|
||||
}
|
||||
|
||||
prom_printf("instantiating rtas at 0x%x ...", base);
|
||||
prom_printf("instantiating rtas at 0x%x...", base);
|
||||
|
||||
if (call_prom_ret("call-method", 3, 2, &entry,
|
||||
ADDR("instantiate-rtas"),
|
||||
|
@ -1495,7 +1497,7 @@ static int __init prom_find_machine_type(void)
|
|||
return PLATFORM_GENERIC;
|
||||
x = prom_getproplen(rtas, "ibm,hypertas-functions");
|
||||
if (x != PROM_ERROR) {
|
||||
prom_printf("Hypertas detected, assuming LPAR !\n");
|
||||
prom_debug("Hypertas detected, assuming LPAR !\n");
|
||||
return PLATFORM_PSERIES_LPAR;
|
||||
}
|
||||
return PLATFORM_PSERIES;
|
||||
|
@ -1544,7 +1546,7 @@ static void __init prom_check_displays(void)
|
|||
};
|
||||
const unsigned char *clut;
|
||||
|
||||
prom_printf("Looking for displays\n");
|
||||
prom_debug("Looking for displays\n");
|
||||
for (node = 0; prom_next_node(&node); ) {
|
||||
memset(type, 0, sizeof(type));
|
||||
prom_getprop(node, "device_type", type, sizeof(type));
|
||||
|
@ -1562,7 +1564,7 @@ static void __init prom_check_displays(void)
|
|||
if (call_prom("package-to-path", 3, 1, node, path,
|
||||
PROM_SCRATCH_SIZE-10) == PROM_ERROR)
|
||||
continue;
|
||||
prom_printf("found display : %s, opening ... ", path);
|
||||
prom_printf("found display : %s, opening... ", path);
|
||||
|
||||
ih = call_prom("open", 1, 1, path);
|
||||
if (ih == 0) {
|
||||
|
@ -2387,7 +2389,7 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
|
|||
/*
|
||||
* Now finally create the flattened device-tree
|
||||
*/
|
||||
prom_printf("copying OF device tree ...\n");
|
||||
prom_printf("copying OF device tree...\n");
|
||||
flatten_device_tree();
|
||||
|
||||
/*
|
||||
|
@ -2402,7 +2404,7 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
|
|||
* Call OF "quiesce" method to shut down pending DMA's from
|
||||
* devices etc...
|
||||
*/
|
||||
prom_printf("Calling quiesce ...\n");
|
||||
prom_printf("Calling quiesce...\n");
|
||||
call_prom("quiesce", 0, 0);
|
||||
|
||||
/*
|
||||
|
|
|
@ -67,7 +67,8 @@ static long compat_ptrace_old(struct task_struct *child, long request,
|
|||
/* Macros to workout the correct index for the FPR in the thread struct */
|
||||
#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1)
|
||||
#define FPRHALF(i) (((i) - PT_FPR0) & 1)
|
||||
#define FPRINDEX(i) TS_FPRWIDTH * FPRNUMBER(i) + FPRHALF(i)
|
||||
#define FPRINDEX(i) TS_FPRWIDTH * FPRNUMBER(i) * 2 + FPRHALF(i)
|
||||
#define FPRINDEX_3264(i) (TS_FPRWIDTH * ((i) - PT_FPR0))
|
||||
|
||||
long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
|
||||
compat_ulong_t caddr, compat_ulong_t cdata)
|
||||
|
@ -168,8 +169,9 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
|
|||
CHECK_FULL_REGS(child->thread.regs);
|
||||
if (numReg >= PT_FPR0) {
|
||||
flush_fp_to_thread(child);
|
||||
tmp = ((unsigned long int *)child->thread.fpr)
|
||||
[FPRINDEX(numReg)];
|
||||
/* get 64 bit FPR */
|
||||
tmp = ((u64 *)child->thread.fpr)
|
||||
[FPRINDEX_3264(numReg)];
|
||||
} else { /* register within PT_REGS struct */
|
||||
tmp = ptrace_get_reg(child, numReg);
|
||||
}
|
||||
|
@ -262,8 +264,13 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
|
|||
freg = (freg & 0xfffffffful) | (data << 32);
|
||||
ret = ptrace_put_reg(child, numReg, freg);
|
||||
} else {
|
||||
u64 *tmp;
|
||||
flush_fp_to_thread(child);
|
||||
((unsigned int *)child->thread.regs)[index] = data;
|
||||
/* get 64 bit FPR ... */
|
||||
tmp = &(((u64 *)child->thread.fpr)
|
||||
[FPRINDEX_3264(numReg)]);
|
||||
/* ... write the 32 bit part we want */
|
||||
((u32 *)tmp)[index % 2] = data;
|
||||
ret = 0;
|
||||
}
|
||||
break;
|
||||
|
|
|
@ -36,7 +36,6 @@
|
|||
#include <linux/percpu.h>
|
||||
#include <linux/lmb.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/processor.h>
|
||||
|
|
|
@ -1170,6 +1170,12 @@ struct mpic * __init mpic_alloc(struct device_node *node,
|
|||
mb();
|
||||
}
|
||||
|
||||
/* CoreInt */
|
||||
if (flags & MPIC_ENABLE_COREINT)
|
||||
mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),
|
||||
mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
|
||||
| MPIC_GREG_GCONF_COREINT);
|
||||
|
||||
if (flags & MPIC_ENABLE_MCK)
|
||||
mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),
|
||||
mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
|
||||
|
@ -1525,6 +1531,34 @@ unsigned int mpic_get_irq(void)
|
|||
return mpic_get_one_irq(mpic);
|
||||
}
|
||||
|
||||
unsigned int mpic_get_coreint_irq(void)
|
||||
{
|
||||
#ifdef CONFIG_BOOKE
|
||||
struct mpic *mpic = mpic_primary;
|
||||
u32 src;
|
||||
|
||||
BUG_ON(mpic == NULL);
|
||||
|
||||
src = mfspr(SPRN_EPR);
|
||||
|
||||
if (unlikely(src == mpic->spurious_vec)) {
|
||||
if (mpic->flags & MPIC_SPV_EOI)
|
||||
mpic_eoi(mpic);
|
||||
return NO_IRQ;
|
||||
}
|
||||
if (unlikely(mpic->protected && test_bit(src, mpic->protected))) {
|
||||
if (printk_ratelimit())
|
||||
printk(KERN_WARNING "%s: Got protected source %d !\n",
|
||||
mpic->name, (int)src);
|
||||
return NO_IRQ;
|
||||
}
|
||||
|
||||
return irq_linear_revmap(mpic->irqhost, src);
|
||||
#else
|
||||
return NO_IRQ;
|
||||
#endif
|
||||
}
|
||||
|
||||
unsigned int mpic_get_mcirq(void)
|
||||
{
|
||||
struct mpic *mpic = mpic_primary;
|
||||
|
|
|
@ -1106,6 +1106,10 @@ static int cpm_uart_init_port(struct device_node *np,
|
|||
for (i = 0; i < NUM_GPIOS; i++)
|
||||
pinfo->gpios[i] = of_get_gpio(np, i);
|
||||
|
||||
#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
|
||||
udbg_putc = NULL;
|
||||
#endif
|
||||
|
||||
return cpm_uart_request_port(&pinfo->port);
|
||||
|
||||
out_pram:
|
||||
|
@ -1255,10 +1259,6 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)
|
|||
baud = 9600;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
|
||||
udbg_putc = NULL;
|
||||
#endif
|
||||
|
||||
if (IS_SMC(pinfo)) {
|
||||
out_be16(&pinfo->smcup->smc_brkcr, 0);
|
||||
cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
|
||||
|
@ -1339,13 +1339,13 @@ static int __devinit cpm_uart_probe(struct of_device *ofdev,
|
|||
|
||||
dev_set_drvdata(&ofdev->dev, pinfo);
|
||||
|
||||
/* initialize the device pointer for the port */
|
||||
pinfo->port.dev = &ofdev->dev;
|
||||
|
||||
ret = cpm_uart_init_port(ofdev->node, pinfo);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* initialize the device pointer for the port */
|
||||
pinfo->port.dev = &ofdev->dev;
|
||||
|
||||
return uart_add_one_port(&cpm_reg, &pinfo->port);
|
||||
}
|
||||
|
||||
|
|
|
@ -1538,6 +1538,21 @@ no_dma:
|
|||
uap->port.type = PORT_PMAC_ZILOG;
|
||||
uap->port.flags = 0;
|
||||
|
||||
/*
|
||||
* Fixup for the port on Gatwick for which the device-tree has
|
||||
* missing interrupts. Normally, the macio_dev would contain
|
||||
* fixed up interrupt info, but we use the device-tree directly
|
||||
* here due to early probing so we need the fixup too.
|
||||
*/
|
||||
if (uap->port.irq == NO_IRQ &&
|
||||
np->parent && np->parent->parent &&
|
||||
of_device_is_compatible(np->parent->parent, "gatwick")) {
|
||||
/* IRQs on gatwick are offset by 64 */
|
||||
uap->port.irq = irq_create_mapping(NULL, 64 + 15);
|
||||
uap->tx_dma_irq = irq_create_mapping(NULL, 64 + 4);
|
||||
uap->rx_dma_irq = irq_create_mapping(NULL, 64 + 5);
|
||||
}
|
||||
|
||||
/* Setup some valid baud rate information in the register
|
||||
* shadows so we don't write crap there before baud rate is
|
||||
* first initialized.
|
||||
|
|
|
@ -1352,14 +1352,15 @@ static int fsl_diu_resume(struct of_device *ofdev)
|
|||
#endif /* CONFIG_PM */
|
||||
|
||||
/* Align to 64-bit(8-byte), 32-byte, etc. */
|
||||
static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
|
||||
static int allocate_buf(struct device *dev, struct diu_addr *buf, u32 size,
|
||||
u32 bytes_align)
|
||||
{
|
||||
u32 offset, ssize;
|
||||
u32 mask;
|
||||
dma_addr_t paddr = 0;
|
||||
|
||||
ssize = size + bytes_align;
|
||||
buf->vaddr = dma_alloc_coherent(NULL, ssize, &paddr, GFP_DMA |
|
||||
buf->vaddr = dma_alloc_coherent(dev, ssize, &paddr, GFP_DMA |
|
||||
__GFP_ZERO);
|
||||
if (!buf->vaddr)
|
||||
return -ENOMEM;
|
||||
|
@ -1376,9 +1377,10 @@ static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void free_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
|
||||
static void free_buf(struct device *dev, struct diu_addr *buf, u32 size,
|
||||
u32 bytes_align)
|
||||
{
|
||||
dma_free_coherent(NULL, size + bytes_align,
|
||||
dma_free_coherent(dev, size + bytes_align,
|
||||
buf->vaddr, (buf->paddr - buf->offset));
|
||||
return;
|
||||
}
|
||||
|
@ -1476,17 +1478,19 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev,
|
|||
machine_data->monitor_port = monitor_port;
|
||||
|
||||
/* Area descriptor memory pool aligns to 64-bit boundary */
|
||||
if (allocate_buf(&pool.ad, sizeof(struct diu_ad) * FSL_AOI_NUM, 8))
|
||||
if (allocate_buf(&ofdev->dev, &pool.ad,
|
||||
sizeof(struct diu_ad) * FSL_AOI_NUM, 8))
|
||||
return -ENOMEM;
|
||||
|
||||
/* Get memory for Gamma Table - 32-byte aligned memory */
|
||||
if (allocate_buf(&pool.gamma, 768, 32)) {
|
||||
if (allocate_buf(&ofdev->dev, &pool.gamma, 768, 32)) {
|
||||
ret = -ENOMEM;
|
||||
goto error;
|
||||
}
|
||||
|
||||
/* For performance, cursor bitmap buffer aligns to 32-byte boundary */
|
||||
if (allocate_buf(&pool.cursor, MAX_CURS * MAX_CURS * 2, 32)) {
|
||||
if (allocate_buf(&ofdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
|
||||
32)) {
|
||||
ret = -ENOMEM;
|
||||
goto error;
|
||||
}
|
||||
|
@ -1554,11 +1558,13 @@ error:
|
|||
i > 0; i--)
|
||||
uninstall_fb(machine_data->fsl_diu_info[i - 1]);
|
||||
if (pool.ad.vaddr)
|
||||
free_buf(&pool.ad, sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
|
||||
free_buf(&ofdev->dev, &pool.ad,
|
||||
sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
|
||||
if (pool.gamma.vaddr)
|
||||
free_buf(&pool.gamma, 768, 32);
|
||||
free_buf(&ofdev->dev, &pool.gamma, 768, 32);
|
||||
if (pool.cursor.vaddr)
|
||||
free_buf(&pool.cursor, MAX_CURS * MAX_CURS * 2, 32);
|
||||
free_buf(&ofdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
|
||||
32);
|
||||
if (machine_data->dummy_aoi_virt)
|
||||
fsl_diu_free(machine_data->dummy_aoi_virt, 64);
|
||||
iounmap(dr.diu_reg);
|
||||
|
@ -1584,11 +1590,13 @@ static int fsl_diu_remove(struct of_device *ofdev)
|
|||
for (i = ARRAY_SIZE(machine_data->fsl_diu_info); i > 0; i--)
|
||||
uninstall_fb(machine_data->fsl_diu_info[i - 1]);
|
||||
if (pool.ad.vaddr)
|
||||
free_buf(&pool.ad, sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
|
||||
free_buf(&ofdev->dev, &pool.ad,
|
||||
sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
|
||||
if (pool.gamma.vaddr)
|
||||
free_buf(&pool.gamma, 768, 32);
|
||||
free_buf(&ofdev->dev, &pool.gamma, 768, 32);
|
||||
if (pool.cursor.vaddr)
|
||||
free_buf(&pool.cursor, MAX_CURS * MAX_CURS * 2, 32);
|
||||
free_buf(&ofdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
|
||||
32);
|
||||
if (machine_data->dummy_aoi_virt)
|
||||
fsl_diu_free(machine_data->dummy_aoi_virt, 64);
|
||||
iounmap(dr.diu_reg);
|
||||
|
|
|
@ -106,6 +106,8 @@ static int wdrtas_set_interval(int interval)
|
|||
return result;
|
||||
}
|
||||
|
||||
#define WDRTAS_SP_SPI_LEN 4
|
||||
|
||||
/**
|
||||
* wdrtas_get_interval - returns the current watchdog interval
|
||||
* @fallback_value: value (in seconds) to use, if the RTAS call fails
|
||||
|
@ -119,10 +121,17 @@ static int wdrtas_set_interval(int interval)
|
|||
static int wdrtas_get_interval(int fallback_value)
|
||||
{
|
||||
long result;
|
||||
char value[4];
|
||||
char value[WDRTAS_SP_SPI_LEN];
|
||||
|
||||
spin_lock(&rtas_data_buf_lock);
|
||||
memset(rtas_data_buf, 0, WDRTAS_SP_SPI_LEN);
|
||||
result = rtas_call(wdrtas_token_get_sp, 3, 1, NULL,
|
||||
WDRTAS_SP_SPI, (void *)__pa(&value), 4);
|
||||
WDRTAS_SP_SPI, __pa(rtas_data_buf),
|
||||
WDRTAS_SP_SPI_LEN);
|
||||
|
||||
memcpy(value, rtas_data_buf, WDRTAS_SP_SPI_LEN);
|
||||
spin_unlock(&rtas_data_buf_lock);
|
||||
|
||||
if (value[0] != 0 || value[1] != 2 || value[3] != 0 || result < 0) {
|
||||
printk(KERN_WARNING "wdrtas: could not get sp_spi watchdog "
|
||||
"timeout (%li). Continuing\n", result);
|
||||
|
|
|
@ -18,7 +18,6 @@
|
|||
#define _FSL_DEVICE_H_
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/phy.h>
|
||||
|
||||
/*
|
||||
* Some conventions on how we handle peripherals on Freescale chips
|
||||
|
@ -44,27 +43,6 @@
|
|||
*
|
||||
*/
|
||||
|
||||
struct gianfar_platform_data {
|
||||
/* device specific information */
|
||||
u32 device_flags;
|
||||
char bus_id[BUS_ID_SIZE];
|
||||
phy_interface_t interface;
|
||||
};
|
||||
|
||||
struct gianfar_mdio_data {
|
||||
/* board specific information */
|
||||
int irq[32];
|
||||
};
|
||||
|
||||
/* Flags in gianfar_platform_data */
|
||||
#define FSL_GIANFAR_BRD_HAS_PHY_INTR 0x00000001 /* set or use a timer */
|
||||
#define FSL_GIANFAR_BRD_IS_REDUCED 0x00000002 /* Set if RGMII, RMII */
|
||||
|
||||
struct fsl_i2c_platform_data {
|
||||
/* device specific information */
|
||||
u32 device_flags;
|
||||
};
|
||||
|
||||
/* Flags related to I2C device features */
|
||||
#define FSL_I2C_DEV_SEPARATE_DFSRR 0x00000001
|
||||
#define FSL_I2C_DEV_CLOCK_5200 0x00000002
|
||||
|
|
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