spi: dw: Define the capabilities in a continuous bit-flags set
Since the DW_SPI_CAP_DWC_HSSI capability has just been replaced with using the DW SSI IP-core versions interface, the DW SPI capability flags are now represented with a gap. Let's fix it by redefining the DW_SPI_CAP_DFS32 macro to setting BIT(2) of the capabilities field. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20211115181917.7521-8-Sergey.Semin@baikalelectronics.ru Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -32,7 +32,7 @@
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/* DW SPI controller capabilities */
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#define DW_SPI_CAP_CS_OVERRIDE BIT(0)
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#define DW_SPI_CAP_KEEMBAY_MST BIT(1)
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#define DW_SPI_CAP_DFS32 BIT(3)
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#define DW_SPI_CAP_DFS32 BIT(2)
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/* Register offsets (Generic for both DWC APB SSI and DWC SSI IP-cores) */
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#define DW_SPI_CTRLR0 0x00
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