[POWERPC] CPM: Move definition of buffer descriptor to cpm.h
Buffer descriptors are used by both CPM1 and CPM2. Move the definitions from the cpm dependent include file to common cpm.h Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -4,6 +4,79 @@
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#include <linux/compiler.h>
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#include <linux/types.h>
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/* Buffer descriptors used by many of the CPM protocols. */
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typedef struct cpm_buf_desc {
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ushort cbd_sc; /* Status and Control */
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ushort cbd_datlen; /* Data length in buffer */
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uint cbd_bufaddr; /* Buffer address in host memory */
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} cbd_t;
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/* Buffer descriptor control/status used by serial
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*/
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#define BD_SC_EMPTY (0x8000) /* Receive is empty */
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#define BD_SC_READY (0x8000) /* Transmit is ready */
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#define BD_SC_WRAP (0x2000) /* Last buffer descriptor */
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#define BD_SC_INTRPT (0x1000) /* Interrupt on change */
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#define BD_SC_LAST (0x0800) /* Last buffer in frame */
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#define BD_SC_TC (0x0400) /* Transmit CRC */
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#define BD_SC_CM (0x0200) /* Continous mode */
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#define BD_SC_ID (0x0100) /* Rec'd too many idles */
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#define BD_SC_P (0x0100) /* xmt preamble */
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#define BD_SC_BR (0x0020) /* Break received */
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#define BD_SC_FR (0x0010) /* Framing error */
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#define BD_SC_PR (0x0008) /* Parity error */
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#define BD_SC_NAK (0x0004) /* NAK - did not respond */
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#define BD_SC_OV (0x0002) /* Overrun */
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#define BD_SC_UN (0x0002) /* Underrun */
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#define BD_SC_CD (0x0001) /* */
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#define BD_SC_CL (0x0001) /* Collision */
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/* Buffer descriptor control/status used by Ethernet receive.
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* Common to SCC and FCC.
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*/
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#define BD_ENET_RX_EMPTY (0x8000)
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#define BD_ENET_RX_WRAP (0x2000)
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#define BD_ENET_RX_INTR (0x1000)
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#define BD_ENET_RX_LAST (0x0800)
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#define BD_ENET_RX_FIRST (0x0400)
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#define BD_ENET_RX_MISS (0x0100)
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#define BD_ENET_RX_BC (0x0080) /* FCC Only */
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#define BD_ENET_RX_MC (0x0040) /* FCC Only */
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#define BD_ENET_RX_LG (0x0020)
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#define BD_ENET_RX_NO (0x0010)
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#define BD_ENET_RX_SH (0x0008)
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#define BD_ENET_RX_CR (0x0004)
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#define BD_ENET_RX_OV (0x0002)
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#define BD_ENET_RX_CL (0x0001)
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#define BD_ENET_RX_STATS (0x01ff) /* All status bits */
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/* Buffer descriptor control/status used by Ethernet transmit.
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* Common to SCC and FCC.
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*/
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#define BD_ENET_TX_READY (0x8000)
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#define BD_ENET_TX_PAD (0x4000)
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#define BD_ENET_TX_WRAP (0x2000)
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#define BD_ENET_TX_INTR (0x1000)
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#define BD_ENET_TX_LAST (0x0800)
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#define BD_ENET_TX_TC (0x0400)
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#define BD_ENET_TX_DEF (0x0200)
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#define BD_ENET_TX_HB (0x0100)
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#define BD_ENET_TX_LC (0x0080)
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#define BD_ENET_TX_RL (0x0040)
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#define BD_ENET_TX_RCMASK (0x003c)
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#define BD_ENET_TX_UN (0x0002)
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#define BD_ENET_TX_CSL (0x0001)
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#define BD_ENET_TX_STATS (0x03ff) /* All status bits */
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/* Buffer descriptor control/status used by Transparent mode SCC.
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*/
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#define BD_SCC_TX_LAST (0x0800)
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/* Buffer descriptor control/status used by I2C.
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*/
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#define BD_I2C_START (0x0400)
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int cpm_muram_init(void);
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unsigned long cpm_muram_alloc(unsigned long size, unsigned long align);
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int cpm_muram_free(unsigned long offset);
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@ -91,32 +91,6 @@ extern void cpm_load_patch(cpm8xx_t *cp);
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extern void cpm_reset(void);
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/* Buffer descriptors used by many of the CPM protocols.
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*/
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typedef struct cpm_buf_desc {
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ushort cbd_sc; /* Status and Control */
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ushort cbd_datlen; /* Data length in buffer */
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uint cbd_bufaddr; /* Buffer address in host memory */
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} cbd_t;
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#define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */
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#define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */
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#define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor */
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#define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */
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#define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame */
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#define BD_SC_TC ((ushort)0x0400) /* Transmit CRC */
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#define BD_SC_CM ((ushort)0x0200) /* Continous mode */
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#define BD_SC_ID ((ushort)0x0100) /* Rec'd too many idles */
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#define BD_SC_P ((ushort)0x0100) /* xmt preamble */
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#define BD_SC_BR ((ushort)0x0020) /* Break received */
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#define BD_SC_FR ((ushort)0x0010) /* Framing error */
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#define BD_SC_PR ((ushort)0x0008) /* Parity error */
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#define BD_SC_NAK ((ushort)0x0004) /* NAK - did not respond */
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#define BD_SC_OV ((ushort)0x0002) /* Overrun */
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#define BD_SC_UN ((ushort)0x0002) /* Underrun */
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#define BD_SC_CD ((ushort)0x0001) /* ?? */
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#define BD_SC_CL ((ushort)0x0001) /* Collision */
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/* Parameter RAM offsets.
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*/
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#define PROFF_SCC1 ((uint)0x0000)
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@ -446,41 +420,6 @@ typedef struct scc_enet {
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#define SCC_PSMR_NIB22 ((ushort)0x000a) /* Start frame search */
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#define SCC_PSMR_FDE ((ushort)0x0001) /* Full duplex enable */
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/* Buffer descriptor control/status used by Ethernet receive.
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*/
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#define BD_ENET_RX_EMPTY ((ushort)0x8000)
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#define BD_ENET_RX_WRAP ((ushort)0x2000)
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#define BD_ENET_RX_INTR ((ushort)0x1000)
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#define BD_ENET_RX_LAST ((ushort)0x0800)
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#define BD_ENET_RX_FIRST ((ushort)0x0400)
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#define BD_ENET_RX_MISS ((ushort)0x0100)
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#define BD_ENET_RX_LG ((ushort)0x0020)
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#define BD_ENET_RX_NO ((ushort)0x0010)
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#define BD_ENET_RX_SH ((ushort)0x0008)
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#define BD_ENET_RX_CR ((ushort)0x0004)
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#define BD_ENET_RX_OV ((ushort)0x0002)
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#define BD_ENET_RX_CL ((ushort)0x0001)
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#define BD_ENET_RX_BC ((ushort)0x0080) /* DA is Broadcast */
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#define BD_ENET_RX_MC ((ushort)0x0040) /* DA is Multicast */
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#define BD_ENET_RX_STATS ((ushort)0x013f) /* All status bits */
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/* Buffer descriptor control/status used by Ethernet transmit.
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*/
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#define BD_ENET_TX_READY ((ushort)0x8000)
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#define BD_ENET_TX_PAD ((ushort)0x4000)
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#define BD_ENET_TX_WRAP ((ushort)0x2000)
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#define BD_ENET_TX_INTR ((ushort)0x1000)
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#define BD_ENET_TX_LAST ((ushort)0x0800)
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#define BD_ENET_TX_TC ((ushort)0x0400)
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#define BD_ENET_TX_DEF ((ushort)0x0200)
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#define BD_ENET_TX_HB ((ushort)0x0100)
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#define BD_ENET_TX_LC ((ushort)0x0080)
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#define BD_ENET_TX_RL ((ushort)0x0040)
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#define BD_ENET_TX_RCMASK ((ushort)0x003c)
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#define BD_ENET_TX_UN ((ushort)0x0002)
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#define BD_ENET_TX_CSL ((ushort)0x0001)
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#define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */
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/* SCC as UART
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*/
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typedef struct scc_uart {
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@ -549,8 +488,6 @@ typedef struct scc_trans {
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uint st_cmask; /* Constant mask for CRC */
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} scc_trans_t;
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#define BD_SCC_TX_LAST ((ushort)0x0800)
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/* IIC parameter RAM.
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*/
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typedef struct iic {
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@ -574,8 +511,6 @@ typedef struct iic {
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char res2[2]; /* Reserved */
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} iic_t;
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#define BD_IIC_START ((ushort)0x0400)
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/* SPI parameter RAM.
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*/
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typedef struct spi {
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@ -132,29 +132,6 @@ extern void cpm_setbrg(uint brg, uint rate);
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extern void cpm2_fastbrg(uint brg, uint rate, int div16);
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extern void cpm2_reset(void);
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/* Buffer descriptors used by many of the CPM protocols.
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*/
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typedef struct cpm_buf_desc {
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ushort cbd_sc; /* Status and Control */
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ushort cbd_datlen; /* Data length in buffer */
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uint cbd_bufaddr; /* Buffer address in host memory */
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} cbd_t;
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#define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */
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#define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */
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#define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor */
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#define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */
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#define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame */
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#define BD_SC_CM ((ushort)0x0200) /* Continous mode */
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#define BD_SC_ID ((ushort)0x0100) /* Rec'd too many idles */
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#define BD_SC_P ((ushort)0x0100) /* xmt preamble */
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#define BD_SC_BR ((ushort)0x0020) /* Break received */
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#define BD_SC_FR ((ushort)0x0010) /* Framing error */
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#define BD_SC_PR ((ushort)0x0008) /* Parity error */
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#define BD_SC_OV ((ushort)0x0002) /* Overrun */
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#define BD_SC_CD ((ushort)0x0001) /* ?? */
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/* Function code bits, usually generic to devices.
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*/
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#define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */
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@ -456,43 +433,6 @@ typedef struct scc_enet {
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#define SCC_PSMR_NIB22 ((ushort)0x000a) /* Start frame search */
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#define SCC_PSMR_FDE ((ushort)0x0001) /* Full duplex enable */
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/* Buffer descriptor control/status used by Ethernet receive.
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* Common to SCC and FCC.
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*/
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#define BD_ENET_RX_EMPTY ((ushort)0x8000)
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#define BD_ENET_RX_WRAP ((ushort)0x2000)
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#define BD_ENET_RX_INTR ((ushort)0x1000)
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#define BD_ENET_RX_LAST ((ushort)0x0800)
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#define BD_ENET_RX_FIRST ((ushort)0x0400)
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#define BD_ENET_RX_MISS ((ushort)0x0100)
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#define BD_ENET_RX_BC ((ushort)0x0080) /* FCC Only */
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#define BD_ENET_RX_MC ((ushort)0x0040) /* FCC Only */
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#define BD_ENET_RX_LG ((ushort)0x0020)
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#define BD_ENET_RX_NO ((ushort)0x0010)
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#define BD_ENET_RX_SH ((ushort)0x0008)
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#define BD_ENET_RX_CR ((ushort)0x0004)
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#define BD_ENET_RX_OV ((ushort)0x0002)
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#define BD_ENET_RX_CL ((ushort)0x0001)
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#define BD_ENET_RX_STATS ((ushort)0x01ff) /* All status bits */
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/* Buffer descriptor control/status used by Ethernet transmit.
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* Common to SCC and FCC.
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*/
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#define BD_ENET_TX_READY ((ushort)0x8000)
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#define BD_ENET_TX_PAD ((ushort)0x4000)
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#define BD_ENET_TX_WRAP ((ushort)0x2000)
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#define BD_ENET_TX_INTR ((ushort)0x1000)
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#define BD_ENET_TX_LAST ((ushort)0x0800)
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#define BD_ENET_TX_TC ((ushort)0x0400)
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#define BD_ENET_TX_DEF ((ushort)0x0200)
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#define BD_ENET_TX_HB ((ushort)0x0100)
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#define BD_ENET_TX_LC ((ushort)0x0080)
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#define BD_ENET_TX_RL ((ushort)0x0040)
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#define BD_ENET_TX_RCMASK ((ushort)0x003c)
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#define BD_ENET_TX_UN ((ushort)0x0002)
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#define BD_ENET_TX_CSL ((ushort)0x0001)
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#define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */
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/* SCC as UART
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*/
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typedef struct scc_uart {
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@ -562,8 +502,6 @@ typedef struct scc_trans {
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uint st_cmask; /* Constant mask for CRC */
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} scc_trans_t;
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#define BD_SCC_TX_LAST ((ushort)0x0800)
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/* How about some FCCs.....
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*/
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#define FCC_GFMR_DIAG_NORM ((uint)0x00000000)
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@ -769,8 +707,6 @@ typedef struct spi {
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#define SPI_EB ((u_char)0x10) /* big endian byte order */
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#define BD_IIC_START ((ushort)0x0400)
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/* IDMA parameter RAM
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*/
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typedef struct idma {
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