ARM: EXYNOS: Fixups for big-endian operation
If the kernel is built big endian, then using the __raw read and write IO accessors is not going to work as they end up writing big-endian data to little-endian IO registers. Fix this by using the readl and writel relaxed versions which ensure little endian IO. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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Коммит
458ad21df1
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@ -41,9 +41,9 @@ static int exynos_do_idle(unsigned long mode)
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case FW_DO_IDLE_AFTR:
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case FW_DO_IDLE_AFTR:
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if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
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if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
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exynos_save_cp15();
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exynos_save_cp15();
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__raw_writel(virt_to_phys(exynos_cpu_resume_ns),
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writel_relaxed(virt_to_phys(exynos_cpu_resume_ns),
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sysram_ns_base_addr + 0x24);
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sysram_ns_base_addr + 0x24);
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__raw_writel(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20);
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writel_relaxed(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20);
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if (soc_is_exynos3250()) {
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if (soc_is_exynos3250()) {
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flush_cache_all();
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flush_cache_all();
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exynos_smc(SMC_CMD_SAVE, OP_TYPE_CORE,
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exynos_smc(SMC_CMD_SAVE, OP_TYPE_CORE,
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@ -97,7 +97,7 @@ static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
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if (soc_is_exynos4412())
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if (soc_is_exynos4412())
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boot_reg += 4 * cpu;
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boot_reg += 4 * cpu;
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__raw_writel(boot_addr, boot_reg);
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writel_relaxed(boot_addr, boot_reg);
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return 0;
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return 0;
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}
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}
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@ -113,7 +113,7 @@ static int exynos_get_cpu_boot_addr(int cpu, unsigned long *boot_addr)
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if (soc_is_exynos4412())
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if (soc_is_exynos4412())
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boot_reg += 4 * cpu;
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boot_reg += 4 * cpu;
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*boot_addr = __raw_readl(boot_reg);
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*boot_addr = readl_relaxed(boot_reg);
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return 0;
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return 0;
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}
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}
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@ -234,20 +234,20 @@ void exynos_set_boot_flag(unsigned int cpu, unsigned int mode)
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{
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{
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unsigned int tmp;
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unsigned int tmp;
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tmp = __raw_readl(REG_CPU_STATE_ADDR + cpu * 4);
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tmp = readl_relaxed(REG_CPU_STATE_ADDR + cpu * 4);
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if (mode & BOOT_MODE_MASK)
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if (mode & BOOT_MODE_MASK)
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tmp &= ~BOOT_MODE_MASK;
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tmp &= ~BOOT_MODE_MASK;
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tmp |= mode;
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tmp |= mode;
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__raw_writel(tmp, REG_CPU_STATE_ADDR + cpu * 4);
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writel_relaxed(tmp, REG_CPU_STATE_ADDR + cpu * 4);
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}
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}
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void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode)
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void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode)
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{
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{
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unsigned int tmp;
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unsigned int tmp;
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tmp = __raw_readl(REG_CPU_STATE_ADDR + cpu * 4);
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tmp = readl_relaxed(REG_CPU_STATE_ADDR + cpu * 4);
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tmp &= ~mode;
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tmp &= ~mode;
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__raw_writel(tmp, REG_CPU_STATE_ADDR + cpu * 4);
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writel_relaxed(tmp, REG_CPU_STATE_ADDR + cpu * 4);
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}
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}
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@ -12,12 +12,15 @@
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#include <linux/linkage.h>
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <asm/assembler.h>
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/*
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/*
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* exynos4 specific entry point for secondary CPUs. This provides
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* exynos4 specific entry point for secondary CPUs. This provides
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* a "holding pen" into which all secondary cores are held until we're
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* a "holding pen" into which all secondary cores are held until we're
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* ready for them to initialise.
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* ready for them to initialise.
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*/
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*/
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ENTRY(exynos4_secondary_startup)
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ENTRY(exynos4_secondary_startup)
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ARM_BE8(setend be)
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mrc p15, 0, r0, c0, c0, 5
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mrc p15, 0, r0, c0, c0, 5
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and r0, r0, #15
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and r0, r0, #15
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adr r4, 1f
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adr r4, 1f
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@ -264,7 +264,7 @@ int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr)
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ret = PTR_ERR(boot_reg);
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ret = PTR_ERR(boot_reg);
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goto fail;
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goto fail;
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}
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}
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__raw_writel(boot_addr, boot_reg);
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writel_relaxed(boot_addr, boot_reg);
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ret = 0;
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ret = 0;
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}
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}
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fail:
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fail:
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@ -289,7 +289,7 @@ int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr)
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ret = PTR_ERR(boot_reg);
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ret = PTR_ERR(boot_reg);
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goto fail;
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goto fail;
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}
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}
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*boot_addr = __raw_readl(boot_reg);
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*boot_addr = readl_relaxed(boot_reg);
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ret = 0;
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ret = 0;
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}
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}
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fail:
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fail:
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