drm/i915: Update the location of the ringbuffers' HWS_PGA registers for IVB.
They have been moved from the ringbuffer groups to their own group it looks like. Fixes GPU hangs on gnome startup. Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
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25aebfc30b
Коммит
4593010b68
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@ -291,6 +291,9 @@
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#define RING_MAX_IDLE(base) ((base)+0x54)
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#define RING_HWS_PGA(base) ((base)+0x80)
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#define RING_HWS_PGA_GEN6(base) ((base)+0x2080)
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#define RENDER_HWS_PGA_GEN7 (0x04080)
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#define BSD_HWS_PGA_GEN7 (0x04180)
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#define BLT_HWS_PGA_GEN7 (0x04280)
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#define RING_ACTHD(base) ((base)+0x74)
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#define RING_NOPID(base) ((base)+0x94)
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#define RING_IMR(base) ((base)+0xa8)
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@ -551,10 +551,31 @@ render_ring_put_irq(struct intel_ring_buffer *ring)
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void intel_ring_setup_status_page(struct intel_ring_buffer *ring)
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{
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struct drm_device *dev = ring->dev;
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drm_i915_private_t *dev_priv = ring->dev->dev_private;
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u32 mmio = (IS_GEN6(ring->dev) || IS_GEN7(ring->dev)) ?
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RING_HWS_PGA_GEN6(ring->mmio_base) :
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RING_HWS_PGA(ring->mmio_base);
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u32 mmio = 0;
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/* The ring status page addresses are no longer next to the rest of
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* the ring registers as of gen7.
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*/
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if (IS_GEN7(dev)) {
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switch (ring->id) {
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case RING_RENDER:
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mmio = RENDER_HWS_PGA_GEN7;
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break;
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case RING_BLT:
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mmio = BLT_HWS_PGA_GEN7;
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break;
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case RING_BSD:
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mmio = BSD_HWS_PGA_GEN7;
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break;
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}
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} else if (IS_GEN6(ring->dev)) {
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mmio = RING_HWS_PGA_GEN6(ring->mmio_base);
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} else {
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mmio = RING_HWS_PGA(ring->mmio_base);
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}
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I915_WRITE(mmio, (u32)ring->status_page.gfx_addr);
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POSTING_READ(mmio);
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}
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