Merge branch 'irqchip/handle_domain' into irqchip/core
This commit is contained in:
Коммит
468a903c0e
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@ -24,6 +24,7 @@ config ARM
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select GENERIC_SMP_IDLE_THREAD
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select GENERIC_STRNCPY_FROM_USER
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select GENERIC_STRNLEN_USER
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select HANDLE_DOMAIN_IRQ
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select HARDIRQS_SW_RESEND
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select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)
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select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
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@ -65,24 +65,7 @@ int arch_show_interrupts(struct seq_file *p, int prec)
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*/
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void handle_IRQ(unsigned int irq, struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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irq_enter();
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/*
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* Some hardware gives randomly wrong interrupts. Rather
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* than crashing, do something sensible.
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*/
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if (unlikely(irq >= nr_irqs)) {
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if (printk_ratelimit())
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printk(KERN_WARNING "Bad IRQ%u\n", irq);
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ack_bad_irq(irq);
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} else {
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generic_handle_irq(irq);
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}
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irq_exit();
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set_irq_regs(old_regs);
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__handle_domain_irq(NULL, irq, false, regs);
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}
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/*
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@ -144,7 +144,7 @@ static void __exception_irq_entry avic_handle_irq(struct pt_regs *regs)
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if (nivector == 0xffff)
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break;
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handle_IRQ(irq_find_mapping(domain, nivector), regs);
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handle_domain_irq(domain, nivector, regs);
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} while (1);
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}
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@ -141,8 +141,7 @@ static void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs)
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while (stat) {
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handled = 1;
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irqofs = fls(stat) - 1;
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handle_IRQ(irq_find_mapping(domain,
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irqofs + i * 32), regs);
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handle_domain_irq(domain, irqofs + i * 32, regs);
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stat &= ~(1 << irqofs);
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}
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}
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@ -248,8 +248,7 @@ out:
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irqnr &= ACTIVEIRQ_MASK;
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if (irqnr) {
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irqnr = irq_find_mapping(domain, irqnr);
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handle_IRQ(irqnr, regs);
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handle_domain_irq(domain, irqnr, regs);
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handled_irq = 1;
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}
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} while (irqnr);
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@ -30,6 +30,7 @@ config ARM64
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select GENERIC_STRNCPY_FROM_USER
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select GENERIC_STRNLEN_USER
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select GENERIC_TIME_VSYSCALL
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select HANDLE_DOMAIN_IRQ
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select HARDIRQS_SW_RESEND
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select HAVE_ARCH_AUDITSYSCALL
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select HAVE_ARCH_JUMP_LABEL
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@ -47,8 +47,6 @@ static inline void ack_bad_irq(unsigned int irq)
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irq_err_count++;
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}
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extern void handle_IRQ(unsigned int, struct pt_regs *);
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/*
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* No arch-specific IRQ flags.
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*/
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@ -40,33 +40,6 @@ int arch_show_interrupts(struct seq_file *p, int prec)
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return 0;
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}
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/*
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* handle_IRQ handles all hardware IRQ's. Decoded IRQs should
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* not come via this function. Instead, they should provide their
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* own 'handler'. Used by platform code implementing C-based 1st
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* level decoding.
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*/
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void handle_IRQ(unsigned int irq, struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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irq_enter();
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/*
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* Some hardware gives randomly wrong interrupts. Rather
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* than crashing, do something sensible.
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*/
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if (unlikely(irq >= nr_irqs)) {
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pr_warn_ratelimited("Bad IRQ%u\n", irq);
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ack_bad_irq(irq);
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} else {
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generic_handle_irq(irq);
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}
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irq_exit();
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set_irq_regs(old_regs);
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}
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void __init set_handle_irq(void (*handle_irq)(struct pt_regs *))
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{
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if (handle_arch_irq)
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@ -8,6 +8,7 @@ config OPENRISC
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select OF
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select OF_EARLY_FLATTREE
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select IRQ_DOMAIN
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select HANDLE_DOMAIN_IRQ
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select HAVE_MEMBLOCK
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select ARCH_REQUIRE_GPIOLIB
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select HAVE_ARCH_TRACEHOOK
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@ -24,7 +24,6 @@
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#define NO_IRQ (-1)
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void handle_IRQ(unsigned int, struct pt_regs *);
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extern void set_handle_irq(void (*handle_irq)(struct pt_regs *));
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#endif /* __ASM_OPENRISC_IRQ_H__ */
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@ -48,18 +48,6 @@ void __init set_handle_irq(void (*handle_irq)(struct pt_regs *))
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handle_arch_irq = handle_irq;
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}
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void handle_IRQ(unsigned int irq, struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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irq_enter();
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generic_handle_irq(irq);
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irq_exit();
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set_irq_regs(old_regs);
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}
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void __irq_entry do_IRQ(struct pt_regs *regs)
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{
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handle_arch_irq(regs);
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@ -393,13 +393,15 @@ static void armada_370_xp_handle_msi_irq(struct pt_regs *regs, bool is_chained)
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if (!(msimask & BIT(msinr)))
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continue;
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if (is_chained) {
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irq = irq_find_mapping(armada_370_xp_msi_domain,
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msinr - 16);
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if (is_chained)
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generic_handle_irq(irq);
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else
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handle_IRQ(irq, regs);
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} else {
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irq = msinr - 16;
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handle_domain_irq(armada_370_xp_msi_domain,
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irq, regs);
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}
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}
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}
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#else
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@ -444,9 +446,8 @@ armada_370_xp_handle_irq(struct pt_regs *regs)
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break;
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if (irqnr > 1) {
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irqnr = irq_find_mapping(armada_370_xp_mpic_domain,
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irqnr);
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handle_IRQ(irqnr, regs);
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handle_domain_irq(armada_370_xp_mpic_domain,
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irqnr, regs);
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continue;
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}
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@ -68,12 +68,10 @@ aic_handle(struct pt_regs *regs)
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irqnr = irq_reg_readl(gc->reg_base + AT91_AIC_IVR);
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irqstat = irq_reg_readl(gc->reg_base + AT91_AIC_ISR);
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irqnr = irq_find_mapping(aic_domain, irqnr);
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if (!irqstat)
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irq_reg_writel(0, gc->reg_base + AT91_AIC_EOICR);
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else
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handle_IRQ(irqnr, regs);
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handle_domain_irq(aic_domain, irqnr, regs);
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}
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static int aic_retrigger(struct irq_data *d)
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@ -78,12 +78,10 @@ aic5_handle(struct pt_regs *regs)
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irqnr = irq_reg_readl(gc->reg_base + AT91_AIC5_IVR);
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irqstat = irq_reg_readl(gc->reg_base + AT91_AIC5_ISR);
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irqnr = irq_find_mapping(aic5_domain, irqnr);
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if (!irqstat)
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irq_reg_writel(0, gc->reg_base + AT91_AIC5_EOICR);
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else
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handle_IRQ(irqnr, regs);
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handle_domain_irq(aic5_domain, irqnr, regs);
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}
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static void aic5_mask(struct irq_data *d)
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@ -76,24 +76,20 @@ static struct {
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static asmlinkage void __exception_irq_entry clps711x_irqh(struct pt_regs *regs)
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{
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u32 irqnr, irqstat;
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u32 irqstat;
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do {
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irqstat = readw_relaxed(clps711x_intc->intmr[0]) &
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readw_relaxed(clps711x_intc->intsr[0]);
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if (irqstat) {
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irqnr = irq_find_mapping(clps711x_intc->domain,
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fls(irqstat) - 1);
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handle_IRQ(irqnr, regs);
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}
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if (irqstat)
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handle_domain_irq(clps711x_intc->domain,
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fls(irqstat) - 1, regs);
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irqstat = readw_relaxed(clps711x_intc->intmr[1]) &
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readw_relaxed(clps711x_intc->intsr[1]);
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if (irqstat) {
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irqnr = irq_find_mapping(clps711x_intc->domain,
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fls(irqstat) - 1 + 16);
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handle_IRQ(irqnr, regs);
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}
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if (irqstat)
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handle_domain_irq(clps711x_intc->domain,
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fls(irqstat) - 1 + 16, regs);
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} while (irqstat);
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}
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@ -274,15 +274,14 @@ static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs
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irqnr = gic_read_iar();
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if (likely(irqnr > 15 && irqnr < 1020)) {
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u64 irq = irq_find_mapping(gic_data.domain, irqnr);
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if (likely(irq)) {
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handle_IRQ(irq, regs);
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continue;
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}
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int err;
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err = handle_domain_irq(gic_data.domain, irqnr, regs);
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if (err) {
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WARN_ONCE(true, "Unexpected SPI received!\n");
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gic_write_eoir(irqnr);
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}
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continue;
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}
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if (irqnr < 16) {
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gic_write_eoir(irqnr);
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#ifdef CONFIG_SMP
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@ -270,8 +270,7 @@ static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
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irqnr = irqstat & GICC_IAR_INT_ID_MASK;
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if (likely(irqnr > 15 && irqnr < 1021)) {
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irqnr = irq_find_mapping(gic->domain, irqnr);
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handle_IRQ(irqnr, regs);
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handle_domain_irq(gic->domain, irqnr, regs);
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continue;
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}
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if (irqnr < 16) {
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@ -196,26 +196,24 @@ static struct mmp_intc_conf mmp2_conf = {
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static void __exception_irq_entry mmp_handle_irq(struct pt_regs *regs)
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{
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int irq, hwirq;
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int hwirq;
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hwirq = readl_relaxed(mmp_icu_base + PJ1_INT_SEL);
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if (!(hwirq & SEL_INT_PENDING))
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return;
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hwirq &= SEL_INT_NUM_MASK;
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irq = irq_find_mapping(icu_data[0].domain, hwirq);
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handle_IRQ(irq, regs);
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handle_domain_irq(icu_data[0].domain, hwirq, regs);
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}
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static void __exception_irq_entry mmp2_handle_irq(struct pt_regs *regs)
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{
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int irq, hwirq;
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int hwirq;
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hwirq = readl_relaxed(mmp_icu_base + PJ4_INT_SEL);
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if (!(hwirq & SEL_INT_PENDING))
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return;
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hwirq &= SEL_INT_NUM_MASK;
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irq = irq_find_mapping(icu_data[0].domain, hwirq);
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handle_IRQ(irq, regs);
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handle_domain_irq(icu_data[0].domain, hwirq, regs);
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}
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/* MMP (ARMv5) */
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|
|
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@ -78,8 +78,7 @@ asmlinkage void __exception_irq_entry icoll_handle_irq(struct pt_regs *regs)
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|
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irqnr = __raw_readl(icoll_base + HW_ICOLL_STAT_OFFSET);
|
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__raw_writel(irqnr, icoll_base + HW_ICOLL_VECTOR);
|
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irqnr = irq_find_mapping(icoll_domain, irqnr);
|
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handle_IRQ(irqnr, regs);
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handle_domain_irq(icoll_domain, irqnr, regs);
|
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}
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|
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static int icoll_irq_domain_map(struct irq_domain *d, unsigned int virq,
|
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|
|
|
@ -113,7 +113,7 @@ static inline int pic_get_irq(int first)
|
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else
|
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hwirq = hwirq + first - 1;
|
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|
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return irq_find_mapping(root_domain, hwirq);
|
||||
return hwirq;
|
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}
|
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|
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static void or1k_pic_handle_irq(struct pt_regs *regs)
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|
@ -121,7 +121,7 @@ static void or1k_pic_handle_irq(struct pt_regs *regs)
|
|||
int irq = -1;
|
||||
|
||||
while ((irq = pic_get_irq(irq + 1)) != NO_IRQ)
|
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handle_IRQ(irq, regs);
|
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handle_domain_irq(root_domain, irq, regs);
|
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}
|
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|
||||
static int or1k_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
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||||
|
|
|
@ -43,9 +43,8 @@ __exception_irq_entry orion_handle_irq(struct pt_regs *regs)
|
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gc->mask_cache;
|
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while (stat) {
|
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u32 hwirq = __fls(stat);
|
||||
u32 irq = irq_find_mapping(orion_irq_domain,
|
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gc->irq_base + hwirq);
|
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handle_IRQ(irq, regs);
|
||||
handle_domain_irq(orion_irq_domain,
|
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gc->irq_base + hwirq, regs);
|
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stat &= ~(1 << hwirq);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -339,7 +339,6 @@ static inline int s3c24xx_handle_intc(struct s3c_irq_intc *intc,
|
|||
{
|
||||
int pnd;
|
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int offset;
|
||||
int irq;
|
||||
|
||||
pnd = __raw_readl(intc->reg_intpnd);
|
||||
if (!pnd)
|
||||
|
@ -365,8 +364,7 @@ static inline int s3c24xx_handle_intc(struct s3c_irq_intc *intc,
|
|||
if (!(pnd & (1 << offset)))
|
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offset = __ffs(pnd);
|
||||
|
||||
irq = irq_find_mapping(intc->domain, intc_offset + offset);
|
||||
handle_IRQ(irq, regs);
|
||||
handle_domain_irq(intc->domain, intc_offset + offset, regs);
|
||||
return true;
|
||||
}
|
||||
|
||||
|
|
|
@ -50,12 +50,10 @@ sirfsoc_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
|
|||
static void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs)
|
||||
{
|
||||
void __iomem *base = sirfsoc_irqdomain->host_data;
|
||||
u32 irqstat, irqnr;
|
||||
u32 irqstat;
|
||||
|
||||
irqstat = readl_relaxed(base + SIRFSOC_INIT_IRQ_ID);
|
||||
irqnr = irq_find_mapping(sirfsoc_irqdomain, irqstat & 0xff);
|
||||
|
||||
handle_IRQ(irqnr, regs);
|
||||
handle_domain_irq(sirfsoc_irqdomain, irqstat & 0xff, regs);
|
||||
}
|
||||
|
||||
static int __init sirfsoc_irq_init(struct device_node *np,
|
||||
|
|
|
@ -136,7 +136,7 @@ IRQCHIP_DECLARE(allwinner_sun4i_ic, "allwinner,sun4i-a10-ic", sun4i_of_init);
|
|||
|
||||
static void __exception_irq_entry sun4i_handle_irq(struct pt_regs *regs)
|
||||
{
|
||||
u32 irq, hwirq;
|
||||
u32 hwirq;
|
||||
|
||||
/*
|
||||
* hwirq == 0 can mean one of 3 things:
|
||||
|
@ -154,8 +154,7 @@ static void __exception_irq_entry sun4i_handle_irq(struct pt_regs *regs)
|
|||
return;
|
||||
|
||||
do {
|
||||
irq = irq_find_mapping(sun4i_irq_domain, hwirq);
|
||||
handle_IRQ(irq, regs);
|
||||
handle_domain_irq(sun4i_irq_domain, hwirq, regs);
|
||||
hwirq = readl(sun4i_irq_base + SUN4I_IRQ_VECTOR_REG) >> 2;
|
||||
} while (hwirq != 0);
|
||||
}
|
||||
|
|
|
@ -96,7 +96,7 @@ static int handle_one_fpga(struct fpga_irq_data *f, struct pt_regs *regs)
|
|||
|
||||
while ((status = readl(f->base + IRQ_STATUS))) {
|
||||
irq = ffs(status) - 1;
|
||||
handle_IRQ(irq_find_mapping(f->domain, irq), regs);
|
||||
handle_domain_irq(f->domain, irq, regs);
|
||||
handled = 1;
|
||||
}
|
||||
|
||||
|
|
|
@ -219,7 +219,7 @@ static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
|
|||
|
||||
while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) {
|
||||
irq = ffs(stat) - 1;
|
||||
handle_IRQ(irq_find_mapping(vic->domain, irq), regs);
|
||||
handle_domain_irq(vic->domain, irq, regs);
|
||||
handled = 1;
|
||||
}
|
||||
|
||||
|
|
|
@ -181,7 +181,7 @@ static struct irq_domain_ops vt8500_irq_domain_ops = {
|
|||
static void __exception_irq_entry vt8500_handle_irq(struct pt_regs *regs)
|
||||
{
|
||||
u32 stat, i;
|
||||
int irqnr, virq;
|
||||
int irqnr;
|
||||
void __iomem *base;
|
||||
|
||||
/* Loop through each active controller */
|
||||
|
@ -198,8 +198,7 @@ static void __exception_irq_entry vt8500_handle_irq(struct pt_regs *regs)
|
|||
continue;
|
||||
}
|
||||
|
||||
virq = irq_find_mapping(intc[i].domain, irqnr);
|
||||
handle_IRQ(virq, regs);
|
||||
handle_domain_irq(intc[i].domain, irqnr, regs);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -56,8 +56,7 @@ static void __exception_irq_entry zevio_handle_irq(struct pt_regs *regs)
|
|||
|
||||
while (readl(zevio_irq_io + IO_STATUS)) {
|
||||
irqnr = readl(zevio_irq_io + IO_CURRENT);
|
||||
irqnr = irq_find_mapping(zevio_irq_domain, irqnr);
|
||||
handle_IRQ(irqnr, regs);
|
||||
handle_domain_irq(zevio_irq_domain, irqnr, regs);
|
||||
};
|
||||
}
|
||||
|
||||
|
|
|
@ -12,6 +12,8 @@ struct irq_affinity_notify;
|
|||
struct proc_dir_entry;
|
||||
struct module;
|
||||
struct irq_desc;
|
||||
struct irq_domain;
|
||||
struct pt_regs;
|
||||
|
||||
/**
|
||||
* struct irq_desc - interrupt descriptor
|
||||
|
@ -118,6 +120,23 @@ static inline void generic_handle_irq_desc(unsigned int irq, struct irq_desc *de
|
|||
|
||||
int generic_handle_irq(unsigned int irq);
|
||||
|
||||
#ifdef CONFIG_HANDLE_DOMAIN_IRQ
|
||||
/*
|
||||
* Convert a HW interrupt number to a logical one using a IRQ domain,
|
||||
* and handle the result interrupt number. Return -EINVAL if
|
||||
* conversion failed. Providing a NULL domain indicates that the
|
||||
* conversion has already been done.
|
||||
*/
|
||||
int __handle_domain_irq(struct irq_domain *domain, unsigned int hwirq,
|
||||
bool lookup, struct pt_regs *regs);
|
||||
|
||||
static inline int handle_domain_irq(struct irq_domain *domain,
|
||||
unsigned int hwirq, struct pt_regs *regs)
|
||||
{
|
||||
return __handle_domain_irq(domain, hwirq, true, regs);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Test to see if a driver has successfully requested an irq */
|
||||
static inline int irq_has_action(unsigned int irq)
|
||||
{
|
||||
|
|
|
@ -55,6 +55,9 @@ config GENERIC_IRQ_CHIP
|
|||
config IRQ_DOMAIN
|
||||
bool
|
||||
|
||||
config HANDLE_DOMAIN_IRQ
|
||||
bool
|
||||
|
||||
config IRQ_DOMAIN_DEBUG
|
||||
bool "Expose hardware/virtual IRQ mapping via debugfs"
|
||||
depends on IRQ_DOMAIN && DEBUG_FS
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
#include <linux/kernel_stat.h>
|
||||
#include <linux/radix-tree.h>
|
||||
#include <linux/bitmap.h>
|
||||
#include <linux/irqdomain.h>
|
||||
|
||||
#include "internals.h"
|
||||
|
||||
|
@ -336,6 +337,47 @@ int generic_handle_irq(unsigned int irq)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(generic_handle_irq);
|
||||
|
||||
#ifdef CONFIG_HANDLE_DOMAIN_IRQ
|
||||
/**
|
||||
* __handle_domain_irq - Invoke the handler for a HW irq belonging to a domain
|
||||
* @domain: The domain where to perform the lookup
|
||||
* @hwirq: The HW irq number to convert to a logical one
|
||||
* @lookup: Whether to perform the domain lookup or not
|
||||
* @regs: Register file coming from the low-level handling code
|
||||
*
|
||||
* Returns: 0 on success, or -EINVAL if conversion has failed
|
||||
*/
|
||||
int __handle_domain_irq(struct irq_domain *domain, unsigned int hwirq,
|
||||
bool lookup, struct pt_regs *regs)
|
||||
{
|
||||
struct pt_regs *old_regs = set_irq_regs(regs);
|
||||
unsigned int irq = hwirq;
|
||||
int ret = 0;
|
||||
|
||||
irq_enter();
|
||||
|
||||
#ifdef CONFIG_IRQ_DOMAIN
|
||||
if (lookup)
|
||||
irq = irq_find_mapping(domain, hwirq);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Some hardware gives randomly wrong interrupts. Rather
|
||||
* than crashing, do something sensible.
|
||||
*/
|
||||
if (unlikely(!irq || irq >= nr_irqs)) {
|
||||
ack_bad_irq(irq);
|
||||
ret = -EINVAL;
|
||||
} else {
|
||||
generic_handle_irq(irq);
|
||||
}
|
||||
|
||||
irq_exit();
|
||||
set_irq_regs(old_regs);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Dynamic interrupt handling */
|
||||
|
||||
/**
|
||||
|
|
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