iommu/exynos: Refactor function parameters to simplify code
This patch simplifies the code by: - refactoring function parameters from struct device pointer to direct pointer to struct sysmmu drvdata - moving list_head enteries from struct exynos_iommu_owner directly to struct sysmmu_drvdata After above refactoring some functions were never used, so remove also them completely. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
Marek Szyprowski
Joerg Roedel
Родитель
73db569896
Коммит
469acebe4a
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@ -186,8 +186,6 @@ static char *sysmmu_fault_name[SYSMMU_FAULTS_NUM] = {
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/* attached to dev.archdata.iommu of the master device */
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struct exynos_iommu_owner {
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struct list_head client; /* entry of exynos_iommu_domain.clients */
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struct device *dev;
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struct device *sysmmu;
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};
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@ -209,6 +207,7 @@ struct sysmmu_drvdata {
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int activations;
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spinlock_t lock;
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struct iommu_domain *domain;
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struct list_head domain_node;
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phys_addr_t pgtable;
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unsigned int version;
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};
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@ -464,47 +463,6 @@ static int __sysmmu_enable(struct sysmmu_drvdata *data,
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return ret;
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}
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/* __exynos_sysmmu_enable: Enables System MMU
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*
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* returns -error if an error occurred and System MMU is not enabled,
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* 0 if the System MMU has been just enabled and 1 if System MMU was already
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* enabled before.
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*/
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static int __exynos_sysmmu_enable(struct device *dev, phys_addr_t pgtable,
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struct iommu_domain *domain)
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{
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int ret = 0;
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struct exynos_iommu_owner *owner = dev->archdata.iommu;
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struct sysmmu_drvdata *data;
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BUG_ON(!has_sysmmu(dev));
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data = dev_get_drvdata(owner->sysmmu);
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ret = __sysmmu_enable(data, pgtable, domain);
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if (ret >= 0)
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data->master = dev;
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return ret;
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}
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static bool exynos_sysmmu_disable(struct device *dev)
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{
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bool disabled = true;
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struct exynos_iommu_owner *owner = dev->archdata.iommu;
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struct sysmmu_drvdata *data;
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BUG_ON(!has_sysmmu(dev));
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data = dev_get_drvdata(owner->sysmmu);
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disabled = __sysmmu_disable(data);
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if (disabled)
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data->master = NULL;
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return disabled;
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}
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static void __sysmmu_tlb_invalidate_flpdcache(struct sysmmu_drvdata *data,
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sysmmu_iova_t iova)
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{
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@ -512,12 +470,10 @@ static void __sysmmu_tlb_invalidate_flpdcache(struct sysmmu_drvdata *data,
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__raw_writel(iova | 0x1, data->sfrbase + REG_MMU_FLUSH_ENTRY);
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}
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static void sysmmu_tlb_invalidate_flpdcache(struct device *dev,
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static void sysmmu_tlb_invalidate_flpdcache(struct sysmmu_drvdata *data,
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sysmmu_iova_t iova)
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{
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unsigned long flags;
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struct exynos_iommu_owner *owner = dev->archdata.iommu;
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struct sysmmu_drvdata *data = dev_get_drvdata(owner->sysmmu);
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if (!IS_ERR(data->clk_master))
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clk_enable(data->clk_master);
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@ -531,14 +487,10 @@ static void sysmmu_tlb_invalidate_flpdcache(struct device *dev,
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clk_disable(data->clk_master);
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}
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static void sysmmu_tlb_invalidate_entry(struct device *dev, sysmmu_iova_t iova,
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size_t size)
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static void sysmmu_tlb_invalidate_entry(struct sysmmu_drvdata *data,
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sysmmu_iova_t iova, size_t size)
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{
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struct exynos_iommu_owner *owner = dev->archdata.iommu;
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unsigned long flags;
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struct sysmmu_drvdata *data;
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data = dev_get_drvdata(owner->sysmmu);
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spin_lock_irqsave(&data->lock, flags);
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if (is_sysmmu_active(data)) {
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@ -568,8 +520,8 @@ static void sysmmu_tlb_invalidate_entry(struct device *dev, sysmmu_iova_t iova,
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if (!IS_ERR(data->clk_master))
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clk_disable(data->clk_master);
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} else {
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dev_dbg(dev, "disabled. Skipping TLB invalidation @ %#x\n",
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iova);
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dev_dbg(data->master,
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"disabled. Skipping TLB invalidation @ %#x\n", iova);
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}
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spin_unlock_irqrestore(&data->lock, flags);
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}
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@ -709,7 +661,7 @@ err_pgtable:
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static void exynos_iommu_domain_free(struct iommu_domain *domain)
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{
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struct exynos_iommu_domain *priv = to_exynos_domain(domain);
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struct exynos_iommu_owner *owner;
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struct sysmmu_drvdata *data, *next;
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unsigned long flags;
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int i;
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@ -717,14 +669,12 @@ static void exynos_iommu_domain_free(struct iommu_domain *domain)
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spin_lock_irqsave(&priv->lock, flags);
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list_for_each_entry(owner, &priv->clients, client) {
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while (!exynos_sysmmu_disable(owner->dev))
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; /* until System MMU is actually disabled */
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list_for_each_entry_safe(data, next, &priv->clients, domain_node) {
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if (__sysmmu_disable(data))
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data->master = NULL;
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list_del_init(&data->domain_node);
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}
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while (!list_empty(&priv->clients))
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list_del_init(priv->clients.next);
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spin_unlock_irqrestore(&priv->lock, flags);
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for (i = 0; i < NUM_LV1ENTRIES; i++)
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@ -742,17 +692,25 @@ static int exynos_iommu_attach_device(struct iommu_domain *domain,
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{
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struct exynos_iommu_owner *owner = dev->archdata.iommu;
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struct exynos_iommu_domain *priv = to_exynos_domain(domain);
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struct sysmmu_drvdata *data;
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phys_addr_t pagetable = virt_to_phys(priv->pgtable);
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unsigned long flags;
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int ret;
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int ret = -ENODEV;
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spin_lock_irqsave(&priv->lock, flags);
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if (!has_sysmmu(dev))
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return -ENODEV;
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ret = __exynos_sysmmu_enable(dev, pagetable, domain);
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if (ret == 0)
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list_add_tail(&owner->client, &priv->clients);
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data = dev_get_drvdata(owner->sysmmu);
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if (data) {
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ret = __sysmmu_enable(data, pagetable, domain);
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if (ret >= 0) {
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data->master = dev;
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spin_unlock_irqrestore(&priv->lock, flags);
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spin_lock_irqsave(&priv->lock, flags);
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list_add_tail(&data->domain_node, &priv->clients);
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spin_unlock_irqrestore(&priv->lock, flags);
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}
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}
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if (ret < 0) {
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dev_err(dev, "%s: Failed to attach IOMMU with pgtable %pa\n",
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@ -769,24 +727,29 @@ static int exynos_iommu_attach_device(struct iommu_domain *domain,
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static void exynos_iommu_detach_device(struct iommu_domain *domain,
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struct device *dev)
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{
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struct exynos_iommu_owner *owner;
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struct exynos_iommu_domain *priv = to_exynos_domain(domain);
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phys_addr_t pagetable = virt_to_phys(priv->pgtable);
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struct sysmmu_drvdata *data;
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unsigned long flags;
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bool found = false;
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if (!has_sysmmu(dev))
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return;
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spin_lock_irqsave(&priv->lock, flags);
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list_for_each_entry(owner, &priv->clients, client) {
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if (owner == dev->archdata.iommu) {
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if (exynos_sysmmu_disable(dev))
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list_del_init(&owner->client);
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list_for_each_entry(data, &priv->clients, domain_node) {
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if (data->master == dev) {
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if (__sysmmu_disable(data)) {
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data->master = NULL;
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list_del_init(&data->domain_node);
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}
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found = true;
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break;
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}
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}
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spin_unlock_irqrestore(&priv->lock, flags);
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if (owner == dev->archdata.iommu)
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if (found)
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dev_dbg(dev, "%s: Detached IOMMU with pgtable %pa\n",
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__func__, &pagetable);
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else
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@ -834,12 +797,11 @@ static sysmmu_pte_t *alloc_lv2entry(struct exynos_iommu_domain *priv,
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* not currently mapped.
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*/
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if (need_flush_flpd_cache) {
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struct exynos_iommu_owner *owner;
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struct sysmmu_drvdata *data;
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spin_lock(&priv->lock);
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list_for_each_entry(owner, &priv->clients, client)
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sysmmu_tlb_invalidate_flpdcache(
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owner->dev, iova);
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list_for_each_entry(data, &priv->clients, domain_node)
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sysmmu_tlb_invalidate_flpdcache(data, iova);
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spin_unlock(&priv->lock);
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}
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}
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@ -874,13 +836,13 @@ static int lv1set_section(struct exynos_iommu_domain *priv,
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spin_lock(&priv->lock);
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if (lv1ent_page_zero(sent)) {
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struct exynos_iommu_owner *owner;
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struct sysmmu_drvdata *data;
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/*
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* Flushing FLPD cache in System MMU v3.3 that may cache a FLPD
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* entry by speculative prefetch of SLPD which has no mapping.
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*/
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list_for_each_entry(owner, &priv->clients, client)
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sysmmu_tlb_invalidate_flpdcache(owner->dev, iova);
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list_for_each_entry(data, &priv->clients, domain_node)
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sysmmu_tlb_invalidate_flpdcache(data, iova);
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}
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spin_unlock(&priv->lock);
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@ -985,13 +947,13 @@ static int exynos_iommu_map(struct iommu_domain *domain, unsigned long l_iova,
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static void exynos_iommu_tlb_invalidate_entry(struct exynos_iommu_domain *priv,
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sysmmu_iova_t iova, size_t size)
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{
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struct exynos_iommu_owner *owner;
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struct sysmmu_drvdata *data;
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unsigned long flags;
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spin_lock_irqsave(&priv->lock, flags);
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list_for_each_entry(owner, &priv->clients, client)
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sysmmu_tlb_invalidate_entry(owner->dev, iova, size);
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list_for_each_entry(data, &priv->clients, domain_node)
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sysmmu_tlb_invalidate_entry(data, iova, size);
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spin_unlock_irqrestore(&priv->lock, flags);
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}
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