[Blackfin] arch: added Minotaur BSP
Signed-off-by: Martin Strubel <hackfin@section5.ch> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
This commit is contained in:
Martin Strubel
Bryan Wu
Родитель
2463ef22bf
Коммит
471b9a6c73
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@ -21,6 +21,12 @@ config PNAV10
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help
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PNAV board support.
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config CAMSIG_MINOTAUR
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bool "Cambridge Signal Processing LTD Minotaur"
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depends on (BF537)
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help
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Board supply package for CSP Minotaur
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config GENERIC_BF537_BOARD
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bool "Generic"
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help
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@ -6,3 +6,4 @@ obj-$(CONFIG_GENERIC_BF537_BOARD) += generic_board.o
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obj-$(CONFIG_BFIN537_STAMP) += stamp.o led.o
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obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o
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obj-$(CONFIG_PNAV10) += pnav10.o
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obj-$(CONFIG_CAMSIG_MINOTAUR) += minotaur.o
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@ -0,0 +1,317 @@
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/*
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*/
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
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#include <linux/usb_isp1362.h>
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#endif
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#include <linux/pata_platform.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/usb_sl811.h>
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#include <asm/dma.h>
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#include <asm/bfin5xx_spi.h>
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#include <asm/reboot.h>
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#include <linux/spi/ad7877.h>
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/*
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* Name the Board for the /proc/cpuinfo
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*/
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char *bfin_board_name = "CamSig Minotaur BF537";
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#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
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static struct resource bfin_pcmcia_cf_resources[] = {
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{
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.start = 0x20310000, /* IO PORT */
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.end = 0x20312000,
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.flags = IORESOURCE_MEM,
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}, {
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.start = 0x20311000, /* Attribute Memory */
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.end = 0x20311FFF,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PF4,
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.end = IRQ_PF4,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
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}, {
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.start = IRQ_PF6, /* Card Detect PF6 */
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.end = IRQ_PF6,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device bfin_pcmcia_cf_device = {
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.name = "bfin_cf_pcmcia",
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.id = -1,
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.num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
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.resource = bfin_pcmcia_cf_resources,
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};
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#endif
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#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
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static struct platform_device rtc_device = {
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.name = "rtc-bfin",
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.id = -1,
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};
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#endif
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#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
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static struct platform_device bfin_mac_device = {
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.name = "bfin_mac",
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};
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#endif
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#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
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static struct resource net2272_bfin_resources[] = {
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{
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.start = 0x20300000,
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.end = 0x20300000 + 0x100,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PF7,
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.end = IRQ_PF7,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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static struct platform_device net2272_bfin_device = {
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.name = "net2272",
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.id = -1,
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.num_resources = ARRAY_SIZE(net2272_bfin_resources),
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.resource = net2272_bfin_resources,
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};
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#endif
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#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
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/* all SPI peripherals info goes here */
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#if defined(CONFIG_MTD_M25P80) \
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|| defined(CONFIG_MTD_M25P80_MODULE)
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/* Partition sizes */
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#define FLASH_SIZE 0x00400000
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#define PSIZE_UBOOT 0x00030000
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#define PSIZE_INITRAMFS 0x00240000
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static struct mtd_partition bfin_spi_flash_partitions[] = {
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{
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.name = "uboot",
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.size = PSIZE_UBOOT,
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.offset = 0x000000,
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.mask_flags = MTD_CAP_ROM
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}, {
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.name = "initramfs",
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.size = PSIZE_INITRAMFS,
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.offset = PSIZE_UBOOT
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}, {
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.name = "opt",
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.size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
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.offset = PSIZE_UBOOT + PSIZE_INITRAMFS,
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}
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};
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static struct flash_platform_data bfin_spi_flash_data = {
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.name = "m25p80",
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.parts = bfin_spi_flash_partitions,
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.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
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.type = "m25p64",
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};
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/* SPI flash chip (m25p64) */
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static struct bfin5xx_spi_chip spi_flash_chip_info = {
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.enable_dma = 0, /* use dma transfer with this chip*/
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.bits_per_word = 8,
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};
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#endif
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#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
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static struct bfin5xx_spi_chip spi_mmc_chip_info = {
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.enable_dma = 1,
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.bits_per_word = 8,
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};
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#endif
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static struct spi_board_info bfin_spi_board_info[] __initdata = {
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#if defined(CONFIG_MTD_M25P80) \
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|| defined(CONFIG_MTD_M25P80_MODULE)
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{
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/* the modalias must be the same as spi device driver name */
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.modalias = "m25p80", /* Name of spi_driver for this device */
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.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0, /* Framework bus number */
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.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
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.platform_data = &bfin_spi_flash_data,
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.controller_data = &spi_flash_chip_info,
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.mode = SPI_MODE_3,
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},
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#endif
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#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
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{
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.modalias = "spi_mmc_dummy",
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.max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = 0,
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.platform_data = NULL,
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.controller_data = &spi_mmc_chip_info,
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.mode = SPI_MODE_3,
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},
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{
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.modalias = "spi_mmc",
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.max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = CONFIG_SPI_MMC_CS_CHAN,
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.platform_data = NULL,
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.controller_data = &spi_mmc_chip_info,
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.mode = SPI_MODE_3,
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},
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#endif
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};
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/* SPI controller data */
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static struct bfin5xx_spi_master bfin_spi0_info = {
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.num_chipselect = 8,
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.enable_dma = 1, /* master has the ability to do dma transfer */
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};
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/* SPI (0) */
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static struct resource bfin_spi0_resource[] = {
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[0] = {
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.start = SPI0_REGBASE,
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.end = SPI0_REGBASE + 0xFF,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = CH_SPI,
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.end = CH_SPI,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device bfin_spi0_device = {
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.name = "bfin-spi",
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.id = 0, /* Bus number */
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.num_resources = ARRAY_SIZE(bfin_spi0_resource),
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.resource = bfin_spi0_resource,
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.dev = {
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.platform_data = &bfin_spi0_info, /* Passed to driver */
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},
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};
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#endif /* spi master and devices */
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#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
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static struct resource bfin_uart_resources[] = {
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{
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.start = 0xFFC00400,
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.end = 0xFFC004FF,
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.flags = IORESOURCE_MEM,
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}, {
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.start = 0xFFC02000,
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.end = 0xFFC020FF,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device bfin_uart_device = {
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.name = "bfin-uart",
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.id = 1,
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.num_resources = ARRAY_SIZE(bfin_uart_resources),
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.resource = bfin_uart_resources,
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};
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#endif
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#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
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static struct resource bfin_twi0_resource[] = {
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[0] = {
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.start = TWI0_REGBASE,
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.end = TWI0_REGBASE + 0xFF,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_TWI,
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.end = IRQ_TWI,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device i2c_bfin_twi_device = {
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.name = "i2c-bfin-twi",
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.id = 0,
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.num_resources = ARRAY_SIZE(bfin_twi0_resource),
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.resource = bfin_twi0_resource,
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};
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#endif
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#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
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static struct platform_device bfin_sport0_uart_device = {
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.name = "bfin-sport-uart",
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.id = 0,
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};
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static struct platform_device bfin_sport1_uart_device = {
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.name = "bfin-sport-uart",
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.id = 1,
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};
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#endif
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static struct platform_device *minotaur_devices[] __initdata = {
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#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
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&bfin_pcmcia_cf_device,
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#endif
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#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
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&rtc_device,
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#endif
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#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
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&bfin_mac_device,
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#endif
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#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
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&net2272_bfin_device,
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#endif
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#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
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&bfin_spi0_device,
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#endif
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#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
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&bfin_uart_device,
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#endif
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#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
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&i2c_bfin_twi_device,
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#endif
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#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
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&bfin_sport0_uart_device,
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&bfin_sport1_uart_device,
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#endif
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};
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static int __init minotaur_init(void)
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{
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printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
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platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
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#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
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spi_register_board_info(bfin_spi_board_info,
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ARRAY_SIZE(bfin_spi_board_info));
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#endif
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return 0;
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}
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arch_initcall(minotaur_init);
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void native_machine_restart(char *cmd)
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{
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/* workaround reboot hang when booting from SPI */
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if ((bfin_read_SYSCR() & 0x7) == 0x3)
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bfin_gpio_reset_spi0_ssel1();
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}
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