Merge commit '4f3530f4a41d49c41015020cd9a5ed5c95b5d2db' into omap-for-v4.20/ti-sysc
This commit is contained in:
Коммит
472c54f019
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@ -2160,6 +2160,37 @@ static int of_dev_hwmod_lookup(struct device_node *np,
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return -ENODEV;
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}
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/**
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* omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
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*
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* @oh: struct omap_hwmod *
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* @np: struct device_node *
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*
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* Fix up module register offsets for modules with mpu_rt_idx.
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* Only needed for cpsw with interconnect target module defined
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* in device tree while still using legacy hwmod platform data
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* for rev, sysc and syss registers.
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*
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* Can be removed when all cpsw hwmod platform data has been
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* dropped.
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*/
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static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh,
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struct device_node *np,
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struct resource *res)
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{
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struct device_node *child = NULL;
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int error;
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child = of_get_next_child(np, child);
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if (!child)
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return;
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error = of_address_to_resource(child, oh->mpu_rt_idx, res);
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if (error)
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pr_err("%s: error mapping mpu_rt_idx: %i\n",
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__func__, error);
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}
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/**
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* omap_hwmod_parse_module_range - map module IO range from device tree
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* @oh: struct omap_hwmod *
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@ -2220,7 +2251,13 @@ int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
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size = be32_to_cpup(ranges);
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pr_debug("omap_hwmod: %s %s at 0x%llx size 0x%llx\n",
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oh->name, np->name, base, size);
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oh ? oh->name : "", np->name, base, size);
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if (oh && oh->mpu_rt_idx) {
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omap_hwmod_fix_mpu_rt_idx(oh, np, res);
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return 0;
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}
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res->start = base;
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res->end = base + size - 1;
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@ -499,32 +499,29 @@ static int sysc_check_registers(struct sysc *ddata)
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/**
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* syc_ioremap - ioremap register space for the interconnect target module
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* @ddata: deviec driver data
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* @ddata: device driver data
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*
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* Note that the interconnect target module registers can be anywhere
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* within the first child device address space. For example, SGX has
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* them at offset 0x1fc00 in the 32MB module address space. We just
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* what we need around the interconnect target module registers.
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* within the interconnect target module range. For example, SGX has
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* them at offset 0x1fc00 in the 32MB module address space. And cpsw
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* has them at offset 0x1200 in the CPSW_WR child. Usually the
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* the interconnect target module registers are at the beginning of
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* the module range though.
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*/
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static int sysc_ioremap(struct sysc *ddata)
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{
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u32 size = 0;
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int size;
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if (ddata->offsets[SYSC_SYSSTATUS] >= 0)
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size = ddata->offsets[SYSC_SYSSTATUS];
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else if (ddata->offsets[SYSC_SYSCONFIG] >= 0)
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size = ddata->offsets[SYSC_SYSCONFIG];
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else if (ddata->offsets[SYSC_REVISION] >= 0)
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size = ddata->offsets[SYSC_REVISION];
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else
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size = max3(ddata->offsets[SYSC_REVISION],
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ddata->offsets[SYSC_SYSCONFIG],
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ddata->offsets[SYSC_SYSSTATUS]);
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if (size < 0 || (size + sizeof(u32)) > ddata->module_size)
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return -EINVAL;
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size &= 0xfff00;
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size += SZ_256;
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ddata->module_va = devm_ioremap(ddata->dev,
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ddata->module_pa,
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size);
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size + sizeof(u32));
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if (!ddata->module_va)
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return -EIO;
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@ -1251,10 +1248,10 @@ static int sysc_child_suspend_noirq(struct device *dev)
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if (!pm_runtime_status_suspended(dev)) {
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error = pm_generic_runtime_suspend(dev);
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if (error) {
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dev_err(dev, "%s error at %i: %i\n",
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__func__, __LINE__, error);
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dev_warn(dev, "%s busy at %i: %i\n",
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__func__, __LINE__, error);
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return error;
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return 0;
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}
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error = sysc_runtime_suspend(ddata->dev);
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