ARM: dts: exynos: Fix imprecise abort on Mali GPU probe on Exynos4210

The PMU module of Mali400 GPU is optional and it looks that it is not
present on Exynos4210, because any access to its registers causes external
abort. This patch removes "pmu" interrupt for Exynos4210 SoCs, so the
driver will skip the PMU module. This fixes following fault during kernel
boot:

    Unhandled fault: imprecise external abort (0x1406) at 0x00000000
    (lima_pmu_init) from [<c059e6f8>] (lima_device_init+0x244/0x5a0)
    (lima_device_init) from [<c059e40c>] (lima_pdev_probe+0x7c/0xd8)
    (lima_pdev_probe) from [<c05afcb8>] (platform_drv_probe+0x48/0x9c)
    (platform_drv_probe) from [<c05ad594>] (really_probe+0x1c4/0x400)
    (really_probe) from [<c05ad988>] (driver_probe_device+0x78/0x1b8)
    (driver_probe_device) from [<c05add30>] (device_driver_attach+0x58/0x60)
    (device_driver_attach) from [<c05ade34>] (__driver_attach+0xfc/0x160)
    (__driver_attach) from [<c05ab650>] (bus_for_each_dev+0x68/0xb4)
    (bus_for_each_dev) from [<c05ac734>] (bus_add_driver+0x104/0x20c)
    (bus_add_driver) from [<c05aece0>] (driver_register+0x78/0x10c)
    (driver_register) from [<c0103214>] (do_one_initcall+0x8c/0x430)
    (do_one_initcall) from [<c0f01328>] (kernel_init_freeable+0x3c8/0x4d0)
    (kernel_init_freeable) from [<c0ac3aa0>] (kernel_init+0x8/0x10c)
    (kernel_init) from [<c01010b4>] (ret_from_fork+0x14/0x20)

The PMU module seems to work fine on Exynos4412 SoCs, so the patch also
moves the interrupt definitions to exynos4210.dtsi and exynos4412.dtsi
respectively, to keep only the common part in exynos4.dtsi.

Fixes: 13efd80aca ("ARM: dts: exynos: Add GPU/Mali 400 node to Exynos4")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

arch/arm/boot/dts/exynos4.dtsi

@@ -54,28 +54,6 @@
 	gpu: gpu@13000000 {
 		compatible = "samsung,exynos4210-mali", "arm,mali-400";
 		reg = <0x13000000 0x10000>;
-		interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "gp",
-				  "gpmmu",
-				  "pp0",
-				  "ppmmu0",
-				  "pp1",
-				  "ppmmu1",
-				  "pp2",
-				  "ppmmu2",
-				  "pp3",
-				  "ppmmu3",
-				  "pmu";
 		/*
 		 * CLK_G3D is not actually bus clock but a IP-level clock.
 		 * The bus clock is not described in hardware manual.

arch/arm/boot/dts/exynos4210.dtsi

@@ -450,6 +450,26 @@
 };
 
 &gpu {
+	interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+	interrupt-names = "gp",
+			  "gpmmu",
+			  "pp0",
+			  "ppmmu0",
+			  "pp1",
+			  "ppmmu1",
+			  "pp2",
+			  "ppmmu2",
+			  "pp3",
+			  "ppmmu3";
 	operating-points-v2 = <&gpu_opp_table>;
 
 	gpu_opp_table: opp_table {

arch/arm/boot/dts/exynos4412.dtsi

@@ -717,6 +717,28 @@
 };
 
 &gpu {
+	interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+	interrupt-names = "gp",
+			  "gpmmu",
+			  "pp0",
+			  "ppmmu0",
+			  "pp1",
+			  "ppmmu1",
+			  "pp2",
+			  "ppmmu2",
+			  "pp3",
+			  "ppmmu3",
+			  "pmu";
 	operating-points-v2 = <&gpu_opp_table>;
 
 	gpu_opp_table: opp_table {