mvebu dt64 for 5.12 (part 1)

- rename u-boot mtd partition to a53-firmware on Turris Mox (Armada 3720 based)
  - improve SDHCI support on AP807 based board
  - move SATA comphy into main armada-37xx.dtsi
  - add Armada 8K/7K PWM support
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Merge tag 'mvebu-dt64-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt

mvebu dt64 for 5.12 (part 1)

 - rename u-boot mtd partition to a53-firmware on Turris Mox (Armada 3720 based)
 - improve SDHCI support on AP807 based board
 - move SATA comphy into main armada-37xx.dtsi
 - add Armada 8K/7K PWM support

* tag 'mvebu-dt64-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  arm64: dts: armada: add pwm offsets for ap/cp gpios
  arm64: dts: marvell: armada-37xx: Add SATA comphy into main armada-37xx.dtsi file
  arm64: dts: cn913x-db: enable MMC HS400
  arm64: dts: change AP807 SDHCI compatibility string
  arm64: dts: armada-3720-turris-mox: rename u-boot mtd partition to a53-firmware

Link: https://lore.kernel.org/r/87pn1jn48s.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi

@@ -67,8 +67,6 @@
 /* J6 */
 &sata {
 	status = "okay";
-	phys = <&comphy2 0>;
-	phy-names = "sata-phy";
 };
 
 /* U11 */

arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts

@@ -205,7 +205,7 @@
 			};
 
 			partition@20000 {
-				label = "u-boot";
+				label = "a53-firmware";
 				reg = <0x20000 0x160000>;
 			};
 

arch/arm64/boot/dts/marvell/armada-37xx.dtsi

@@ -458,6 +458,8 @@
 				reg = <0xe0000 0x178>;
 				interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&nb_periph_clk 1>;
+				phys = <&comphy2 0>;
+				phy-names = "sata-phy";
 				status = "disabled";
 			};
 

arch/arm64/boot/dts/marvell/armada-ap807.dtsi

@@ -27,3 +27,8 @@
 		#clock-cells = <1>;
 	};
 };
+
+&ap_sdhci0 {
+	compatible = "marvell,armada-ap807-sdhci";
+};
+

arch/arm64/boot/dts/marvell/armada-ap80x.dtsi

@@ -281,6 +281,9 @@
 					gpio-controller;
 					#gpio-cells = <2>;
 					gpio-ranges = <&ap_pinctrl 0 0 20>;
+					marvell,pwm-offset = <0x10c0>;
+					#pwm-cells = <2>;
+					clocks = <&ap_clk 3>;
 				};
 			};
 

arch/arm64/boot/dts/marvell/armada-cp11x.dtsi

@@ -234,12 +234,17 @@
 				gpio-controller;
 				#gpio-cells = <2>;
 				gpio-ranges = <&CP11X_LABEL(pinctrl) 0 0 32>;
+				marvell,pwm-offset = <0x1f0>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				interrupts = <86 IRQ_TYPE_LEVEL_HIGH>,
 					<85 IRQ_TYPE_LEVEL_HIGH>,
 					<84 IRQ_TYPE_LEVEL_HIGH>,
 					<83 IRQ_TYPE_LEVEL_HIGH>;
 				#interrupt-cells = <2>;
+				clock-names = "core", "axi";
+				clocks = <&CP11X_LABEL(clk) 1 21>,
+					 <&CP11X_LABEL(clk) 1 17>;
 				status = "disabled";
 			};
 
@@ -250,12 +255,17 @@
 				gpio-controller;
 				#gpio-cells = <2>;
 				gpio-ranges = <&CP11X_LABEL(pinctrl) 0 32 31>;
+				marvell,pwm-offset = <0x1f0>;
+				#pwm-cells = <2>;
 				interrupt-controller;
 				interrupts = <82 IRQ_TYPE_LEVEL_HIGH>,
 					<81 IRQ_TYPE_LEVEL_HIGH>,
 					<80 IRQ_TYPE_LEVEL_HIGH>,
 					<79 IRQ_TYPE_LEVEL_HIGH>;
 				#interrupt-cells = <2>;
+				clock-names = "core", "axi";
+				clocks = <&CP11X_LABEL(clk) 1 21>,
+					 <&CP11X_LABEL(clk) 1 17>;
 				status = "disabled";
 			};
 		};

arch/arm64/boot/dts/marvell/cn9130-db.dts

@@ -113,6 +113,8 @@
 &ap_sdhci0 {
 	pinctrl-names = "default";
 	bus-width = <8>;
+	mmc-ddr-1_8v;
+	mmc-hs400-1_8v;
 	vqmmc-supply = <&ap0_reg_sd_vccq>;
 	status = "okay";
 };