drm/i915: Compute proper intermediate wms for vlv/cvh
Since the watermark registers arent double buffered on VLV/CHV, we'll need to play around with intermediate watermarks same was as we do on ILK-BDW. The watermark registers on VLV/CHV contain inverted values, so to find the intermediate watermark value we just take the minimum of the active and optimal values. This also means that, unlike ILK-BDW, there's no chance that we'd fail to find a working intermediate watermarks. As long as both the active and optimal watermarks are valid the intermediate watermarks will come out valid as well. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170302171508.1666-10-ville.syrjala@linux.intel.com
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@ -538,6 +538,8 @@ struct intel_crtc_wm_state {
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struct {
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/* "raw" watermarks (not inverted) */
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struct vlv_pipe_wm raw[NUM_VLV_WM_LEVELS];
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/* intermediate watermarks (inverted) */
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struct vlv_wm_state intermediate;
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/* optimal watermarks (inverted) */
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struct vlv_wm_state optimal;
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/* display FIFO split */
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@ -1401,6 +1401,45 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
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#undef VLV_FIFO
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static int vlv_compute_intermediate_wm(struct drm_device *dev,
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struct intel_crtc *crtc,
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struct intel_crtc_state *crtc_state)
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{
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struct vlv_wm_state *intermediate = &crtc_state->wm.vlv.intermediate;
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const struct vlv_wm_state *optimal = &crtc_state->wm.vlv.optimal;
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const struct vlv_wm_state *active = &crtc->wm.active.vlv;
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int level;
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intermediate->num_levels = min(optimal->num_levels, active->num_levels);
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intermediate->cxsr = optimal->cxsr & active->cxsr;
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for (level = 0; level < intermediate->num_levels; level++) {
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enum plane_id plane_id;
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for_each_plane_id_on_crtc(crtc, plane_id) {
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intermediate->wm[level].plane[plane_id] =
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min(optimal->wm[level].plane[plane_id],
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active->wm[level].plane[plane_id]);
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}
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intermediate->sr[level].plane = min(optimal->sr[level].plane,
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active->sr[level].plane);
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intermediate->sr[level].cursor = min(optimal->sr[level].cursor,
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active->sr[level].cursor);
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}
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vlv_invalidate_wms(crtc, intermediate, level);
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/*
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* If our intermediate WM are identical to the final WM, then we can
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* omit the post-vblank programming; only update if it's different.
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*/
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if (memcmp(intermediate, optimal, sizeof(*intermediate)) == 0)
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crtc_state->wm.need_postvbl_update = false;
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return 0;
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}
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static void vlv_merge_wm(struct drm_i915_private *dev_priv,
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struct vlv_wm_values *wm)
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{
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@ -1494,7 +1533,22 @@ static void vlv_initial_watermarks(struct intel_atomic_state *state,
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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mutex_lock(&dev_priv->wm.wm_mutex);
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crtc->wm.active.vlv = crtc_state->wm.vlv.optimal;
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crtc->wm.active.vlv = crtc_state->wm.vlv.intermediate;
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vlv_program_watermarks(dev_priv);
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mutex_unlock(&dev_priv->wm.wm_mutex);
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}
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static void vlv_optimize_watermarks(struct intel_atomic_state *state,
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struct intel_crtc_state *crtc_state)
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{
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struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
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if (!crtc_state->wm.need_postvbl_update)
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return;
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mutex_lock(&dev_priv->wm.wm_mutex);
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intel_crtc->wm.active.vlv = crtc_state->wm.vlv.optimal;
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vlv_program_watermarks(dev_priv);
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mutex_unlock(&dev_priv->wm.wm_mutex);
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}
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@ -4695,6 +4749,7 @@ void vlv_wm_get_hw_state(struct drm_device *dev)
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vlv_invalidate_wms(crtc, active, level);
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crtc_state->wm.vlv.optimal = *active;
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crtc_state->wm.vlv.intermediate = *active;
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DRM_DEBUG_KMS("Initial watermarks: pipe %c, plane=%d, cursor=%d, sprite0=%d, sprite1=%d\n",
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pipe_name(pipe),
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@ -7861,7 +7916,9 @@ void intel_init_pm(struct drm_i915_private *dev_priv)
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} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
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vlv_setup_wm_latency(dev_priv);
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dev_priv->display.compute_pipe_wm = vlv_compute_pipe_wm;
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dev_priv->display.compute_intermediate_wm = vlv_compute_intermediate_wm;
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dev_priv->display.initial_watermarks = vlv_initial_watermarks;
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dev_priv->display.optimize_watermarks = vlv_optimize_watermarks;
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dev_priv->display.atomic_update_watermarks = vlv_atomic_update_fifo;
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} else if (IS_PINEVIEW(dev_priv)) {
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if (!intel_get_cxsr_latency(IS_PINEVIEW_G(dev_priv),
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