Merge branch 'mpic' into next
This commit is contained in:
Коммит
48b1bf86c3
|
@ -251,6 +251,9 @@ struct mpic_irq_save {
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/* The instance data of a given MPIC */
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struct mpic
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{
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/* The OpenFirmware dt node for this MPIC */
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struct device_node *node;
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/* The remapper for this MPIC */
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struct irq_host *irqhost;
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@ -293,6 +296,9 @@ struct mpic
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/* Register access method */
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enum mpic_reg_type reg_type;
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/* The physical base address of the MPIC */
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phys_addr_t paddr;
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/* The various ioremap'ed bases */
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struct mpic_reg_bank gregs;
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struct mpic_reg_bank tmregs;
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@ -331,11 +337,11 @@ struct mpic
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* Note setting any ID (leaving those bits to 0) means standard MPIC
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*/
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/* This is the primary controller, only that one has IPIs and
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* has afinity control. A non-primary MPIC always uses CPU0
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* registers only
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/*
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* This is a secondary ("chained") controller; it only uses the CPU0
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* registers. Primary controllers have IPIs and affinity control.
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*/
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#define MPIC_PRIMARY 0x00000001
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#define MPIC_SECONDARY 0x00000001
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/* Set this for a big-endian MPIC */
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#define MPIC_BIG_ENDIAN 0x00000002
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@ -71,7 +71,7 @@ static void __init iss4xx_init_irq(void)
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/* The MPIC driver will get everything it needs from the
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* device-tree, just pass 0 to all arguments
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*/
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struct mpic *mpic = mpic_alloc(np, 0, MPIC_PRIMARY, 0, 0,
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struct mpic *mpic = mpic_alloc(np, 0, 0, 0, 0,
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" MPIC ");
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BUG_ON(mpic == NULL);
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mpic_init(mpic);
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@ -31,32 +31,18 @@
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#include <linux/of_platform.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include "smp.h"
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void __init corenet_ds_pic_init(void)
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{
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struct mpic *mpic;
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struct resource r;
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struct device_node *np = NULL;
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unsigned int flags = MPIC_PRIMARY | MPIC_BIG_ENDIAN |
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unsigned int flags = MPIC_BIG_ENDIAN |
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MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU;
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np = of_find_node_by_type(np, "open-pic");
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if (np == NULL) {
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printk(KERN_ERR "Could not find open-pic node\n");
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return;
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}
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if (of_address_to_resource(np, 0, &r)) {
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printk(KERN_ERR "Failed to map mpic register space\n");
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of_node_put(np);
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return;
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}
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if (ppc_md.get_irq == mpic_get_coreint_irq)
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flags |= MPIC_ENABLE_COREINT;
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mpic = mpic_alloc(np, r.start, flags, 0, 256, " OpenPIC ");
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mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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mpic_init(mpic);
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@ -65,10 +51,6 @@ void __init corenet_ds_pic_init(void)
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/*
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* Setup the architecture
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*/
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#ifdef CONFIG_SMP
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void __init mpc85xx_smp_init(void);
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#endif
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void __init corenet_ds_setup_arch(void)
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{
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#ifdef CONFIG_PCI
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@ -77,9 +59,7 @@ void __init corenet_ds_setup_arch(void)
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#endif
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dma_addr_t max = 0xffffffff;
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#ifdef CONFIG_SMP
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mpc85xx_smp_init();
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#endif
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#ifdef CONFIG_PCI
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for_each_node_by_type(np, "pci") {
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@ -57,29 +57,10 @@ static void machine_restart(char *cmd)
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static void __init ksi8560_pic_init(void)
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{
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struct mpic *mpic;
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struct resource r;
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struct device_node *np;
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np = of_find_node_by_type(NULL, "open-pic");
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if (np == NULL) {
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printk(KERN_ERR "Could not find open-pic node\n");
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return;
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}
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if (of_address_to_resource(np, 0, &r)) {
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printk(KERN_ERR "Could not map mpic register space\n");
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of_node_put(np);
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return;
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}
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mpic = mpic_alloc(np, r.start,
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MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
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struct mpic *mpic = mpic_alloc(NULL, 0,
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MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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of_node_put(np);
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mpic_init(mpic);
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mpc85xx_cpm2_pic_init();
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@ -36,29 +36,11 @@
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void __init mpc8536_ds_pic_init(void)
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{
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struct mpic *mpic;
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struct resource r;
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struct device_node *np;
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np = of_find_node_by_type(NULL, "open-pic");
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if (np == NULL) {
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printk(KERN_ERR "Could not find open-pic node\n");
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return;
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}
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if (of_address_to_resource(np, 0, &r)) {
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printk(KERN_ERR "Failed to map mpic register space\n");
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of_node_put(np);
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return;
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}
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mpic = mpic_alloc(np, r.start,
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MPIC_PRIMARY | MPIC_WANTS_RESET |
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struct mpic *mpic = mpic_alloc(NULL, 0,
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MPIC_WANTS_RESET |
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MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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of_node_put(np);
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mpic_init(mpic);
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}
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@ -50,28 +50,10 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
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static void __init mpc85xx_ads_pic_init(void)
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{
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struct mpic *mpic;
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struct resource r;
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struct device_node *np = NULL;
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np = of_find_node_by_type(np, "open-pic");
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if (!np) {
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printk(KERN_ERR "Could not find open-pic node\n");
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return;
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}
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if (of_address_to_resource(np, 0, &r)) {
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printk(KERN_ERR "Could not map mpic register space\n");
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of_node_put(np);
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return;
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}
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mpic = mpic_alloc(np, r.start,
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MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
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struct mpic *mpic = mpic_alloc(NULL, 0,
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MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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of_node_put(np);
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mpic_init(mpic);
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mpc85xx_cpm2_pic_init();
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@ -188,30 +188,10 @@ static struct irqaction mpc85xxcds_8259_irqaction = {
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static void __init mpc85xx_cds_pic_init(void)
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{
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struct mpic *mpic;
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struct resource r;
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struct device_node *np = NULL;
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np = of_find_node_by_type(np, "open-pic");
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if (np == NULL) {
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printk(KERN_ERR "Could not find open-pic node\n");
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return;
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}
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if (of_address_to_resource(np, 0, &r)) {
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printk(KERN_ERR "Failed to map mpic register space\n");
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of_node_put(np);
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return;
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}
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mpic = mpic_alloc(np, r.start,
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MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
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mpic = mpic_alloc(NULL, 0,
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MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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/* Return the mpic node */
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of_node_put(np);
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mpic_init(mpic);
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}
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@ -35,6 +35,7 @@
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include "smp.h"
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#include "mpc85xx.h"
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@ -62,43 +63,27 @@ static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
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void __init mpc85xx_ds_pic_init(void)
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{
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struct mpic *mpic;
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struct resource r;
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struct device_node *np;
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#ifdef CONFIG_PPC_I8259
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struct device_node *np;
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struct device_node *cascade_node = NULL;
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int cascade_irq;
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#endif
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unsigned long root = of_get_flat_dt_root();
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np = of_find_node_by_type(NULL, "open-pic");
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if (np == NULL) {
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printk(KERN_ERR "Could not find open-pic node\n");
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return;
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}
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if (of_address_to_resource(np, 0, &r)) {
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printk(KERN_ERR "Failed to map mpic register space\n");
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of_node_put(np);
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return;
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}
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if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
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mpic = mpic_alloc(np, r.start,
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MPIC_PRIMARY |
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mpic = mpic_alloc(NULL, 0,
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MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
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MPIC_SINGLE_DEST_CPU,
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0, 256, " OpenPIC ");
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} else {
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mpic = mpic_alloc(np, r.start,
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MPIC_PRIMARY | MPIC_WANTS_RESET |
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mpic = mpic_alloc(NULL, 0,
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MPIC_WANTS_RESET |
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MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
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MPIC_SINGLE_DEST_CPU,
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0, 256, " OpenPIC ");
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}
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BUG_ON(mpic == NULL);
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of_node_put(np);
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mpic_init(mpic);
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#ifdef CONFIG_PPC_I8259
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|
@ -154,9 +139,6 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
|
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/*
|
||||
* Setup the architecture
|
||||
*/
|
||||
#ifdef CONFIG_SMP
|
||||
extern void __init mpc85xx_smp_init(void);
|
||||
#endif
|
||||
static void __init mpc85xx_ds_setup_arch(void)
|
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{
|
||||
#ifdef CONFIG_PCI
|
||||
|
@ -189,9 +171,7 @@ static void __init mpc85xx_ds_setup_arch(void)
|
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ppc_md.pci_exclude_device = mpc85xx_exclude_device;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SMP
|
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mpc85xx_smp_init();
|
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#endif
|
||||
|
||||
#ifdef CONFIG_SWIOTLB
|
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if (memblock_end_of_DRAM() > max) {
|
||||
|
|
|
@ -51,6 +51,7 @@
|
|||
#include <asm/qe_ic.h>
|
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#include <asm/mpic.h>
|
||||
#include <asm/swiotlb.h>
|
||||
#include "smp.h"
|
||||
|
||||
#include "mpc85xx.h"
|
||||
|
||||
|
@ -155,10 +156,6 @@ static int mpc8568_mds_phy_fixups(struct phy_device *phydev)
|
|||
* Setup the architecture
|
||||
*
|
||||
*/
|
||||
#ifdef CONFIG_SMP
|
||||
extern void __init mpc85xx_smp_init(void);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_QUICC_ENGINE
|
||||
static void __init mpc85xx_mds_reset_ucc_phys(void)
|
||||
{
|
||||
|
@ -363,9 +360,7 @@ static void __init mpc85xx_mds_setup_arch(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
mpc85xx_smp_init();
|
||||
#endif
|
||||
|
||||
mpc85xx_mds_qe_init();
|
||||
|
||||
|
@ -439,26 +434,11 @@ machine_arch_initcall(p1021_mds, swiotlb_setup_bus_notifier);
|
|||
|
||||
static void __init mpc85xx_mds_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
struct device_node *np = NULL;
|
||||
|
||||
np = of_find_node_by_type(NULL, "open-pic");
|
||||
if (!np)
|
||||
return;
|
||||
|
||||
if (of_address_to_resource(np, 0, &r)) {
|
||||
printk(KERN_ERR "Failed to map mpic register space\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
mpic = mpic_alloc(np, r.start,
|
||||
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
|
||||
struct mpic *mpic = mpic_alloc(NULL, 0,
|
||||
MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
|
||||
MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
|
||||
0, 256, " OpenPIC ");
|
||||
BUG_ON(mpic == NULL);
|
||||
of_node_put(np);
|
||||
|
||||
mpic_init(mpic);
|
||||
mpc85xx_mds_qeic_init();
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
|
||||
#include <sysdev/fsl_soc.h>
|
||||
#include <sysdev/fsl_pci.h>
|
||||
#include "smp.h"
|
||||
|
||||
#include "mpc85xx.h"
|
||||
|
||||
|
@ -44,49 +45,28 @@
|
|||
void __init mpc85xx_rdb_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
struct device_node *np;
|
||||
unsigned long root = of_get_flat_dt_root();
|
||||
|
||||
np = of_find_node_by_type(NULL, "open-pic");
|
||||
if (np == NULL) {
|
||||
printk(KERN_ERR "Could not find open-pic node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (of_address_to_resource(np, 0, &r)) {
|
||||
printk(KERN_ERR "Failed to map mpic register space\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
|
||||
mpic = mpic_alloc(np, r.start,
|
||||
MPIC_PRIMARY |
|
||||
mpic = mpic_alloc(NULL, 0,
|
||||
MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
|
||||
MPIC_SINGLE_DEST_CPU,
|
||||
0, 256, " OpenPIC ");
|
||||
} else {
|
||||
mpic = mpic_alloc(np, r.start,
|
||||
MPIC_PRIMARY | MPIC_WANTS_RESET |
|
||||
mpic = mpic_alloc(NULL, 0,
|
||||
MPIC_WANTS_RESET |
|
||||
MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
|
||||
MPIC_SINGLE_DEST_CPU,
|
||||
0, 256, " OpenPIC ");
|
||||
}
|
||||
|
||||
BUG_ON(mpic == NULL);
|
||||
of_node_put(np);
|
||||
|
||||
mpic_init(mpic);
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* Setup the architecture
|
||||
*/
|
||||
#ifdef CONFIG_SMP
|
||||
extern void __init mpc85xx_smp_init(void);
|
||||
#endif
|
||||
static void __init mpc85xx_rdb_setup_arch(void)
|
||||
{
|
||||
#ifdef CONFIG_PCI
|
||||
|
@ -104,10 +84,7 @@ static void __init mpc85xx_rdb_setup_arch(void)
|
|||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
mpc85xx_smp_init();
|
||||
#endif
|
||||
|
||||
printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
|
||||
}
|
||||
|
||||
|
|
|
@ -32,24 +32,9 @@
|
|||
|
||||
void __init p1010_rdb_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_node_by_type(NULL, "open-pic");
|
||||
if (np == NULL) {
|
||||
printk(KERN_ERR "Could not find open-pic node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (of_address_to_resource(np, 0, &r)) {
|
||||
printk(KERN_ERR "Failed to map mpic register space\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
mpic = mpic_alloc(np, r.start, MPIC_PRIMARY | MPIC_WANTS_RESET |
|
||||
MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
|
||||
struct mpic *mpic = mpic_alloc(NULL, 0,
|
||||
MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
|
||||
MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
|
||||
0, 256, " OpenPIC ");
|
||||
|
||||
BUG_ON(mpic == NULL);
|
||||
|
|
|
@ -26,6 +26,7 @@
|
|||
#include <sysdev/fsl_soc.h>
|
||||
#include <sysdev/fsl_pci.h>
|
||||
#include <asm/fsl_guts.h>
|
||||
#include "smp.h"
|
||||
|
||||
#include "mpc85xx.h"
|
||||
|
||||
|
@ -240,38 +241,15 @@ p1022ds_valid_monitor_port(enum fsl_diu_monitor_port port)
|
|||
|
||||
void __init p1022_ds_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_node_by_type(NULL, "open-pic");
|
||||
if (!np) {
|
||||
pr_err("Could not find open-pic node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (of_address_to_resource(np, 0, &r)) {
|
||||
pr_err("Failed to map mpic register space\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
mpic = mpic_alloc(np, r.start,
|
||||
MPIC_PRIMARY | MPIC_WANTS_RESET |
|
||||
struct mpic *mpic = mpic_alloc(NULL, 0,
|
||||
MPIC_WANTS_RESET |
|
||||
MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
|
||||
MPIC_SINGLE_DEST_CPU,
|
||||
0, 256, " OpenPIC ");
|
||||
|
||||
BUG_ON(mpic == NULL);
|
||||
of_node_put(np);
|
||||
|
||||
mpic_init(mpic);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
void __init mpc85xx_smp_init(void);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Setup the architecture
|
||||
*/
|
||||
|
@ -311,9 +289,7 @@ static void __init p1022_ds_setup_arch(void)
|
|||
diu_ops.valid_monitor_port = p1022ds_valid_monitor_port;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
mpc85xx_smp_init();
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SWIOTLB
|
||||
if (memblock_end_of_DRAM() > max) {
|
||||
|
|
|
@ -30,6 +30,7 @@
|
|||
#include <asm/prom.h>
|
||||
#include <asm/udbg.h>
|
||||
#include <asm/mpic.h>
|
||||
#include "smp.h"
|
||||
|
||||
#include <sysdev/fsl_soc.h>
|
||||
#include <sysdev/fsl_pci.h>
|
||||
|
@ -41,10 +42,6 @@
|
|||
* Setup the architecture
|
||||
*
|
||||
*/
|
||||
#ifdef CONFIG_SMP
|
||||
void __init mpc85xx_smp_init(void);
|
||||
#endif
|
||||
|
||||
static void __init mpc85xx_rds_setup_arch(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
@ -89,33 +86,15 @@ static void __init mpc85xx_rds_setup_arch(void)
|
|||
fsl_add_bridge(np, 0);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
mpc85xx_smp_init();
|
||||
#endif
|
||||
}
|
||||
|
||||
machine_device_initcall(p1023_rds, mpc85xx_common_publish_devices);
|
||||
|
||||
static void __init mpc85xx_rds_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
struct device_node *np = NULL;
|
||||
|
||||
np = of_find_node_by_type(NULL, "open-pic");
|
||||
if (!np) {
|
||||
printk(KERN_ERR "Could not find open-pic node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (of_address_to_resource(np, 0, &r)) {
|
||||
printk(KERN_ERR "Failed to map mpic register space\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
mpic = mpic_alloc(np, r.start,
|
||||
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
|
||||
struct mpic *mpic = mpic_alloc(NULL, 0,
|
||||
MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
|
||||
MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
|
||||
0, 256, " OpenPIC ");
|
||||
|
||||
|
|
|
@ -54,31 +54,10 @@ static int sbc_rev;
|
|||
|
||||
static void __init sbc8548_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
struct device_node *np = NULL;
|
||||
|
||||
np = of_find_node_by_type(np, "open-pic");
|
||||
|
||||
if (np == NULL) {
|
||||
printk(KERN_ERR "Could not find open-pic node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (of_address_to_resource(np, 0, &r)) {
|
||||
printk(KERN_ERR "Failed to map mpic register space\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
mpic = mpic_alloc(np, r.start,
|
||||
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
|
||||
struct mpic *mpic = mpic_alloc(NULL, 0,
|
||||
MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
|
||||
0, 256, " OpenPIC ");
|
||||
BUG_ON(mpic == NULL);
|
||||
|
||||
/* Return the mpic node */
|
||||
of_node_put(np);
|
||||
|
||||
mpic_init(mpic);
|
||||
}
|
||||
|
||||
|
|
|
@ -41,28 +41,10 @@
|
|||
|
||||
static void __init sbc8560_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
struct device_node *np = NULL;
|
||||
|
||||
np = of_find_node_by_type(np, "open-pic");
|
||||
if (!np) {
|
||||
printk(KERN_ERR "Could not find open-pic node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (of_address_to_resource(np, 0, &r)) {
|
||||
printk(KERN_ERR "Could not map mpic register space\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
mpic = mpic_alloc(np, r.start,
|
||||
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
|
||||
struct mpic *mpic = mpic_alloc(NULL, 0,
|
||||
MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
|
||||
0, 256, " OpenPIC ");
|
||||
BUG_ON(mpic == NULL);
|
||||
of_node_put(np);
|
||||
|
||||
mpic_init(mpic);
|
||||
|
||||
mpc85xx_cpm2_pic_init();
|
||||
|
|
|
@ -27,6 +27,7 @@
|
|||
|
||||
#include <sysdev/fsl_soc.h>
|
||||
#include <sysdev/mpic.h>
|
||||
#include "smp.h"
|
||||
|
||||
extern void __early_start(void);
|
||||
|
||||
|
|
|
@ -0,0 +1,15 @@
|
|||
#ifndef POWERPC_85XX_SMP_H_
|
||||
#define POWERPC_85XX_SMP_H_ 1
|
||||
|
||||
#include <linux/init.h>
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
void __init mpc85xx_smp_init(void);
|
||||
#else
|
||||
static inline void mpc85xx_smp_init(void)
|
||||
{
|
||||
/* Nothing to do */
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* not POWERPC_85XX_SMP_H_ */
|
|
@ -46,28 +46,12 @@
|
|||
|
||||
static void __init socrates_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_node_by_type(NULL, "open-pic");
|
||||
if (!np) {
|
||||
printk(KERN_ERR "Could not find open-pic node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (of_address_to_resource(np, 0, &r)) {
|
||||
printk(KERN_ERR "Could not map mpic register space\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
mpic = mpic_alloc(np, r.start,
|
||||
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
|
||||
struct mpic *mpic = mpic_alloc(NULL, 0,
|
||||
MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
|
||||
0, 256, " OpenPIC ");
|
||||
BUG_ON(mpic == NULL);
|
||||
of_node_put(np);
|
||||
|
||||
mpic_init(mpic);
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "abb,socrates-fpga-pic");
|
||||
|
|
|
@ -48,28 +48,10 @@
|
|||
|
||||
static void __init stx_gp3_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_node_by_type(NULL, "open-pic");
|
||||
if (!np) {
|
||||
printk(KERN_ERR "Could not find open-pic node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (of_address_to_resource(np, 0, &r)) {
|
||||
printk(KERN_ERR "Could not map mpic register space\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
mpic = mpic_alloc(np, r.start,
|
||||
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
|
||||
struct mpic *mpic = mpic_alloc(NULL, 0,
|
||||
MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
|
||||
0, 256, " OpenPIC ");
|
||||
BUG_ON(mpic == NULL);
|
||||
of_node_put(np);
|
||||
|
||||
mpic_init(mpic);
|
||||
|
||||
mpc85xx_cpm2_pic_init();
|
||||
|
|
|
@ -46,28 +46,10 @@
|
|||
|
||||
static void __init tqm85xx_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_node_by_type(NULL, "open-pic");
|
||||
if (!np) {
|
||||
printk(KERN_ERR "Could not find open-pic node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (of_address_to_resource(np, 0, &r)) {
|
||||
printk(KERN_ERR "Could not map mpic register space\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
mpic = mpic_alloc(np, r.start,
|
||||
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
|
||||
struct mpic *mpic = mpic_alloc(NULL, 0,
|
||||
MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
|
||||
0, 256, " OpenPIC ");
|
||||
BUG_ON(mpic == NULL);
|
||||
of_node_put(np);
|
||||
|
||||
mpic_init(mpic);
|
||||
|
||||
mpc85xx_cpm2_pic_init();
|
||||
|
|
|
@ -32,6 +32,7 @@
|
|||
|
||||
#include <sysdev/fsl_soc.h>
|
||||
#include <sysdev/fsl_pci.h>
|
||||
#include "smp.h"
|
||||
|
||||
#include "mpc85xx.h"
|
||||
|
||||
|
@ -42,29 +43,11 @@
|
|||
|
||||
void __init xes_mpc85xx_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_node_by_type(NULL, "open-pic");
|
||||
if (np == NULL) {
|
||||
printk(KERN_ERR "Could not find open-pic node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (of_address_to_resource(np, 0, &r)) {
|
||||
printk(KERN_ERR "Failed to map mpic register space\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
mpic = mpic_alloc(np, r.start,
|
||||
MPIC_PRIMARY | MPIC_WANTS_RESET |
|
||||
struct mpic *mpic = mpic_alloc(NULL, 0,
|
||||
MPIC_WANTS_RESET |
|
||||
MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
|
||||
0, 256, " OpenPIC ");
|
||||
BUG_ON(mpic == NULL);
|
||||
of_node_put(np);
|
||||
|
||||
mpic_init(mpic);
|
||||
}
|
||||
|
||||
|
@ -138,9 +121,6 @@ static int primary_phb_addr;
|
|||
/*
|
||||
* Setup the architecture
|
||||
*/
|
||||
#ifdef CONFIG_SMP
|
||||
extern void __init mpc85xx_smp_init(void);
|
||||
#endif
|
||||
static void __init xes_mpc85xx_setup_arch(void)
|
||||
{
|
||||
#ifdef CONFIG_PCI
|
||||
|
@ -174,9 +154,7 @@ static void __init xes_mpc85xx_setup_arch(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
mpc85xx_smp_init();
|
||||
#endif
|
||||
}
|
||||
|
||||
machine_device_initcall(xes_mpc8572, mpc85xx_common_publish_devices);
|
||||
|
|
|
@ -31,26 +31,16 @@ static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
|
|||
|
||||
void __init mpc86xx_init_irq(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct device_node *np;
|
||||
struct resource res;
|
||||
#ifdef CONFIG_PPC_I8259
|
||||
struct device_node *np;
|
||||
struct device_node *cascade_node = NULL;
|
||||
int cascade_irq;
|
||||
#endif
|
||||
|
||||
/* Determine PIC address. */
|
||||
np = of_find_node_by_type(NULL, "open-pic");
|
||||
if (np == NULL)
|
||||
return;
|
||||
of_address_to_resource(np, 0, &res);
|
||||
|
||||
mpic = mpic_alloc(np, res.start,
|
||||
MPIC_PRIMARY | MPIC_WANTS_RESET |
|
||||
MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
|
||||
MPIC_SINGLE_DEST_CPU,
|
||||
struct mpic *mpic = mpic_alloc(NULL, 0,
|
||||
MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
|
||||
MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
|
||||
0, 256, " MPIC ");
|
||||
of_node_put(np);
|
||||
BUG_ON(mpic == NULL);
|
||||
|
||||
mpic_init(mpic);
|
||||
|
|
|
@ -184,24 +184,10 @@ static int __init cell_publish_devices(void)
|
|||
}
|
||||
machine_subsys_initcall(cell, cell_publish_devices);
|
||||
|
||||
static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
struct irq_chip *chip = irq_desc_get_chip(desc);
|
||||
struct mpic *mpic = irq_desc_get_handler_data(desc);
|
||||
unsigned int virq;
|
||||
|
||||
virq = mpic_get_one_irq(mpic);
|
||||
if (virq != NO_IRQ)
|
||||
generic_handle_irq(virq);
|
||||
|
||||
chip->irq_eoi(&desc->irq_data);
|
||||
}
|
||||
|
||||
static void __init mpic_init_IRQ(void)
|
||||
{
|
||||
struct device_node *dn;
|
||||
struct mpic *mpic;
|
||||
unsigned int virq;
|
||||
|
||||
for (dn = NULL;
|
||||
(dn = of_find_node_by_name(dn, "interrupt-controller"));) {
|
||||
|
@ -211,19 +197,10 @@ static void __init mpic_init_IRQ(void)
|
|||
/* The MPIC driver will get everything it needs from the
|
||||
* device-tree, just pass 0 to all arguments
|
||||
*/
|
||||
mpic = mpic_alloc(dn, 0, 0, 0, 0, " MPIC ");
|
||||
mpic = mpic_alloc(dn, 0, MPIC_SECONDARY, 0, 0, " MPIC ");
|
||||
if (mpic == NULL)
|
||||
continue;
|
||||
mpic_init(mpic);
|
||||
|
||||
virq = irq_of_parse_and_map(dn, 0);
|
||||
if (virq == NO_IRQ)
|
||||
continue;
|
||||
|
||||
printk(KERN_INFO "%s : hooking up to IRQ %d\n",
|
||||
dn->full_name, virq);
|
||||
irq_set_handler_data(virq, mpic);
|
||||
irq_set_chained_handler(virq, cell_mpic_cascade);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -435,8 +435,7 @@ static void __init chrp_find_openpic(void)
|
|||
if (len > 1)
|
||||
isu_size = iranges[3];
|
||||
|
||||
chrp_mpic = mpic_alloc(np, opaddr, MPIC_PRIMARY,
|
||||
isu_size, 0, " MPIC ");
|
||||
chrp_mpic = mpic_alloc(np, opaddr, 0, isu_size, 0, " MPIC ");
|
||||
if (chrp_mpic == NULL) {
|
||||
printk(KERN_ERR "Failed to allocate MPIC structure\n");
|
||||
goto bail;
|
||||
|
|
|
@ -148,30 +148,14 @@ static void __init holly_setup_arch(void)
|
|||
static void __init holly_init_IRQ(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
phys_addr_t mpic_paddr = 0;
|
||||
struct device_node *tsi_pic;
|
||||
#ifdef CONFIG_PCI
|
||||
unsigned int cascade_pci_irq;
|
||||
struct device_node *tsi_pci;
|
||||
struct device_node *cascade_node = NULL;
|
||||
#endif
|
||||
|
||||
tsi_pic = of_find_node_by_type(NULL, "open-pic");
|
||||
if (tsi_pic) {
|
||||
unsigned int size;
|
||||
const void *prop = of_get_property(tsi_pic, "reg", &size);
|
||||
mpic_paddr = of_translate_address(tsi_pic, prop);
|
||||
}
|
||||
|
||||
if (mpic_paddr == 0) {
|
||||
printk(KERN_ERR "%s: No tsi108 PIC found !\n", __func__);
|
||||
return;
|
||||
}
|
||||
|
||||
pr_debug("%s: tsi108 pic phys_addr = 0x%x\n", __func__, (u32) mpic_paddr);
|
||||
|
||||
mpic = mpic_alloc(tsi_pic, mpic_paddr,
|
||||
MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
|
||||
mpic = mpic_alloc(NULL, 0,
|
||||
MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
|
||||
MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
|
||||
24,
|
||||
NR_IRQS-4, /* num_sources used */
|
||||
|
@ -179,7 +163,7 @@ static void __init holly_init_IRQ(void)
|
|||
|
||||
BUG_ON(mpic == NULL);
|
||||
|
||||
mpic_assign_isu(mpic, 0, mpic_paddr + 0x100);
|
||||
mpic_assign_isu(mpic, 0, mpic->paddr + 0x100);
|
||||
|
||||
mpic_init(mpic);
|
||||
|
||||
|
@ -204,7 +188,6 @@ static void __init holly_init_IRQ(void)
|
|||
#endif
|
||||
/* Configure MPIC outputs to CPU0 */
|
||||
tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
|
||||
of_node_put(tsi_pic);
|
||||
}
|
||||
|
||||
void holly_show_cpuinfo(struct seq_file *m)
|
||||
|
|
|
@ -81,29 +81,19 @@ static void __init linkstation_setup_arch(void)
|
|||
static void __init linkstation_init_IRQ(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct device_node *dnp;
|
||||
const u32 *prop;
|
||||
int size;
|
||||
phys_addr_t paddr;
|
||||
|
||||
dnp = of_find_node_by_type(NULL, "open-pic");
|
||||
if (dnp == NULL)
|
||||
return;
|
||||
|
||||
prop = of_get_property(dnp, "reg", &size);
|
||||
paddr = (phys_addr_t)of_translate_address(dnp, prop);
|
||||
|
||||
mpic = mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC_WANTS_RESET, 4, 32, " EPIC ");
|
||||
mpic = mpic_alloc(NULL, 0, MPIC_WANTS_RESET,
|
||||
4, 32, " EPIC ");
|
||||
BUG_ON(mpic == NULL);
|
||||
|
||||
/* PCI IRQs */
|
||||
mpic_assign_isu(mpic, 0, paddr + 0x10200);
|
||||
mpic_assign_isu(mpic, 0, mpic->paddr + 0x10200);
|
||||
|
||||
/* I2C */
|
||||
mpic_assign_isu(mpic, 1, paddr + 0x11000);
|
||||
mpic_assign_isu(mpic, 1, mpic->paddr + 0x11000);
|
||||
|
||||
/* ttyS0, ttyS1 */
|
||||
mpic_assign_isu(mpic, 2, paddr + 0x11100);
|
||||
mpic_assign_isu(mpic, 2, mpic->paddr + 0x11100);
|
||||
|
||||
mpic_init(mpic);
|
||||
}
|
||||
|
|
|
@ -102,31 +102,14 @@ static void __init mpc7448_hpc2_setup_arch(void)
|
|||
static void __init mpc7448_hpc2_init_IRQ(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
phys_addr_t mpic_paddr = 0;
|
||||
struct device_node *tsi_pic;
|
||||
#ifdef CONFIG_PCI
|
||||
unsigned int cascade_pci_irq;
|
||||
struct device_node *tsi_pci;
|
||||
struct device_node *cascade_node = NULL;
|
||||
#endif
|
||||
|
||||
tsi_pic = of_find_node_by_type(NULL, "open-pic");
|
||||
if (tsi_pic) {
|
||||
unsigned int size;
|
||||
const void *prop = of_get_property(tsi_pic, "reg", &size);
|
||||
mpic_paddr = of_translate_address(tsi_pic, prop);
|
||||
}
|
||||
|
||||
if (mpic_paddr == 0) {
|
||||
printk("%s: No tsi108 PIC found !\n", __func__);
|
||||
return;
|
||||
}
|
||||
|
||||
DBG("%s: tsi108 pic phys_addr = 0x%x\n", __func__,
|
||||
(u32) mpic_paddr);
|
||||
|
||||
mpic = mpic_alloc(tsi_pic, mpic_paddr,
|
||||
MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
|
||||
mpic = mpic_alloc(NULL, 0,
|
||||
MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
|
||||
MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
|
||||
24,
|
||||
NR_IRQS-4, /* num_sources used */
|
||||
|
@ -134,7 +117,7 @@ static void __init mpc7448_hpc2_init_IRQ(void)
|
|||
|
||||
BUG_ON(mpic == NULL);
|
||||
|
||||
mpic_assign_isu(mpic, 0, mpic_paddr + 0x100);
|
||||
mpic_assign_isu(mpic, 0, mpic->paddr + 0x100);
|
||||
|
||||
mpic_init(mpic);
|
||||
|
||||
|
@ -159,7 +142,6 @@ static void __init mpc7448_hpc2_init_IRQ(void)
|
|||
#endif
|
||||
/* Configure MPIC outputs to CPU0 */
|
||||
tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
|
||||
of_node_put(tsi_pic);
|
||||
}
|
||||
|
||||
void mpc7448_hpc2_show_cpuinfo(struct seq_file *m)
|
||||
|
|
|
@ -83,35 +83,17 @@ static void __init storcenter_setup_arch(void)
|
|||
static void __init storcenter_init_IRQ(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct device_node *dnp;
|
||||
const void *prop;
|
||||
int size;
|
||||
phys_addr_t paddr;
|
||||
|
||||
dnp = of_find_node_by_type(NULL, "open-pic");
|
||||
if (dnp == NULL)
|
||||
return;
|
||||
|
||||
prop = of_get_property(dnp, "reg", &size);
|
||||
if (prop == NULL) {
|
||||
of_node_put(dnp);
|
||||
return;
|
||||
}
|
||||
|
||||
paddr = (phys_addr_t)of_translate_address(dnp, prop);
|
||||
mpic = mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC_WANTS_RESET,
|
||||
mpic = mpic_alloc(NULL, 0, MPIC_WANTS_RESET,
|
||||
16, 32, " OpenPIC ");
|
||||
|
||||
of_node_put(dnp);
|
||||
|
||||
BUG_ON(mpic == NULL);
|
||||
|
||||
/*
|
||||
* 16 Serial Interrupts followed by 16 Internal Interrupts.
|
||||
* I2C is the second internal, so it is at 17, 0x11020.
|
||||
*/
|
||||
mpic_assign_isu(mpic, 0, paddr + 0x10200);
|
||||
mpic_assign_isu(mpic, 1, paddr + 0x11000);
|
||||
mpic_assign_isu(mpic, 0, mpic->paddr + 0x10200);
|
||||
mpic_assign_isu(mpic, 1, mpic->paddr + 0x11000);
|
||||
|
||||
mpic_init(mpic);
|
||||
}
|
||||
|
|
|
@ -221,7 +221,7 @@ static void __init maple_init_IRQ(void)
|
|||
unsigned long openpic_addr = 0;
|
||||
int naddr, n, i, opplen, has_isus = 0;
|
||||
struct mpic *mpic;
|
||||
unsigned int flags = MPIC_PRIMARY;
|
||||
unsigned int flags = 0;
|
||||
|
||||
/* Locate MPIC in the device-tree. Note that there is a bug
|
||||
* in Maple device-tree where the type of the controller is
|
||||
|
|
|
@ -224,7 +224,7 @@ static __init void pas_init_IRQ(void)
|
|||
openpic_addr = of_read_number(opprop, naddr);
|
||||
printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
|
||||
|
||||
mpic_flags = MPIC_PRIMARY | MPIC_LARGE_VECTORS | MPIC_NO_BIAS;
|
||||
mpic_flags = MPIC_LARGE_VECTORS | MPIC_NO_BIAS;
|
||||
|
||||
nmiprop = of_get_property(mpic_node, "nmi-source", NULL);
|
||||
if (nmiprop)
|
||||
|
@ -234,7 +234,7 @@ static __init void pas_init_IRQ(void)
|
|||
mpic_flags, 0, 0, "PASEMI-OPIC");
|
||||
BUG_ON(!mpic);
|
||||
|
||||
mpic_assign_isu(mpic, 0, openpic_addr + 0x10000);
|
||||
mpic_assign_isu(mpic, 0, mpic->paddr + 0x10000);
|
||||
mpic_init(mpic);
|
||||
/* The NMI/MCK source needs to be prio 15 */
|
||||
if (nmiprop) {
|
||||
|
|
|
@ -464,18 +464,6 @@ int of_irq_map_oldworld(struct device_node *device, int index,
|
|||
}
|
||||
#endif /* CONFIG_PPC32 */
|
||||
|
||||
static void pmac_u3_cascade(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
struct irq_chip *chip = irq_desc_get_chip(desc);
|
||||
struct mpic *mpic = irq_desc_get_handler_data(desc);
|
||||
unsigned int cascade_irq = mpic_get_one_irq(mpic);
|
||||
|
||||
if (cascade_irq != NO_IRQ)
|
||||
generic_handle_irq(cascade_irq);
|
||||
|
||||
chip->irq_eoi(&desc->irq_data);
|
||||
}
|
||||
|
||||
static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic)
|
||||
{
|
||||
#if defined(CONFIG_XMON) && defined(CONFIG_PPC32)
|
||||
|
@ -498,14 +486,8 @@ static struct mpic * __init pmac_setup_one_mpic(struct device_node *np,
|
|||
int master)
|
||||
{
|
||||
const char *name = master ? " MPIC 1 " : " MPIC 2 ";
|
||||
struct resource r;
|
||||
struct mpic *mpic;
|
||||
unsigned int flags = master ? MPIC_PRIMARY : 0;
|
||||
int rc;
|
||||
|
||||
rc = of_address_to_resource(np, 0, &r);
|
||||
if (rc)
|
||||
return NULL;
|
||||
unsigned int flags = master ? 0 : MPIC_SECONDARY;
|
||||
|
||||
pmac_call_feature(PMAC_FTR_ENABLE_MPIC, np, 0, 0);
|
||||
|
||||
|
@ -519,7 +501,7 @@ static struct mpic * __init pmac_setup_one_mpic(struct device_node *np,
|
|||
if (master && (flags & MPIC_BIG_ENDIAN))
|
||||
flags |= MPIC_U3_HT_IRQS;
|
||||
|
||||
mpic = mpic_alloc(np, r.start, flags, 0, 0, name);
|
||||
mpic = mpic_alloc(np, 0, flags, 0, 0, name);
|
||||
if (mpic == NULL)
|
||||
return NULL;
|
||||
|
||||
|
@ -532,7 +514,6 @@ static int __init pmac_pic_probe_mpic(void)
|
|||
{
|
||||
struct mpic *mpic1, *mpic2;
|
||||
struct device_node *np, *master = NULL, *slave = NULL;
|
||||
unsigned int cascade;
|
||||
|
||||
/* We can have up to 2 MPICs cascaded */
|
||||
for (np = NULL; (np = of_find_node_by_type(np, "open-pic"))
|
||||
|
@ -568,27 +549,14 @@ static int __init pmac_pic_probe_mpic(void)
|
|||
|
||||
of_node_put(master);
|
||||
|
||||
/* No slave, let's go out */
|
||||
if (slave == NULL)
|
||||
return 0;
|
||||
|
||||
/* Get/Map slave interrupt */
|
||||
cascade = irq_of_parse_and_map(slave, 0);
|
||||
if (cascade == NO_IRQ) {
|
||||
printk(KERN_ERR "Failed to map cascade IRQ\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
mpic2 = pmac_setup_one_mpic(slave, 0);
|
||||
if (mpic2 == NULL) {
|
||||
printk(KERN_ERR "Failed to setup slave MPIC\n");
|
||||
/* Set up a cascaded controller, if present */
|
||||
if (slave) {
|
||||
mpic2 = pmac_setup_one_mpic(slave, 0);
|
||||
if (mpic2 == NULL)
|
||||
printk(KERN_ERR "Failed to setup slave MPIC\n");
|
||||
of_node_put(slave);
|
||||
return 0;
|
||||
}
|
||||
irq_set_handler_data(cascade, mpic2);
|
||||
irq_set_chained_handler(cascade, pmac_u3_cascade);
|
||||
|
||||
of_node_put(slave);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -192,8 +192,7 @@ static void __init pseries_mpic_init_IRQ(void)
|
|||
BUG_ON(openpic_addr == 0);
|
||||
|
||||
/* Setup the openpic driver */
|
||||
mpic = mpic_alloc(pSeries_mpic_node, openpic_addr,
|
||||
MPIC_PRIMARY,
|
||||
mpic = mpic_alloc(pSeries_mpic_node, openpic_addr, 0,
|
||||
16, 250, /* isu size, irq count */
|
||||
" MPIC ");
|
||||
BUG_ON(mpic == NULL);
|
||||
|
|
|
@ -154,7 +154,7 @@ static inline unsigned int mpic_processor_id(struct mpic *mpic)
|
|||
{
|
||||
unsigned int cpu = 0;
|
||||
|
||||
if (mpic->flags & MPIC_PRIMARY)
|
||||
if (!(mpic->flags & MPIC_SECONDARY))
|
||||
cpu = hard_smp_processor_id();
|
||||
|
||||
return cpu;
|
||||
|
@ -315,29 +315,25 @@ static void _mpic_map_mmio(struct mpic *mpic, phys_addr_t phys_addr,
|
|||
}
|
||||
|
||||
#ifdef CONFIG_PPC_DCR
|
||||
static void _mpic_map_dcr(struct mpic *mpic, struct device_node *node,
|
||||
struct mpic_reg_bank *rb,
|
||||
static void _mpic_map_dcr(struct mpic *mpic, struct mpic_reg_bank *rb,
|
||||
unsigned int offset, unsigned int size)
|
||||
{
|
||||
const u32 *dbasep;
|
||||
|
||||
dbasep = of_get_property(node, "dcr-reg", NULL);
|
||||
|
||||
rb->dhost = dcr_map(node, *dbasep + offset, size);
|
||||
phys_addr_t phys_addr = dcr_resource_start(mpic->node, 0);
|
||||
rb->dhost = dcr_map(mpic->node, phys_addr + offset, size);
|
||||
BUG_ON(!DCR_MAP_OK(rb->dhost));
|
||||
}
|
||||
|
||||
static inline void mpic_map(struct mpic *mpic, struct device_node *node,
|
||||
static inline void mpic_map(struct mpic *mpic,
|
||||
phys_addr_t phys_addr, struct mpic_reg_bank *rb,
|
||||
unsigned int offset, unsigned int size)
|
||||
{
|
||||
if (mpic->flags & MPIC_USES_DCR)
|
||||
_mpic_map_dcr(mpic, node, rb, offset, size);
|
||||
_mpic_map_dcr(mpic, rb, offset, size);
|
||||
else
|
||||
_mpic_map_mmio(mpic, phys_addr, rb, offset, size);
|
||||
}
|
||||
#else /* CONFIG_PPC_DCR */
|
||||
#define mpic_map(m,n,p,b,o,s) _mpic_map_mmio(m,p,b,o,s)
|
||||
#define mpic_map(m,p,b,o,s) _mpic_map_mmio(m,p,b,o,s)
|
||||
#endif /* !CONFIG_PPC_DCR */
|
||||
|
||||
|
||||
|
@ -990,7 +986,7 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq,
|
|||
|
||||
#ifdef CONFIG_SMP
|
||||
else if (hw >= mpic->ipi_vecs[0]) {
|
||||
WARN_ON(!(mpic->flags & MPIC_PRIMARY));
|
||||
WARN_ON(mpic->flags & MPIC_SECONDARY);
|
||||
|
||||
DBG("mpic: mapping as IPI\n");
|
||||
irq_set_chip_data(virq, mpic);
|
||||
|
@ -1001,7 +997,7 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq,
|
|||
#endif /* CONFIG_SMP */
|
||||
|
||||
if (hw >= mpic->timer_vecs[0] && hw <= mpic->timer_vecs[7]) {
|
||||
WARN_ON(!(mpic->flags & MPIC_PRIMARY));
|
||||
WARN_ON(mpic->flags & MPIC_SECONDARY);
|
||||
|
||||
DBG("mpic: mapping as timer\n");
|
||||
irq_set_chip_data(virq, mpic);
|
||||
|
@ -1115,17 +1111,28 @@ static int mpic_host_xlate(struct irq_host *h, struct device_node *ct,
|
|||
return 0;
|
||||
}
|
||||
|
||||
/* IRQ handler for a secondary MPIC cascaded from another IRQ controller */
|
||||
static void mpic_cascade(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
struct irq_chip *chip = irq_desc_get_chip(desc);
|
||||
struct mpic *mpic = irq_desc_get_handler_data(desc);
|
||||
unsigned int virq;
|
||||
|
||||
BUG_ON(!(mpic->flags & MPIC_SECONDARY));
|
||||
|
||||
virq = mpic_get_one_irq(mpic);
|
||||
if (virq != NO_IRQ)
|
||||
generic_handle_irq(virq);
|
||||
|
||||
chip->irq_eoi(&desc->irq_data);
|
||||
}
|
||||
|
||||
static struct irq_host_ops mpic_host_ops = {
|
||||
.match = mpic_host_match,
|
||||
.map = mpic_host_map,
|
||||
.xlate = mpic_host_xlate,
|
||||
};
|
||||
|
||||
static int mpic_reset_prohibited(struct device_node *node)
|
||||
{
|
||||
return node && of_get_property(node, "pic-no-reset", NULL);
|
||||
}
|
||||
|
||||
/*
|
||||
* Exported functions
|
||||
*/
|
||||
|
@ -1137,27 +1144,60 @@ struct mpic * __init mpic_alloc(struct device_node *node,
|
|||
unsigned int irq_count,
|
||||
const char *name)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
u32 greg_feature;
|
||||
const char *vers;
|
||||
int i;
|
||||
int intvec_top;
|
||||
u64 paddr = phys_addr;
|
||||
int i, psize, intvec_top;
|
||||
struct mpic *mpic;
|
||||
u32 greg_feature;
|
||||
const char *vers;
|
||||
const u32 *psrc;
|
||||
|
||||
/* Default MPIC search parameters */
|
||||
static const struct of_device_id __initconst mpic_device_id[] = {
|
||||
{ .type = "open-pic", },
|
||||
{ .compatible = "open-pic", },
|
||||
{},
|
||||
};
|
||||
|
||||
/*
|
||||
* If we were not passed a device-tree node, then perform the default
|
||||
* search for standardized a standardized OpenPIC.
|
||||
*/
|
||||
if (node) {
|
||||
node = of_node_get(node);
|
||||
} else {
|
||||
node = of_find_matching_node(NULL, mpic_device_id);
|
||||
if (!node)
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* Pick the physical address from the device tree if unspecified */
|
||||
if (!phys_addr) {
|
||||
/* Check if it is DCR-based */
|
||||
if (of_get_property(node, "dcr-reg", NULL)) {
|
||||
flags |= MPIC_USES_DCR;
|
||||
} else {
|
||||
struct resource r;
|
||||
if (of_address_to_resource(node, 0, &r))
|
||||
goto err_of_node_put;
|
||||
phys_addr = r.start;
|
||||
}
|
||||
}
|
||||
|
||||
mpic = kzalloc(sizeof(struct mpic), GFP_KERNEL);
|
||||
if (mpic == NULL)
|
||||
return NULL;
|
||||
goto err_of_node_put;
|
||||
|
||||
mpic->name = name;
|
||||
mpic->node = node;
|
||||
mpic->paddr = phys_addr;
|
||||
|
||||
mpic->hc_irq = mpic_irq_chip;
|
||||
mpic->hc_irq.name = name;
|
||||
if (flags & MPIC_PRIMARY)
|
||||
if (!(flags & MPIC_SECONDARY))
|
||||
mpic->hc_irq.irq_set_affinity = mpic_set_affinity;
|
||||
#ifdef CONFIG_MPIC_U3_HT_IRQS
|
||||
mpic->hc_ht_irq = mpic_irq_ht_chip;
|
||||
mpic->hc_ht_irq.name = name;
|
||||
if (flags & MPIC_PRIMARY)
|
||||
if (!(flags & MPIC_SECONDARY))
|
||||
mpic->hc_ht_irq.irq_set_affinity = mpic_set_affinity;
|
||||
#endif /* CONFIG_MPIC_U3_HT_IRQS */
|
||||
|
||||
|
@ -1194,28 +1234,22 @@ struct mpic * __init mpic_alloc(struct device_node *node,
|
|||
mpic->spurious_vec = intvec_top;
|
||||
|
||||
/* Check for "big-endian" in device-tree */
|
||||
if (node && of_get_property(node, "big-endian", NULL) != NULL)
|
||||
if (of_get_property(mpic->node, "big-endian", NULL) != NULL)
|
||||
mpic->flags |= MPIC_BIG_ENDIAN;
|
||||
if (node && of_device_is_compatible(node, "fsl,mpic"))
|
||||
if (of_device_is_compatible(mpic->node, "fsl,mpic"))
|
||||
mpic->flags |= MPIC_FSL;
|
||||
|
||||
/* Look for protected sources */
|
||||
if (node) {
|
||||
int psize;
|
||||
unsigned int bits, mapsize;
|
||||
const u32 *psrc =
|
||||
of_get_property(node, "protected-sources", &psize);
|
||||
if (psrc) {
|
||||
psize /= 4;
|
||||
bits = intvec_top + 1;
|
||||
mapsize = BITS_TO_LONGS(bits) * sizeof(unsigned long);
|
||||
mpic->protected = kzalloc(mapsize, GFP_KERNEL);
|
||||
BUG_ON(mpic->protected == NULL);
|
||||
for (i = 0; i < psize; i++) {
|
||||
if (psrc[i] > intvec_top)
|
||||
continue;
|
||||
__set_bit(psrc[i], mpic->protected);
|
||||
}
|
||||
psrc = of_get_property(mpic->node, "protected-sources", &psize);
|
||||
if (psrc) {
|
||||
/* Allocate a bitmap with one bit per interrupt */
|
||||
unsigned int mapsize = BITS_TO_LONGS(intvec_top + 1);
|
||||
mpic->protected = kzalloc(mapsize*sizeof(long), GFP_KERNEL);
|
||||
BUG_ON(mpic->protected == NULL);
|
||||
for (i = 0; i < psize/sizeof(u32); i++) {
|
||||
if (psrc[i] > intvec_top)
|
||||
continue;
|
||||
__set_bit(psrc[i], mpic->protected);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1224,42 +1258,32 @@ struct mpic * __init mpic_alloc(struct device_node *node,
|
|||
#endif
|
||||
|
||||
/* default register type */
|
||||
mpic->reg_type = (flags & MPIC_BIG_ENDIAN) ?
|
||||
mpic_access_mmio_be : mpic_access_mmio_le;
|
||||
if (flags & MPIC_BIG_ENDIAN)
|
||||
mpic->reg_type = mpic_access_mmio_be;
|
||||
else
|
||||
mpic->reg_type = mpic_access_mmio_le;
|
||||
|
||||
/* If no physical address is passed in, a device-node is mandatory */
|
||||
BUG_ON(paddr == 0 && node == NULL);
|
||||
|
||||
/* If no physical address passed in, check if it's dcr based */
|
||||
if (paddr == 0 && of_get_property(node, "dcr-reg", NULL) != NULL) {
|
||||
/*
|
||||
* An MPIC with a "dcr-reg" property must be accessed that way, but
|
||||
* only if the kernel includes DCR support.
|
||||
*/
|
||||
#ifdef CONFIG_PPC_DCR
|
||||
mpic->flags |= MPIC_USES_DCR;
|
||||
if (flags & MPIC_USES_DCR)
|
||||
mpic->reg_type = mpic_access_dcr;
|
||||
#else
|
||||
BUG();
|
||||
#endif /* CONFIG_PPC_DCR */
|
||||
}
|
||||
|
||||
/* If the MPIC is not DCR based, and no physical address was passed
|
||||
* in, try to obtain one
|
||||
*/
|
||||
if (paddr == 0 && !(mpic->flags & MPIC_USES_DCR)) {
|
||||
const u32 *reg = of_get_property(node, "reg", NULL);
|
||||
BUG_ON(reg == NULL);
|
||||
paddr = of_translate_address(node, reg);
|
||||
BUG_ON(paddr == OF_BAD_ADDR);
|
||||
}
|
||||
BUG_ON(flags & MPIC_USES_DCR);
|
||||
#endif
|
||||
|
||||
/* Map the global registers */
|
||||
mpic_map(mpic, node, paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);
|
||||
mpic_map(mpic, node, paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
|
||||
mpic_map(mpic, mpic->paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);
|
||||
mpic_map(mpic, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
|
||||
|
||||
/* Reset */
|
||||
|
||||
/* When using a device-node, reset requests are only honored if the MPIC
|
||||
* is allowed to reset.
|
||||
*/
|
||||
if (mpic_reset_prohibited(node))
|
||||
if (of_get_property(mpic->node, "pic-no-reset", NULL))
|
||||
mpic->flags |= MPIC_NO_RESET;
|
||||
|
||||
if ((flags & MPIC_WANTS_RESET) && !(mpic->flags & MPIC_NO_RESET)) {
|
||||
|
@ -1307,7 +1331,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
|
|||
for_each_possible_cpu(i) {
|
||||
unsigned int cpu = get_hard_smp_processor_id(i);
|
||||
|
||||
mpic_map(mpic, node, paddr, &mpic->cpuregs[cpu],
|
||||
mpic_map(mpic, mpic->paddr, &mpic->cpuregs[cpu],
|
||||
MPIC_INFO(CPU_BASE) + cpu * MPIC_INFO(CPU_STRIDE),
|
||||
0x1000);
|
||||
}
|
||||
|
@ -1315,16 +1339,21 @@ struct mpic * __init mpic_alloc(struct device_node *node,
|
|||
/* Initialize main ISU if none provided */
|
||||
if (mpic->isu_size == 0) {
|
||||
mpic->isu_size = mpic->num_sources;
|
||||
mpic_map(mpic, node, paddr, &mpic->isus[0],
|
||||
mpic_map(mpic, mpic->paddr, &mpic->isus[0],
|
||||
MPIC_INFO(IRQ_BASE), MPIC_INFO(IRQ_STRIDE) * mpic->isu_size);
|
||||
}
|
||||
mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1);
|
||||
mpic->isu_mask = (1 << mpic->isu_shift) - 1;
|
||||
|
||||
mpic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
|
||||
mpic->irqhost = irq_alloc_host(mpic->node, IRQ_HOST_MAP_LINEAR,
|
||||
isu_size ? isu_size : mpic->num_sources,
|
||||
&mpic_host_ops,
|
||||
flags & MPIC_LARGE_VECTORS ? 2048 : 256);
|
||||
|
||||
/*
|
||||
* FIXME: The code leaks the MPIC object and mappings here; this
|
||||
* is very unlikely to fail but it ought to be fixed anyways.
|
||||
*/
|
||||
if (mpic->irqhost == NULL)
|
||||
return NULL;
|
||||
|
||||
|
@ -1347,19 +1376,23 @@ struct mpic * __init mpic_alloc(struct device_node *node,
|
|||
}
|
||||
printk(KERN_INFO "mpic: Setting up MPIC \"%s\" version %s at %llx,"
|
||||
" max %d CPUs\n",
|
||||
name, vers, (unsigned long long)paddr, num_possible_cpus());
|
||||
name, vers, (unsigned long long)mpic->paddr, num_possible_cpus());
|
||||
printk(KERN_INFO "mpic: ISU size: %d, shift: %d, mask: %x\n",
|
||||
mpic->isu_size, mpic->isu_shift, mpic->isu_mask);
|
||||
|
||||
mpic->next = mpics;
|
||||
mpics = mpic;
|
||||
|
||||
if (flags & MPIC_PRIMARY) {
|
||||
if (!(flags & MPIC_SECONDARY)) {
|
||||
mpic_primary = mpic;
|
||||
irq_set_default_host(mpic->irqhost);
|
||||
}
|
||||
|
||||
return mpic;
|
||||
|
||||
err_of_node_put:
|
||||
of_node_put(node);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
|
||||
|
@ -1369,7 +1402,7 @@ void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
|
|||
|
||||
BUG_ON(isu_num >= MPIC_MAX_ISU);
|
||||
|
||||
mpic_map(mpic, mpic->irqhost->of_node,
|
||||
mpic_map(mpic,
|
||||
paddr, &mpic->isus[isu_num], 0,
|
||||
MPIC_INFO(IRQ_STRIDE) * mpic->isu_size);
|
||||
|
||||
|
@ -1385,8 +1418,7 @@ void __init mpic_set_default_senses(struct mpic *mpic, u8 *senses, int count)
|
|||
|
||||
void __init mpic_init(struct mpic *mpic)
|
||||
{
|
||||
int i;
|
||||
int cpu;
|
||||
int i, cpu;
|
||||
|
||||
BUG_ON(mpic->num_sources == 0);
|
||||
|
||||
|
@ -1424,7 +1456,7 @@ void __init mpic_init(struct mpic *mpic)
|
|||
|
||||
/* Do the HT PIC fixups on U3 broken mpic */
|
||||
DBG("MPIC flags: %x\n", mpic->flags);
|
||||
if ((mpic->flags & MPIC_U3_HT_IRQS) && (mpic->flags & MPIC_PRIMARY)) {
|
||||
if ((mpic->flags & MPIC_U3_HT_IRQS) && !(mpic->flags & MPIC_SECONDARY)) {
|
||||
mpic_scan_ht_pics(mpic);
|
||||
mpic_u3msi_init(mpic);
|
||||
}
|
||||
|
@ -1471,6 +1503,17 @@ void __init mpic_init(struct mpic *mpic)
|
|||
GFP_KERNEL);
|
||||
BUG_ON(mpic->save_data == NULL);
|
||||
#endif
|
||||
|
||||
/* Check if this MPIC is chained from a parent interrupt controller */
|
||||
if (mpic->flags & MPIC_SECONDARY) {
|
||||
int virq = irq_of_parse_and_map(mpic->node, 0);
|
||||
if (virq != NO_IRQ) {
|
||||
printk(KERN_INFO "%s: hooking up to IRQ %d\n",
|
||||
mpic->node->full_name, virq);
|
||||
irq_set_handler_data(virq, mpic);
|
||||
irq_set_chained_handler(virq, &mpic_cascade);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void __init mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio)
|
||||
|
|
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