rt2x00: convert rt2x00usb_register_read return type
This is a semi-automated conversion to change rt2x00usb_register_read to return the register contents instead of passing them by value, resulting in much better object code. The majority of the patch was done using: sed -i 's:\(\<rt2x00usb_register_read\>(.*, .*\), &\(.*\));:\2 = \1);:' \ -i 's:\(\<rt2500usb_register_read\>(.*, .*\), &\(.*\));:\2 = \1);:' \ -i 's:\(\<rt2500usb_register_read_lock\>(.*, .*\), &\(.*\));:\2 = \1);:' \ drivers/net/wireless/ralink/rt2x00/* Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Родитель
3954b4e306
Коммит
48bde9c969
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@ -55,26 +55,24 @@ MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
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* If the csr_mutex is already held then the _lock variants must
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* be used instead.
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*/
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static void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
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const unsigned int offset,
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u16 *value)
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static u16 rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
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const unsigned int offset)
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{
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__le16 reg;
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rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
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USB_VENDOR_REQUEST_IN, offset,
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®, sizeof(reg));
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*value = le16_to_cpu(reg);
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return le16_to_cpu(reg);
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}
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static void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
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const unsigned int offset,
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u16 *value)
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static u16 rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
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const unsigned int offset)
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{
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__le16 reg;
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rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
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USB_VENDOR_REQUEST_IN, offset,
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®, sizeof(reg), REGISTER_TIMEOUT);
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*value = le16_to_cpu(reg);
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return le16_to_cpu(reg);
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}
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static void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
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@ -114,7 +112,7 @@ static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
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unsigned int i;
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for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
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rt2500usb_register_read_lock(rt2x00dev, offset, reg);
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*reg = rt2500usb_register_read_lock(rt2x00dev, offset);
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if (!rt2x00_get_field16(*reg, field))
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return 1;
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udelay(REGISTER_BUSY_DELAY);
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@ -178,7 +176,7 @@ static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
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rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
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if (WAIT_FOR_BBP(rt2x00dev, ®))
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rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, ®);
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reg = rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7);
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}
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*value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
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@ -219,11 +217,7 @@ static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
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static u32 _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
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const unsigned int offset)
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{
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u16 tmp;
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rt2500usb_register_read(rt2x00dev, offset, &tmp);
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return tmp;
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return rt2500usb_register_read(rt2x00dev, offset);
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}
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static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
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@ -281,7 +275,7 @@ static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
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{
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u16 reg;
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rt2500usb_register_read(rt2x00dev, MAC_CSR19, ®);
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reg = rt2500usb_register_read(rt2x00dev, MAC_CSR19);
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return rt2x00_get_field16(reg, MAC_CSR19_VAL7);
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}
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@ -294,7 +288,7 @@ static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
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unsigned int enabled = brightness != LED_OFF;
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u16 reg;
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rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, ®);
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reg = rt2500usb_register_read(led->rt2x00dev, MAC_CSR20);
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if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
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rt2x00_set_field16(®, MAC_CSR20_LINK, enabled);
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@ -312,7 +306,7 @@ static int rt2500usb_blink_set(struct led_classdev *led_cdev,
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container_of(led_cdev, struct rt2x00_led, led_dev);
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u16 reg;
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rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, ®);
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reg = rt2500usb_register_read(led->rt2x00dev, MAC_CSR21);
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rt2x00_set_field16(®, MAC_CSR21_ON_PERIOD, *delay_on);
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rt2x00_set_field16(®, MAC_CSR21_OFF_PERIOD, *delay_off);
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rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
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@ -366,7 +360,7 @@ static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
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*/
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mask = TXRX_CSR0_KEY_ID.bit_mask;
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rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR0);
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curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM);
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reg &= mask;
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@ -405,7 +399,7 @@ static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
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* TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
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* a particular key is valid.
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*/
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rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR0);
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rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, crypto->cipher);
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rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
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@ -431,7 +425,7 @@ static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
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* and broadcast frames will always be accepted since
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* there is no filter for it at this time.
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*/
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rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR2);
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rt2x00_set_field16(®, TXRX_CSR2_DROP_CRC,
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!(filter_flags & FIF_FCSFAIL));
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rt2x00_set_field16(®, TXRX_CSR2_DROP_PHYSICAL,
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@ -463,7 +457,7 @@ static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
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* Enable beacon config
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*/
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bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
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rt2500usb_register_read(rt2x00dev, TXRX_CSR20, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR20);
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rt2x00_set_field16(®, TXRX_CSR20_OFFSET, bcn_preload >> 6);
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rt2x00_set_field16(®, TXRX_CSR20_BCN_EXPECT_WINDOW,
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2 * (conf->type != NL80211_IFTYPE_STATION));
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@ -472,11 +466,11 @@ static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
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/*
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* Enable synchronisation.
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*/
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rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR18);
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rt2x00_set_field16(®, TXRX_CSR18_OFFSET, 0);
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rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
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rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR19);
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rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, conf->sync);
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rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
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}
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@ -497,7 +491,7 @@ static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
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u16 reg;
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if (changed & BSS_CHANGED_ERP_PREAMBLE) {
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rt2500usb_register_read(rt2x00dev, TXRX_CSR10, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR10);
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rt2x00_set_field16(®, TXRX_CSR10_AUTORESPOND_PREAMBLE,
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!!erp->short_preamble);
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rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
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@ -508,7 +502,7 @@ static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
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erp->basic_rates);
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if (changed & BSS_CHANGED_BEACON_INT) {
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rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR18);
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rt2x00_set_field16(®, TXRX_CSR18_INTERVAL,
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erp->beacon_int * 4);
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rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
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@ -538,8 +532,8 @@ static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
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rt2500usb_bbp_read(rt2x00dev, 2, &r2);
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rt2500usb_bbp_read(rt2x00dev, 14, &r14);
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rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
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rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
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csr5 = rt2500usb_register_read(rt2x00dev, PHY_CSR5);
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csr6 = rt2500usb_register_read(rt2x00dev, PHY_CSR6);
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/*
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* Configure the TX antenna.
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@ -653,7 +647,7 @@ static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
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u16 reg;
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if (state == STATE_SLEEP) {
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rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®);
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reg = rt2500usb_register_read(rt2x00dev, MAC_CSR18);
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rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON,
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rt2x00dev->beacon_int - 20);
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rt2x00_set_field16(®, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
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@ -666,7 +660,7 @@ static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 1);
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rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
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} else {
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rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®);
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reg = rt2500usb_register_read(rt2x00dev, MAC_CSR18);
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rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 0);
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rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
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}
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@ -700,13 +694,13 @@ static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
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/*
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* Update FCS error count from register.
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*/
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rt2500usb_register_read(rt2x00dev, STA_CSR0, ®);
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reg = rt2500usb_register_read(rt2x00dev, STA_CSR0);
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qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
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/*
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* Update False CCA count from register.
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*/
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rt2500usb_register_read(rt2x00dev, STA_CSR3, ®);
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reg = rt2500usb_register_read(rt2x00dev, STA_CSR3);
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qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
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}
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@ -745,12 +739,12 @@ static void rt2500usb_start_queue(struct data_queue *queue)
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switch (queue->qid) {
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case QID_RX:
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rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR2);
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rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 0);
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rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
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break;
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case QID_BEACON:
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rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR19);
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rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1);
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rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1);
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rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1);
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@ -768,12 +762,12 @@ static void rt2500usb_stop_queue(struct data_queue *queue)
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switch (queue->qid) {
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case QID_RX:
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rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR2);
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rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1);
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rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
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break;
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case QID_BEACON:
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rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR19);
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rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0);
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rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0);
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rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0);
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@ -796,54 +790,54 @@ static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
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rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
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0x00f0, REGISTER_TIMEOUT);
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rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR2);
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rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1);
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rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
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rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
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rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
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rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®);
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reg = rt2500usb_register_read(rt2x00dev, MAC_CSR1);
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rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 1);
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rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 1);
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rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0);
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rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
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rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®);
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reg = rt2500usb_register_read(rt2x00dev, MAC_CSR1);
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rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0);
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rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0);
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rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0);
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rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
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rt2500usb_register_read(rt2x00dev, TXRX_CSR5, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR5);
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rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0, 13);
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rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0_VALID, 1);
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rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1, 12);
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rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1_VALID, 1);
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rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
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rt2500usb_register_read(rt2x00dev, TXRX_CSR6, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR6);
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rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0, 10);
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rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0_VALID, 1);
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rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1, 11);
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rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1_VALID, 1);
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rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
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rt2500usb_register_read(rt2x00dev, TXRX_CSR7, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR7);
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rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0, 7);
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rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0_VALID, 1);
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rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1, 6);
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rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1_VALID, 1);
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rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
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rt2500usb_register_read(rt2x00dev, TXRX_CSR8, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR8);
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rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0, 5);
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rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0_VALID, 1);
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rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1, 0);
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rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1_VALID, 0);
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rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
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rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
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reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR19);
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rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0);
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rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, 0);
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rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0);
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@ -856,14 +850,14 @@ static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
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if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
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return -EBUSY;
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rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®);
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reg = rt2500usb_register_read(rt2x00dev, MAC_CSR1);
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||||
rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0);
|
||||
rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0);
|
||||
rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 1);
|
||||
rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
|
||||
|
||||
if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
|
||||
rt2500usb_register_read(rt2x00dev, PHY_CSR2, ®);
|
||||
reg = rt2500usb_register_read(rt2x00dev, PHY_CSR2);
|
||||
rt2x00_set_field16(®, PHY_CSR2_LNA, 0);
|
||||
} else {
|
||||
reg = 0;
|
||||
|
@ -877,26 +871,26 @@ static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
|||
rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
|
||||
rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
|
||||
|
||||
rt2500usb_register_read(rt2x00dev, MAC_CSR8, ®);
|
||||
reg = rt2500usb_register_read(rt2x00dev, MAC_CSR8);
|
||||
rt2x00_set_field16(®, MAC_CSR8_MAX_FRAME_UNIT,
|
||||
rt2x00dev->rx->data_size);
|
||||
rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
|
||||
|
||||
rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®);
|
||||
reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR0);
|
||||
rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, CIPHER_NONE);
|
||||
rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
|
||||
rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, 0);
|
||||
rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
|
||||
|
||||
rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®);
|
||||
reg = rt2500usb_register_read(rt2x00dev, MAC_CSR18);
|
||||
rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, 90);
|
||||
rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
|
||||
|
||||
rt2500usb_register_read(rt2x00dev, PHY_CSR4, ®);
|
||||
reg = rt2500usb_register_read(rt2x00dev, PHY_CSR4);
|
||||
rt2x00_set_field16(®, PHY_CSR4_LOW_RF_LE, 1);
|
||||
rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
|
||||
|
||||
rt2500usb_register_read(rt2x00dev, TXRX_CSR1, ®);
|
||||
reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR1);
|
||||
rt2x00_set_field16(®, TXRX_CSR1_AUTO_SEQUENCE, 1);
|
||||
rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
|
||||
|
||||
|
@ -1028,7 +1022,7 @@ static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
|
|||
* device has entered the correct state.
|
||||
*/
|
||||
for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
|
||||
rt2500usb_register_read(rt2x00dev, MAC_CSR17, ®2);
|
||||
reg2 = rt2500usb_register_read(rt2x00dev, MAC_CSR17);
|
||||
bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
|
||||
rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
|
||||
if (bbp_state == state && rf_state == state)
|
||||
|
@ -1153,7 +1147,7 @@ static void rt2500usb_write_beacon(struct queue_entry *entry,
|
|||
* Disable beaconing while we are reloading the beacon data,
|
||||
* otherwise we might be sending out invalid data.
|
||||
*/
|
||||
rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
|
||||
reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR19);
|
||||
rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0);
|
||||
rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
|
||||
|
||||
|
@ -1461,7 +1455,7 @@ static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
|
|||
* Identify RF chipset.
|
||||
*/
|
||||
value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
|
||||
rt2500usb_register_read(rt2x00dev, MAC_CSR0, ®);
|
||||
reg = rt2500usb_register_read(rt2x00dev, MAC_CSR0);
|
||||
rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
|
||||
|
||||
if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
|
||||
|
@ -1786,7 +1780,7 @@ static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
|
|||
* Enable rfkill polling by setting GPIO direction of the
|
||||
* rfkill switch GPIO pin correctly.
|
||||
*/
|
||||
rt2500usb_register_read(rt2x00dev, MAC_CSR19, ®);
|
||||
reg = rt2500usb_register_read(rt2x00dev, MAC_CSR19);
|
||||
rt2x00_set_field16(®, MAC_CSR19_DIR0, 0);
|
||||
rt2500usb_register_write(rt2x00dev, MAC_CSR19, reg);
|
||||
|
||||
|
|
|
@ -61,12 +61,12 @@ static void rt2800usb_start_queue(struct data_queue *queue)
|
|||
|
||||
switch (queue->qid) {
|
||||
case QID_RX:
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL);
|
||||
rt2x00_set_field32(®, MAC_SYS_CTRL_ENABLE_RX, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
|
||||
break;
|
||||
case QID_BEACON:
|
||||
rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG);
|
||||
rt2x00_set_field32(®, BCN_TIME_CFG_TSF_TICKING, 1);
|
||||
rt2x00_set_field32(®, BCN_TIME_CFG_TBTT_ENABLE, 1);
|
||||
rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_GEN, 1);
|
||||
|
@ -84,12 +84,12 @@ static void rt2800usb_stop_queue(struct data_queue *queue)
|
|||
|
||||
switch (queue->qid) {
|
||||
case QID_RX:
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL);
|
||||
rt2x00_set_field32(®, MAC_SYS_CTRL_ENABLE_RX, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
|
||||
break;
|
||||
case QID_BEACON:
|
||||
rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG);
|
||||
rt2x00_set_field32(®, BCN_TIME_CFG_TSF_TICKING, 0);
|
||||
rt2x00_set_field32(®, BCN_TIME_CFG_TBTT_ENABLE, 0);
|
||||
rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_GEN, 0);
|
||||
|
@ -333,7 +333,7 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
|||
if (rt2800_wait_csr_ready(rt2x00dev))
|
||||
return -EBUSY;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, PBF_SYS_CTRL, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, PBF_SYS_CTRL);
|
||||
rt2x00usb_register_write(rt2x00dev, PBF_SYS_CTRL, reg & ~0x00002000);
|
||||
|
||||
reg = 0;
|
||||
|
@ -802,8 +802,8 @@ static const struct ieee80211_ops rt2800usb_mac80211_ops = {
|
|||
};
|
||||
|
||||
static const struct rt2800_ops rt2800usb_rt2800_ops = {
|
||||
.register_read = _rt2x00usb_register_read,
|
||||
.register_read_lock = _rt2x00usb_register_read_lock,
|
||||
.register_read = rt2x00usb_register_read,
|
||||
.register_read_lock = rt2x00usb_register_read_lock,
|
||||
.register_write = rt2x00usb_register_write,
|
||||
.register_write_lock = rt2x00usb_register_write_lock,
|
||||
.register_multiread = rt2x00usb_register_multiread,
|
||||
|
|
|
@ -145,7 +145,7 @@ int rt2x00usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
|
|||
return -ENODEV;
|
||||
|
||||
for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
|
||||
rt2x00usb_register_read_lock(rt2x00dev, offset, reg);
|
||||
*reg = rt2x00usb_register_read_lock(rt2x00dev, offset);
|
||||
if (!rt2x00_get_field32(*reg, field))
|
||||
return 1;
|
||||
udelay(REGISTER_BUSY_DELAY);
|
||||
|
|
|
@ -190,24 +190,12 @@ static inline int rt2x00usb_eeprom_read(struct rt2x00_dev *rt2x00dev,
|
|||
* rt2x00usb_register_read - Read 32bit register word
|
||||
* @rt2x00dev: Device pointer, see &struct rt2x00_dev.
|
||||
* @offset: Register offset
|
||||
* @value: Pointer to where register contents should be stored
|
||||
*
|
||||
* This function is a simple wrapper for 32bit register access
|
||||
* through rt2x00usb_vendor_request_buff().
|
||||
*/
|
||||
static inline void rt2x00usb_register_read(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int offset,
|
||||
u32 *value)
|
||||
{
|
||||
__le32 reg = 0;
|
||||
rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
|
||||
USB_VENDOR_REQUEST_IN, offset,
|
||||
®, sizeof(reg));
|
||||
*value = le32_to_cpu(reg);
|
||||
}
|
||||
|
||||
static inline u32 _rt2x00usb_register_read(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int offset)
|
||||
static inline u32 rt2x00usb_register_read(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int offset)
|
||||
{
|
||||
__le32 reg = 0;
|
||||
rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
|
||||
|
@ -220,24 +208,12 @@ static inline u32 _rt2x00usb_register_read(struct rt2x00_dev *rt2x00dev,
|
|||
* rt2x00usb_register_read_lock - Read 32bit register word
|
||||
* @rt2x00dev: Device pointer, see &struct rt2x00_dev.
|
||||
* @offset: Register offset
|
||||
* @value: Pointer to where register contents should be stored
|
||||
*
|
||||
* This function is a simple wrapper for 32bit register access
|
||||
* through rt2x00usb_vendor_req_buff_lock().
|
||||
*/
|
||||
static inline void rt2x00usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int offset,
|
||||
u32 *value)
|
||||
{
|
||||
__le32 reg = 0;
|
||||
rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
|
||||
USB_VENDOR_REQUEST_IN, offset,
|
||||
®, sizeof(reg), REGISTER_TIMEOUT);
|
||||
*value = le32_to_cpu(reg);
|
||||
}
|
||||
|
||||
static inline u32 _rt2x00usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int offset)
|
||||
static inline u32 rt2x00usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int offset)
|
||||
{
|
||||
__le32 reg = 0;
|
||||
rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
|
||||
|
|
|
@ -159,7 +159,7 @@ static u8 _rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev, const unsigned int wor
|
|||
static const struct rt2x00debug rt73usb_rt2x00debug = {
|
||||
.owner = THIS_MODULE,
|
||||
.csr = {
|
||||
.read = _rt2x00usb_register_read,
|
||||
.read = rt2x00usb_register_read,
|
||||
.write = rt2x00usb_register_write,
|
||||
.flags = RT2X00DEBUGFS_OFFSET,
|
||||
.word_base = CSR_REG_BASE,
|
||||
|
@ -194,7 +194,7 @@ static int rt73usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
|
|||
{
|
||||
u32 reg;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR13, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR13);
|
||||
return rt2x00_get_field32(reg, MAC_CSR13_VAL7);
|
||||
}
|
||||
|
||||
|
@ -247,7 +247,7 @@ static int rt73usb_blink_set(struct led_classdev *led_cdev,
|
|||
container_of(led_cdev, struct rt2x00_led, led_dev);
|
||||
u32 reg;
|
||||
|
||||
rt2x00usb_register_read(led->rt2x00dev, MAC_CSR14, ®);
|
||||
reg = rt2x00usb_register_read(led->rt2x00dev, MAC_CSR14);
|
||||
rt2x00_set_field32(®, MAC_CSR14_ON_PERIOD, *delay_on);
|
||||
rt2x00_set_field32(®, MAC_CSR14_OFF_PERIOD, *delay_off);
|
||||
rt2x00usb_register_write(led->rt2x00dev, MAC_CSR14, reg);
|
||||
|
@ -292,7 +292,7 @@ static int rt73usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
|
|||
*/
|
||||
mask = (0xf << crypto->bssidx);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, SEC_CSR0, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR0);
|
||||
reg &= mask;
|
||||
|
||||
if (reg && reg == mask)
|
||||
|
@ -325,14 +325,14 @@ static int rt73usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
|
|||
field.bit_offset = (3 * key->hw_key_idx);
|
||||
field.bit_mask = 0x7 << field.bit_offset;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, SEC_CSR1, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR1);
|
||||
rt2x00_set_field32(®, field, crypto->cipher);
|
||||
rt2x00usb_register_write(rt2x00dev, SEC_CSR1, reg);
|
||||
} else {
|
||||
field.bit_offset = (3 * (key->hw_key_idx - 8));
|
||||
field.bit_mask = 0x7 << field.bit_offset;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, SEC_CSR5, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR5);
|
||||
rt2x00_set_field32(®, field, crypto->cipher);
|
||||
rt2x00usb_register_write(rt2x00dev, SEC_CSR5, reg);
|
||||
}
|
||||
|
@ -357,7 +357,7 @@ static int rt73usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
|
|||
*/
|
||||
mask = 1 << key->hw_key_idx;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, SEC_CSR0, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR0);
|
||||
if (crypto->cmd == SET_KEY)
|
||||
reg |= mask;
|
||||
else if (crypto->cmd == DISABLE_KEY)
|
||||
|
@ -386,10 +386,10 @@ static int rt73usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
|
|||
* When both registers are full, we drop the key,
|
||||
* otherwise we use the first invalid entry.
|
||||
*/
|
||||
rt2x00usb_register_read(rt2x00dev, SEC_CSR2, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR2);
|
||||
if (reg && reg == ~0) {
|
||||
key->hw_key_idx = 32;
|
||||
rt2x00usb_register_read(rt2x00dev, SEC_CSR3, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR3);
|
||||
if (reg && reg == ~0)
|
||||
return -ENOSPC;
|
||||
}
|
||||
|
@ -426,7 +426,7 @@ static int rt73usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
|
|||
* without this received frames will not be decrypted
|
||||
* by the hardware.
|
||||
*/
|
||||
rt2x00usb_register_read(rt2x00dev, SEC_CSR4, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR4);
|
||||
reg |= (1 << crypto->bssidx);
|
||||
rt2x00usb_register_write(rt2x00dev, SEC_CSR4, reg);
|
||||
|
||||
|
@ -451,7 +451,7 @@ static int rt73usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
|
|||
if (key->hw_key_idx < 32) {
|
||||
mask = 1 << key->hw_key_idx;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, SEC_CSR2, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR2);
|
||||
if (crypto->cmd == SET_KEY)
|
||||
reg |= mask;
|
||||
else if (crypto->cmd == DISABLE_KEY)
|
||||
|
@ -460,7 +460,7 @@ static int rt73usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
|
|||
} else {
|
||||
mask = 1 << (key->hw_key_idx - 32);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, SEC_CSR3, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR3);
|
||||
if (crypto->cmd == SET_KEY)
|
||||
reg |= mask;
|
||||
else if (crypto->cmd == DISABLE_KEY)
|
||||
|
@ -482,7 +482,7 @@ static void rt73usb_config_filter(struct rt2x00_dev *rt2x00dev,
|
|||
* and broadcast frames will always be accepted since
|
||||
* there is no filter for it at this time.
|
||||
*/
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR0);
|
||||
rt2x00_set_field32(®, TXRX_CSR0_DROP_CRC,
|
||||
!(filter_flags & FIF_FCSFAIL));
|
||||
rt2x00_set_field32(®, TXRX_CSR0_DROP_PHYSICAL,
|
||||
|
@ -514,7 +514,7 @@ static void rt73usb_config_intf(struct rt2x00_dev *rt2x00dev,
|
|||
/*
|
||||
* Enable synchronisation.
|
||||
*/
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR9);
|
||||
rt2x00_set_field32(®, TXRX_CSR9_TSF_SYNC, conf->sync);
|
||||
rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
|
||||
}
|
||||
|
@ -544,13 +544,13 @@ static void rt73usb_config_erp(struct rt2x00_dev *rt2x00dev,
|
|||
{
|
||||
u32 reg;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR0);
|
||||
rt2x00_set_field32(®, TXRX_CSR0_RX_ACK_TIMEOUT, 0x32);
|
||||
rt2x00_set_field32(®, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
|
||||
rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
|
||||
|
||||
if (changed & BSS_CHANGED_ERP_PREAMBLE) {
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR4, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR4);
|
||||
rt2x00_set_field32(®, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
|
||||
rt2x00_set_field32(®, TXRX_CSR4_AUTORESPOND_PREAMBLE,
|
||||
!!erp->short_preamble);
|
||||
|
@ -562,18 +562,18 @@ static void rt73usb_config_erp(struct rt2x00_dev *rt2x00dev,
|
|||
erp->basic_rates);
|
||||
|
||||
if (changed & BSS_CHANGED_BEACON_INT) {
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR9);
|
||||
rt2x00_set_field32(®, TXRX_CSR9_BEACON_INTERVAL,
|
||||
erp->beacon_int * 16);
|
||||
rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
|
||||
}
|
||||
|
||||
if (changed & BSS_CHANGED_ERP_SLOT) {
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR9, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR9);
|
||||
rt2x00_set_field32(®, MAC_CSR9_SLOT_TIME, erp->slot_time);
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_CSR9, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR8, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR8);
|
||||
rt2x00_set_field32(®, MAC_CSR8_SIFS, erp->sifs);
|
||||
rt2x00_set_field32(®, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
|
||||
rt2x00_set_field32(®, MAC_CSR8_EIFS, erp->eifs);
|
||||
|
@ -724,7 +724,7 @@ static void rt73usb_config_ant(struct rt2x00_dev *rt2x00dev,
|
|||
for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
|
||||
rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, PHY_CSR0, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, PHY_CSR0);
|
||||
|
||||
rt2x00_set_field32(®, PHY_CSR0_PA_PE_BG,
|
||||
(rt2x00dev->curr_band == NL80211_BAND_2GHZ));
|
||||
|
@ -818,7 +818,7 @@ static void rt73usb_config_retry_limit(struct rt2x00_dev *rt2x00dev,
|
|||
{
|
||||
u32 reg;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR4, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR4);
|
||||
rt2x00_set_field32(®, TXRX_CSR4_OFDM_TX_RATE_DOWN, 1);
|
||||
rt2x00_set_field32(®, TXRX_CSR4_OFDM_TX_RATE_STEP, 0);
|
||||
rt2x00_set_field32(®, TXRX_CSR4_OFDM_TX_FALLBACK_CCK, 0);
|
||||
|
@ -838,7 +838,7 @@ static void rt73usb_config_ps(struct rt2x00_dev *rt2x00dev,
|
|||
u32 reg;
|
||||
|
||||
if (state == STATE_SLEEP) {
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR11, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR11);
|
||||
rt2x00_set_field32(®, MAC_CSR11_DELAY_AFTER_TBCN,
|
||||
rt2x00dev->beacon_int - 10);
|
||||
rt2x00_set_field32(®, MAC_CSR11_TBCN_BEFORE_WAKEUP,
|
||||
|
@ -855,7 +855,7 @@ static void rt73usb_config_ps(struct rt2x00_dev *rt2x00dev,
|
|||
rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0,
|
||||
USB_MODE_SLEEP, REGISTER_TIMEOUT);
|
||||
} else {
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR11, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR11);
|
||||
rt2x00_set_field32(®, MAC_CSR11_DELAY_AFTER_TBCN, 0);
|
||||
rt2x00_set_field32(®, MAC_CSR11_TBCN_BEFORE_WAKEUP, 0);
|
||||
rt2x00_set_field32(®, MAC_CSR11_AUTOWAKE, 0);
|
||||
|
@ -897,13 +897,13 @@ static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev,
|
|||
/*
|
||||
* Update FCS error count from register.
|
||||
*/
|
||||
rt2x00usb_register_read(rt2x00dev, STA_CSR0, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, STA_CSR0);
|
||||
qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
|
||||
|
||||
/*
|
||||
* Update False CCA count from register.
|
||||
*/
|
||||
rt2x00usb_register_read(rt2x00dev, STA_CSR1, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, STA_CSR1);
|
||||
qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
|
||||
}
|
||||
|
||||
|
@ -1034,12 +1034,12 @@ static void rt73usb_start_queue(struct data_queue *queue)
|
|||
|
||||
switch (queue->qid) {
|
||||
case QID_RX:
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR0);
|
||||
rt2x00_set_field32(®, TXRX_CSR0_DISABLE_RX, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
|
||||
break;
|
||||
case QID_BEACON:
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR9);
|
||||
rt2x00_set_field32(®, TXRX_CSR9_TSF_TICKING, 1);
|
||||
rt2x00_set_field32(®, TXRX_CSR9_TBTT_ENABLE, 1);
|
||||
rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 1);
|
||||
|
@ -1057,12 +1057,12 @@ static void rt73usb_stop_queue(struct data_queue *queue)
|
|||
|
||||
switch (queue->qid) {
|
||||
case QID_RX:
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR0);
|
||||
rt2x00_set_field32(®, TXRX_CSR0_DISABLE_RX, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
|
||||
break;
|
||||
case QID_BEACON:
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR9);
|
||||
rt2x00_set_field32(®, TXRX_CSR9_TSF_TICKING, 0);
|
||||
rt2x00_set_field32(®, TXRX_CSR9_TBTT_ENABLE, 0);
|
||||
rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 0);
|
||||
|
@ -1121,7 +1121,7 @@ static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev,
|
|||
* Wait for stable hardware.
|
||||
*/
|
||||
for (i = 0; i < 100; i++) {
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR0, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR0);
|
||||
if (reg)
|
||||
break;
|
||||
msleep(1);
|
||||
|
@ -1159,13 +1159,13 @@ static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
|||
{
|
||||
u32 reg;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR0);
|
||||
rt2x00_set_field32(®, TXRX_CSR0_AUTO_TX_SEQ, 1);
|
||||
rt2x00_set_field32(®, TXRX_CSR0_DISABLE_RX, 0);
|
||||
rt2x00_set_field32(®, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR1, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR1);
|
||||
rt2x00_set_field32(®, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
|
||||
rt2x00_set_field32(®, TXRX_CSR1_BBP_ID0_VALID, 1);
|
||||
rt2x00_set_field32(®, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
|
||||
|
@ -1179,7 +1179,7 @@ static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
|||
/*
|
||||
* CCK TXD BBP registers
|
||||
*/
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR2, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR2);
|
||||
rt2x00_set_field32(®, TXRX_CSR2_BBP_ID0, 13);
|
||||
rt2x00_set_field32(®, TXRX_CSR2_BBP_ID0_VALID, 1);
|
||||
rt2x00_set_field32(®, TXRX_CSR2_BBP_ID1, 12);
|
||||
|
@ -1193,7 +1193,7 @@ static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
|||
/*
|
||||
* OFDM TXD BBP registers
|
||||
*/
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR3, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR3);
|
||||
rt2x00_set_field32(®, TXRX_CSR3_BBP_ID0, 7);
|
||||
rt2x00_set_field32(®, TXRX_CSR3_BBP_ID0_VALID, 1);
|
||||
rt2x00_set_field32(®, TXRX_CSR3_BBP_ID1, 6);
|
||||
|
@ -1202,21 +1202,21 @@ static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
|||
rt2x00_set_field32(®, TXRX_CSR3_BBP_ID2_VALID, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, TXRX_CSR3, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR7, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR7);
|
||||
rt2x00_set_field32(®, TXRX_CSR7_ACK_CTS_6MBS, 59);
|
||||
rt2x00_set_field32(®, TXRX_CSR7_ACK_CTS_9MBS, 53);
|
||||
rt2x00_set_field32(®, TXRX_CSR7_ACK_CTS_12MBS, 49);
|
||||
rt2x00_set_field32(®, TXRX_CSR7_ACK_CTS_18MBS, 46);
|
||||
rt2x00usb_register_write(rt2x00dev, TXRX_CSR7, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR8, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR8);
|
||||
rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_24MBS, 44);
|
||||
rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_36MBS, 42);
|
||||
rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_48MBS, 42);
|
||||
rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_54MBS, 42);
|
||||
rt2x00usb_register_write(rt2x00dev, TXRX_CSR8, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR9);
|
||||
rt2x00_set_field32(®, TXRX_CSR9_BEACON_INTERVAL, 0);
|
||||
rt2x00_set_field32(®, TXRX_CSR9_TSF_TICKING, 0);
|
||||
rt2x00_set_field32(®, TXRX_CSR9_TSF_SYNC, 0);
|
||||
|
@ -1227,7 +1227,7 @@ static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
|||
|
||||
rt2x00usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR6, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR6);
|
||||
rt2x00_set_field32(®, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_CSR6, reg);
|
||||
|
||||
|
@ -1255,7 +1255,7 @@ static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
|||
rt2x00usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
|
||||
rt2x00usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR9, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR9);
|
||||
rt2x00_set_field32(®, MAC_CSR9_CW_SELECT, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_CSR9, reg);
|
||||
|
||||
|
@ -1275,24 +1275,24 @@ static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
|||
* These registers are cleared on read,
|
||||
* so we may pass a useless variable to store the value.
|
||||
*/
|
||||
rt2x00usb_register_read(rt2x00dev, STA_CSR0, ®);
|
||||
rt2x00usb_register_read(rt2x00dev, STA_CSR1, ®);
|
||||
rt2x00usb_register_read(rt2x00dev, STA_CSR2, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, STA_CSR0);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, STA_CSR1);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, STA_CSR2);
|
||||
|
||||
/*
|
||||
* Reset MAC and BBP registers.
|
||||
*/
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR1, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR1);
|
||||
rt2x00_set_field32(®, MAC_CSR1_SOFT_RESET, 1);
|
||||
rt2x00_set_field32(®, MAC_CSR1_BBP_RESET, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_CSR1, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR1, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR1);
|
||||
rt2x00_set_field32(®, MAC_CSR1_SOFT_RESET, 0);
|
||||
rt2x00_set_field32(®, MAC_CSR1_BBP_RESET, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_CSR1, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR1, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR1);
|
||||
rt2x00_set_field32(®, MAC_CSR1_HOST_READY, 1);
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_CSR1, reg);
|
||||
|
||||
|
@ -1399,7 +1399,7 @@ static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
|
|||
|
||||
put_to_sleep = (state != STATE_AWAKE);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR12, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR12);
|
||||
rt2x00_set_field32(®, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
|
||||
rt2x00_set_field32(®, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_CSR12, reg);
|
||||
|
@ -1410,7 +1410,7 @@ static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
|
|||
* device has entered the correct state.
|
||||
*/
|
||||
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR12, ®2);
|
||||
reg2 = rt2x00usb_register_read(rt2x00dev, MAC_CSR12);
|
||||
state = rt2x00_get_field32(reg2, MAC_CSR12_BBP_CURRENT_STATE);
|
||||
if (state == !put_to_sleep)
|
||||
return 0;
|
||||
|
@ -1547,7 +1547,7 @@ static void rt73usb_write_beacon(struct queue_entry *entry,
|
|||
* Disable beaconing while we are reloading the beacon data,
|
||||
* otherwise we might be sending out invalid data.
|
||||
*/
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR9);
|
||||
orig_reg = reg;
|
||||
rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
|
||||
|
@ -1612,7 +1612,7 @@ static void rt73usb_clear_beacon(struct queue_entry *entry)
|
|||
* Disable beaconing while we are reloading the beacon data,
|
||||
* otherwise we might be sending out invalid data.
|
||||
*/
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, &orig_reg);
|
||||
orig_reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR9);
|
||||
reg = orig_reg;
|
||||
rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
|
||||
|
@ -1873,7 +1873,7 @@ static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
|
|||
* Identify RF chipset.
|
||||
*/
|
||||
value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR0, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR0);
|
||||
rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
|
||||
value, rt2x00_get_field32(reg, MAC_CSR0_REVISION));
|
||||
|
||||
|
@ -2197,7 +2197,7 @@ static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
|
|||
* Enable rfkill polling by setting GPIO direction of the
|
||||
* rfkill switch GPIO pin correctly.
|
||||
*/
|
||||
rt2x00usb_register_read(rt2x00dev, MAC_CSR13, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR13);
|
||||
rt2x00_set_field32(®, MAC_CSR13_DIR7, 0);
|
||||
rt2x00usb_register_write(rt2x00dev, MAC_CSR13, reg);
|
||||
|
||||
|
@ -2269,7 +2269,7 @@ static int rt73usb_conf_tx(struct ieee80211_hw *hw,
|
|||
field.bit_offset = (queue_idx & 1) * 16;
|
||||
field.bit_mask = 0xffff << field.bit_offset;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, offset, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, offset);
|
||||
rt2x00_set_field32(®, field, queue->txop);
|
||||
rt2x00usb_register_write(rt2x00dev, offset, reg);
|
||||
|
||||
|
@ -2277,15 +2277,15 @@ static int rt73usb_conf_tx(struct ieee80211_hw *hw,
|
|||
field.bit_offset = queue_idx * 4;
|
||||
field.bit_mask = 0xf << field.bit_offset;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, AIFSN_CSR, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, AIFSN_CSR);
|
||||
rt2x00_set_field32(®, field, queue->aifs);
|
||||
rt2x00usb_register_write(rt2x00dev, AIFSN_CSR, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, CWMIN_CSR, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, CWMIN_CSR);
|
||||
rt2x00_set_field32(®, field, queue->cw_min);
|
||||
rt2x00usb_register_write(rt2x00dev, CWMIN_CSR, reg);
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, CWMAX_CSR, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, CWMAX_CSR);
|
||||
rt2x00_set_field32(®, field, queue->cw_max);
|
||||
rt2x00usb_register_write(rt2x00dev, CWMAX_CSR, reg);
|
||||
|
||||
|
@ -2298,9 +2298,9 @@ static u64 rt73usb_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
|
|||
u64 tsf;
|
||||
u32 reg;
|
||||
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR13, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR13);
|
||||
tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
|
||||
rt2x00usb_register_read(rt2x00dev, TXRX_CSR12, ®);
|
||||
reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR12);
|
||||
tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
|
||||
|
||||
return tsf;
|
||||
|
|
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