x86/centaur: merge 32 & 64 bit version
there should be no difference, except: * the 64bit variant now also initializes the padlock unit. * ->c_early_init() is executed again from ->c_init() * the 64bit fixups made into 32bit path. Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Cc: herbert@gondor.apana.org.au LKML-Reference: <1237029843-28076-2-git-send-email-sebastian@breakpoint.cc> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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48f4c485c2
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@ -456,24 +456,9 @@ config CPU_SUP_AMD
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If unsure, say N.
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config CPU_SUP_CENTAUR_32
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config CPU_SUP_CENTAUR
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default y
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bool "Support Centaur processors" if PROCESSOR_SELECT
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depends on !64BIT
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---help---
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This enables detection, tunings and quirks for Centaur processors
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You need this enabled if you want your kernel to run on a
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Centaur CPU. Disabling this option on other types of CPUs
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makes the kernel a tiny bit smaller. Disabling it on a Centaur
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CPU might render the kernel unbootable.
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If unsure, say N.
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config CPU_SUP_CENTAUR_64
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default y
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bool "Support Centaur processors" if PROCESSOR_SELECT
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depends on 64BIT
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---help---
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This enables detection, tunings and quirks for Centaur processors
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@ -19,8 +19,7 @@ obj-$(CONFIG_X86_CPU_DEBUG) += cpu_debug.o
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obj-$(CONFIG_CPU_SUP_INTEL) += intel.o
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obj-$(CONFIG_CPU_SUP_AMD) += amd.o
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obj-$(CONFIG_CPU_SUP_CYRIX_32) += cyrix.o
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obj-$(CONFIG_CPU_SUP_CENTAUR_32) += centaur.o
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obj-$(CONFIG_CPU_SUP_CENTAUR_64) += centaur_64.o
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obj-$(CONFIG_CPU_SUP_CENTAUR) += centaur.o
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obj-$(CONFIG_CPU_SUP_TRANSMETA_32) += transmeta.o
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obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
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@ -1,11 +1,11 @@
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#include <linux/bitops.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/bitops.h>
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#include <asm/processor.h>
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#include <asm/msr.h>
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#include <asm/e820.h>
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#include <asm/mtrr.h>
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#include <asm/msr.h>
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#include "cpu.h"
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@ -276,7 +276,7 @@ static void __cpuinit init_c3(struct cpuinfo_x86 *c)
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*/
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c->x86_capability[5] = cpuid_edx(0xC0000001);
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}
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#ifdef CONFIG_X86_32
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/* Cyrix III family needs CX8 & PGE explicitly enabled. */
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if (c->x86_model >= 6 && c->x86_model <= 9) {
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rdmsr(MSR_VIA_FCR, lo, hi);
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@ -288,6 +288,11 @@ static void __cpuinit init_c3(struct cpuinfo_x86 *c)
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/* Before Nehemiah, the C3's had 3dNOW! */
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if (c->x86_model >= 6 && c->x86_model < 9)
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set_cpu_cap(c, X86_FEATURE_3DNOW);
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#endif
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if (c->x86 == 0x6 && c->x86_model >= 0xf) {
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c->x86_cache_alignment = c->x86_clflush_size * 2;
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set_cpu_cap(c, X86_FEATURE_REP_GOOD);
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}
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display_cacheinfo(c);
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}
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@ -316,16 +321,25 @@ enum {
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static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)
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{
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switch (c->x86) {
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#ifdef CONFIG_X86_32
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case 5:
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/* Emulate MTRRs using Centaur's MCR. */
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set_cpu_cap(c, X86_FEATURE_CENTAUR_MCR);
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break;
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#endif
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case 6:
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if (c->x86_model >= 0xf)
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set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
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break;
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}
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#ifdef CONFIG_X86_64
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set_cpu_cap(c, X86_FEATURE_SYSENTER32);
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#endif
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}
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static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
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{
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#ifdef CONFIG_X86_32
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char *name;
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u32 fcr_set = 0;
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u32 fcr_clr = 0;
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@ -337,8 +351,10 @@ static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
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* 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway
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*/
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clear_cpu_cap(c, 0*32+31);
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#endif
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early_init_centaur(c);
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switch (c->x86) {
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#ifdef CONFIG_X86_32
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case 5:
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switch (c->x86_model) {
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case 4:
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@ -442,16 +458,20 @@ static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
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}
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sprintf(c->x86_model_id, "WinChip %s", name);
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break;
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#endif
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case 6:
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init_c3(c);
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break;
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}
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#ifdef CONFIG_X86_64
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set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
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#endif
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}
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static unsigned int __cpuinit
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centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size)
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{
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#ifdef CONFIG_X86_32
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/* VIA C3 CPUs (670-68F) need further shifting. */
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if ((c->x86 == 6) && ((c->x86_model == 7) || (c->x86_model == 8)))
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size >>= 8;
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@ -464,7 +484,7 @@ centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size)
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if ((c->x86 == 6) && (c->x86_model == 9) &&
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(c->x86_mask == 1) && (size == 65))
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size -= 1;
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#endif
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return size;
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}
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@ -1,37 +0,0 @@
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <asm/cpufeature.h>
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#include <asm/processor.h>
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#include "cpu.h"
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static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)
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{
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if (c->x86 == 0x6 && c->x86_model >= 0xf)
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set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
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set_cpu_cap(c, X86_FEATURE_SYSENTER32);
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}
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static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
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{
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early_init_centaur(c);
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if (c->x86 == 0x6 && c->x86_model >= 0xf) {
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c->x86_cache_alignment = c->x86_clflush_size * 2;
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set_cpu_cap(c, X86_FEATURE_REP_GOOD);
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}
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set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
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}
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static const struct cpu_dev centaur_cpu_dev __cpuinitconst = {
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.c_vendor = "Centaur",
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.c_ident = { "CentaurHauls" },
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.c_early_init = early_init_centaur,
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.c_init = init_centaur,
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.c_x86_vendor = X86_VENDOR_CENTAUR,
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};
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cpu_dev_register(centaur_cpu_dev);
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