powerpc/85xx: Added dts for P1021RDB-PC board
P1021RDB-PC Overview
-----------------
1Gbyte DDR3 (on board DDR)
16Mbyte NOR flash
32Mbyte eSLC NAND Flash
256 Kbit M24256 I2C EEPROM
128 Mbit SPI Flash memory
Real-time clock on I2C bus
SD/MMC connector to interface with the SD memory card
PCIex
- x1 PCIe slot or x1 PCIe to dual SATA controller
- x1 mini-PCIe slot
USB 2.0
- ULPI PHY interface: SMSC USB3300 USB PHY and Genesys Logic’s GL850A
- Two USB2.0 Type A receptacles
- One USB2.0 signal to Mini PCIe slot
eTSEC1: Connected to RGMII PHY VSC7385
eTSEC2: Connected to SGMII PHY VSC8221
eTSEC3: Connected to SGMII PHY AR8021
DUART interface: supports two UARTs up to 115200 bps for console display
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Xu Jiucheng <B37781@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Xu Jiucheng
Kumar Gala
Родитель
10241842fb
Коммит
490bdb77b6
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@ -144,6 +144,10 @@
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/include/ "pq3-usb2-dr-0.dtsi"
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/include/ "pq3-esdhc-0.dtsi"
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sdhc@2e000 {
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sdhci,auto-cmd12;
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};
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/include/ "pq3-sec3.3-0.dtsi"
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/include/ "pq3-mpic.dtsi"
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@ -0,0 +1,96 @@
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/*
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* P1021 RDB Device Tree Source
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*
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||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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||||
*/
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/include/ "fsl/p1021si-pre.dtsi"
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/ {
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model = "fsl,P1021RDB";
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compatible = "fsl,P1021RDB-PC";
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memory {
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device_type = "memory";
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};
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lbc: localbus@ffe05000 {
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reg = <0 0xffe05000 0 0x1000>;
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/* NOR, NAND Flashes and Vitesse 5 port L2 switch */
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ranges = <0x0 0x0 0x0 0xef000000 0x01000000
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0x1 0x0 0x0 0xff800000 0x00040000
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0x2 0x0 0x0 0xffb00000 0x00020000>;
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};
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soc: soc@ffe00000 {
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ranges = <0x0 0x0 0xffe00000 0x100000>;
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};
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pci0: pcie@ffe09000 {
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ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
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reg = <0 0xffe09000 0 0x1000>;
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pcie@0 {
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ranges = <0x2000000 0x0 0xa0000000
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0x2000000 0x0 0xa0000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x100000>;
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};
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};
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pci1: pcie@ffe0a000 {
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reg = <0 0xffe0a000 0 0x1000>;
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ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
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pcie@0 {
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ranges = <0x2000000 0x0 0x80000000
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0x2000000 0x0 0x80000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x100000>;
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};
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};
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qe: qe@ffe80000 {
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ranges = <0x0 0x0 0xffe80000 0x40000>;
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reg = <0 0xffe80000 0 0x480>;
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brg-frequency = <0>;
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bus-frequency = <0>;
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};
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};
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/include/ "p1021rdb.dtsi"
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/include/ "fsl/p1021si-post.dtsi"
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@ -0,0 +1,236 @@
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/*
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* P1021 RDB Device Tree Source stub (no addresses or top-level ranges)
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*
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* Copyright 2011 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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&lbc {
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nor@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x1000000>;
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bank-width = <2>;
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device-width = <1>;
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partition@0 {
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/* This location must not be altered */
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/* 256KB for Vitesse 7385 Switch firmware */
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reg = <0x0 0x00040000>;
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label = "NOR Vitesse-7385 Firmware";
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read-only;
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};
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partition@40000 {
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/* 256KB for DTB Image */
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reg = <0x00040000 0x00040000>;
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label = "NOR DTB Image";
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};
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partition@80000 {
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/* 3.5 MB for Linux Kernel Image */
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reg = <0x00080000 0x00380000>;
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label = "NOR Linux Kernel Image";
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};
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partition@400000 {
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/* 11MB for JFFS2 based Root file System */
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reg = <0x00400000 0x00b00000>;
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label = "NOR JFFS2 Root File System";
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};
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partition@f00000 {
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/* This location must not be altered */
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/* 512KB for u-boot Bootloader Image */
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/* 512KB for u-boot Environment Variables */
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reg = <0x00f00000 0x00100000>;
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label = "NOR U-Boot Image";
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};
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};
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nand@1,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,p1021-fcm-nand",
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"fsl,elbc-fcm-nand";
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reg = <0x1 0x0 0x40000>;
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partition@0 {
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/* This location must not be altered */
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/* 1MB for u-boot Bootloader Image */
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reg = <0x0 0x00100000>;
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label = "NAND U-Boot Image";
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read-only;
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};
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partition@100000 {
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/* 1MB for DTB Image */
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reg = <0x00100000 0x00100000>;
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label = "NAND DTB Image";
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};
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partition@200000 {
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/* 4MB for Linux Kernel Image */
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reg = <0x00200000 0x00400000>;
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label = "NAND Linux Kernel Image";
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};
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partition@600000 {
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/* 4MB for Compressed Root file System Image */
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reg = <0x00600000 0x00400000>;
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label = "NAND Compressed RFS Image";
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};
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partition@a00000 {
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/* 7MB for JFFS2 based Root file System */
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reg = <0x00a00000 0x00700000>;
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label = "NAND JFFS2 Root File System";
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};
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partition@1100000 {
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/* 15MB for User Writable Area */
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reg = <0x01100000 0x00f00000>;
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label = "NAND Writable User area";
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};
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};
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L2switch@2,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "vitesse-7385";
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reg = <0x2 0x0 0x20000>;
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};
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};
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&soc {
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i2c@3000 {
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rtc@68 {
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compatible = "pericom,pt7c4338";
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reg = <0x68>;
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};
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};
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spi@7000 {
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spansion,s25sl12801";
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reg = <0>;
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spi-max-frequency = <40000000>; /* input clock */
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partition@u-boot {
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/* 512KB for u-boot Bootloader Image */
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reg = <0x0 0x00080000>;
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label = "SPI Flash U-Boot Image";
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read-only;
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};
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partition@dtb {
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/* 512KB for DTB Image */
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reg = <0x00080000 0x00080000>;
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label = "SPI Flash DTB Image";
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};
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partition@kernel {
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/* 4MB for Linux Kernel Image */
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reg = <0x00100000 0x00400000>;
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label = "SPI Flash Linux Kernel Image";
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};
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partition@fs {
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/* 4MB for Compressed RFS Image */
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reg = <0x00500000 0x00400000>;
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label = "SPI Flash Compressed RFSImage";
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};
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partition@jffs-fs {
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/* 7MB for JFFS2 based RFS */
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reg = <0x00900000 0x00700000>;
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label = "SPI Flash JFFS2 RFS";
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};
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};
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};
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usb@22000 {
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phy_type = "ulpi";
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};
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mdio@24000 {
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phy0: ethernet-phy@0 {
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interrupt-parent = <&mpic>;
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interrupts = <3 1 0 0>;
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reg = <0x0>;
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};
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phy1: ethernet-phy@1 {
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interrupt-parent = <&mpic>;
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interrupts = <2 1 0 0>;
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reg = <0x1>;
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};
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tbi0: tbi-phy@11 {
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reg = <0x11>;
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||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
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mdio@25000 {
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tbi1: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
|
||||
};
|
||||
};
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mdio@26000 {
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tbi2: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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||||
};
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};
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enet0: ethernet@b0000 {
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fixed-link = <1 1 1000 0 0>;
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phy-connection-type = "rgmii-id";
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};
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enet1: ethernet@b1000 {
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phy-handle = <&phy0>;
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tbi-handle = <&tbi1>;
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phy-connection-type = "sgmii";
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};
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enet2: ethernet@b2000 {
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phy-handle = <&phy1>;
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tbi-handle = <&tbi2>;
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||||
phy-connection-type = "rgmii-id";
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};
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};
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@ -0,0 +1,96 @@
|
|||
/*
|
||||
* P1021 RDB Device Tree Source (36-bit address map)
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/include/ "fsl/p1021si-pre.dtsi"
|
||||
/ {
|
||||
model = "fsl,P1021RDB";
|
||||
compatible = "fsl,P1021RDB-PC";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
lbc: localbus@fffe05000 {
|
||||
reg = <0xf 0xffe05000 0 0x1000>;
|
||||
|
||||
/* NOR, NAND Flashes and Vitesse 5 port L2 switch */
|
||||
ranges = <0x0 0x0 0xf 0xef000000 0x01000000
|
||||
0x1 0x0 0xf 0xff800000 0x00040000
|
||||
0x2 0x0 0xf 0xffb00000 0x00020000>;
|
||||
};
|
||||
|
||||
soc: soc@fffe00000 {
|
||||
ranges = <0x0 0xf 0xffe00000 0x100000>;
|
||||
};
|
||||
|
||||
pci0: pcie@fffe09000 {
|
||||
ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
|
||||
reg = <0xf 0xffe09000 0 0x1000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xa0000000
|
||||
0x2000000 0x0 0xa0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@fffe0a000 {
|
||||
reg = <0xf 0xffe0a000 0 0x1000>;
|
||||
ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
|
||||
0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
|
||||
pcie@0 {
|
||||
ranges = <0x2000000 0x0 0xc0000000
|
||||
0x2000000 0x0 0xc0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x1000000 0x0 0x0
|
||||
0x1000000 0x0 0x0
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
qe: qe@fffe80000 {
|
||||
ranges = <0x0 0xf 0xffe80000 0x40000>;
|
||||
reg = <0xf 0xffe80000 0 0x480>;
|
||||
brg-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "p1021rdb.dtsi"
|
||||
/include/ "fsl/p1021si-post.dtsi"
|
||||
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