blackfin updates for Linux 3.11
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJR28L1AAoJEJommM3PjknHzPYP/1G5Fxixm8PqCUCO9vGv4xEL t1epDnkBZqfNSYnbElQe6Ba6d+NaGGBAj3Qfv/MdPnypTG4op4YQP6V9QsxFN/eW g+jI7Nu+xXf4i7QKakC88ek2JxBUW5ysTZovwxQuXA0q1hPoVLMgGJyaUnIWaL8H jucHy5THeB8hSpbOAlLUG18vEXpaSi/eeMn6XX99i5anmyeT4Sw2hwFuKXJgGQd/ +taquzQSwbga9MDwGuZlaui7ZgP33FKQP5p9kn7v2zt+BV5/w0T+MeoloY8EO9uE wEJqeZdPHnjKNy5ilX3l5CBDEpYSVyrZFPF1Z3x/OiouQHOppvoM1R/L/1pbczIQ MbomugiHQVqkw9wVw8Bfzh6rx8VAapsvPegnV9oseAHKS/0HObsfAFxNeCzahr7l OTPIPeTwSkJRS06pDItK/nPUucCLR7meAgWJ7Ts/FJEWZOrlEjJqfOK8JxB6rSL4 uectlHC6irRjuAFyqT5eTRx0av8DevRiz15YTFHxXwqrQmaDFyns8IiRASDbi+sz FXP0caw9tD2eKwoJ9kIaqvHq15yxkfSA7UagqZbVa5uGZQtZ1leQQy0rHR9z807y 5C9w5YoMH/UpbnPOtJNnBVx+u/XFD+o6bJx0tWRop9zhUnqY35vt+mcL2AbHr4/v TT0z8stoOAfTuBbMrIXY =hGeR -----END PGP SIGNATURE----- Merge tag 'blackfin-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/realmz6/blackfin-linux Pull blackfin updates from Steven Miao: "blackfin updates for Linux 3.11" * tag 'blackfin-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/realmz6/blackfin-linux: smp: refine bf561 smpboot code bf609: stmmac: fix build after stmmac_mdio_bus_data changed bf609: add cpu revision 0.1 bf609: rename bfin6xx_spi to bfin_spi3 kgdb: blackfin: include irq_regs.h in kgdb.c
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Коммит
49283f6020
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@ -283,7 +283,7 @@ config BF_REV_0_0
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config BF_REV_0_1
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bool "0.1"
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depends on (BF51x || BF52x || (BF54x && !BF54xM))
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depends on (BF51x || BF52x || (BF54x && !BF54xM) || BF60x)
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config BF_REV_0_2
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bool "0.2"
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@ -240,7 +240,7 @@ struct bfin_spi_regs {
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#define MAX_CTRL_CS 8 /* cs in spi controller */
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/* device.platform_data for SSP controller devices */
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struct bfin6xx_spi_master {
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struct bfin_spi3_master {
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u16 num_chipselect;
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u16 pin_req[7];
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};
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@ -248,7 +248,7 @@ struct bfin6xx_spi_master {
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/* spi_board_info.controller_data for SPI slave devices,
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* copied to spi_device.platform_data ... mostly for dma tuning
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*/
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struct bfin6xx_spi_chip {
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struct bfin_spi3_chip {
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u32 control;
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u16 cs_chg_udelay; /* Some devices require 16-bit delays */
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u32 tx_dummy_val; /* tx value for rx only transfer */
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@ -9,6 +9,7 @@
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#include <linux/ptrace.h> /* for linux pt_regs struct */
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#include <linux/kgdb.h>
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#include <linux/uaccess.h>
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#include <asm/irq_regs.h>
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void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
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{
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@ -69,7 +69,6 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
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SSYNC();
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/* We are done with local CPU inits, unblock the boot CPU. */
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set_cpu_online(cpu, true);
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spin_lock(&boot_lock);
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spin_unlock(&boot_lock);
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}
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@ -91,7 +90,9 @@ int __cpuinit platform_boot_secondary(unsigned int cpu, struct task_struct *idle
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SSYNC();
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}
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timeout = jiffies + 1 * HZ;
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timeout = jiffies + HZ;
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/* release the lock and let coreb run */
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spin_unlock(&boot_lock);
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while (time_before(jiffies, timeout)) {
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if (cpu_online(cpu))
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break;
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@ -100,8 +101,6 @@ int __cpuinit platform_boot_secondary(unsigned int cpu, struct task_struct *idle
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}
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if (cpu_online(cpu)) {
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/* release the lock and let coreb run */
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spin_unlock(&boot_lock);
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return 0;
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} else
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panic("CPU%u: processor failed to boot\n", cpu);
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@ -17,7 +17,7 @@
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/usb/musb.h>
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#include <asm/bfin6xx_spi.h>
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#include <asm/bfin_spi3.h>
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#include <asm/dma.h>
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#include <asm/gpio.h>
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#include <asm/nand.h>
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@ -108,7 +108,6 @@ static struct platform_device bfin_rotary_device = {
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static unsigned short pins[] = P_RMII0;
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static struct stmmac_mdio_bus_data phy_private_data = {
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.bus_id = 0,
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.phy_mask = 1,
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};
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@ -745,13 +744,13 @@ static struct flash_platform_data bfin_spi_flash_data = {
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.type = "w25q32",
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};
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static struct bfin6xx_spi_chip spi_flash_chip_info = {
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static struct bfin_spi3_chip spi_flash_chip_info = {
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.enable_dma = true, /* use dma transfer with this chip*/
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};
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#endif
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#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
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static struct bfin6xx_spi_chip spidev_chip_info = {
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static struct bfin_spi3_chip spidev_chip_info = {
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.enable_dma = true,
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};
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#endif
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@ -1296,7 +1295,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
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},
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#endif
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};
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#if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
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#if IS_ENABLED(CONFIG_SPI_BFIN_V3)
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/* SPI (0) */
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static struct resource bfin_spi0_resource[] = {
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{
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@ -1337,13 +1336,13 @@ static struct resource bfin_spi1_resource[] = {
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};
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/* SPI controller data */
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static struct bfin6xx_spi_master bf60x_spi_master_info0 = {
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static struct bfin_spi3_master bf60x_spi_master_info0 = {
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.num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
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.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
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};
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static struct platform_device bf60x_spi_master0 = {
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.name = "bfin-spi",
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.name = "bfin-spi3",
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.id = 0, /* Bus number */
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.num_resources = ARRAY_SIZE(bfin_spi0_resource),
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.resource = bfin_spi0_resource,
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@ -1352,13 +1351,13 @@ static struct platform_device bf60x_spi_master0 = {
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},
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};
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static struct bfin6xx_spi_master bf60x_spi_master_info1 = {
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static struct bfin_spi3_master bf60x_spi_master_info1 = {
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.num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
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.pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
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};
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static struct platform_device bf60x_spi_master1 = {
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.name = "bfin-spi",
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.name = "bfin-spi3",
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.id = 1, /* Bus number */
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.num_resources = ARRAY_SIZE(bfin_spi1_resource),
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.resource = bfin_spi1_resource,
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@ -1534,7 +1533,7 @@ static struct platform_device *ezkit_devices[] __initdata = {
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&bfin_sdh_device,
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#endif
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#if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
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#if IS_ENABLED(CONFIG_SPI_BFIN_V3)
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&bf60x_spi_master0,
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&bf60x_spi_master1,
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#endif
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@ -49,6 +49,7 @@ unsigned long blackfin_iflush_l1_entry[NR_CPUS];
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struct blackfin_initial_pda __cpuinitdata initial_pda_coreb;
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enum ipi_message_type {
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BFIN_IPI_NONE,
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BFIN_IPI_TIMER,
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BFIN_IPI_RESCHEDULE,
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BFIN_IPI_CALL_FUNC,
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@ -72,8 +73,8 @@ static DEFINE_SPINLOCK(stop_lock);
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/* Simple FIFO buffer, overflow leads to panic */
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struct ipi_data {
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unsigned long count;
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unsigned long bits;
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atomic_t count;
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atomic_t bits;
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};
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static DEFINE_PER_CPU(struct ipi_data, bfin_ipi);
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@ -146,7 +147,6 @@ static irqreturn_t ipi_handler_int1(int irq, void *dev_instance)
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platform_clear_ipi(cpu, IRQ_SUPPLE_1);
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bfin_ipi_data = &__get_cpu_var(bfin_ipi);
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smp_mb();
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while ((pending = xchg(&bfin_ipi_data->bits, 0)) != 0) {
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msg = 0;
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do {
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@ -170,9 +170,8 @@ static irqreturn_t ipi_handler_int1(int irq, void *dev_instance)
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ipi_cpu_stop(cpu);
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break;
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}
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atomic_dec(&bfin_ipi_data->count);
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} while (msg < BITS_PER_LONG);
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smp_mb();
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}
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return IRQ_HANDLED;
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}
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@ -195,12 +194,10 @@ void send_ipi(const struct cpumask *cpumask, enum ipi_message_type msg)
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unsigned long flags;
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local_irq_save(flags);
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smp_mb();
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for_each_cpu(cpu, cpumask) {
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bfin_ipi_data = &per_cpu(bfin_ipi, cpu);
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smp_mb();
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set_bit(msg, &bfin_ipi_data->bits);
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bfin_ipi_data->count++;
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atomic_set_mask((1 << msg), &bfin_ipi_data->bits);
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atomic_inc(&bfin_ipi_data->count);
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platform_send_ipi_cpu(cpu, IRQ_SUPPLE_1);
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}
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@ -319,7 +316,6 @@ void __cpuinit secondary_start_kernel(void)
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setup_secondary(cpu);
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platform_secondary_init(cpu);
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/* setup local core timer */
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bfin_local_timer_setup();
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@ -335,6 +331,8 @@ void __cpuinit secondary_start_kernel(void)
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*/
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calibrate_delay();
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/* We are done with local CPU inits, unblock the boot CPU. */
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set_cpu_online(cpu, true);
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cpu_startup_entry(CPUHP_ONLINE);
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}
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