[media] m88rs2000: Correct m88rs2000_set_fec settings

Register 0x70 is used to set fec, register 0x76 is used to get fec

Register 0x76 is set to 0x8.

Signed-off-by: Malcolm Priestley <tvboxspy@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This commit is contained in:
Malcolm Priestley 2013-12-28 14:02:44 -03:00 коммит произвёл Mauro Carvalho Chehab
Родитель 7a9d6b43f8
Коммит 49c44802a7
1 изменённых файлов: 19 добавлений и 18 удалений

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@ -541,34 +541,39 @@ static int m88rs2000_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
static int m88rs2000_set_fec(struct m88rs2000_state *state, static int m88rs2000_set_fec(struct m88rs2000_state *state,
fe_code_rate_t fec) fe_code_rate_t fec)
{ {
u16 fec_set; u8 fec_set, reg;
int ret;
switch (fec) { switch (fec) {
/* This is not confirmed kept for reference */ case FEC_1_2:
/* case FEC_1_2: fec_set = 0x8;
fec_set = 0x88;
break; break;
case FEC_2_3: case FEC_2_3:
fec_set = 0x68; fec_set = 0x10;
break; break;
case FEC_3_4: case FEC_3_4:
fec_set = 0x48; fec_set = 0x20;
break; break;
case FEC_5_6: case FEC_5_6:
fec_set = 0x28; fec_set = 0x40;
break; break;
case FEC_7_8: case FEC_7_8:
fec_set = 0x18; fec_set = 0x80;
break; */ break;
case FEC_AUTO: case FEC_AUTO:
default: default:
fec_set = 0x08; fec_set = 0x0;
} }
m88rs2000_writereg(state, 0x76, fec_set);
return 0; reg = m88rs2000_readreg(state, 0x70);
reg &= 0x7;
ret = m88rs2000_writereg(state, 0x70, reg | fec_set);
ret |= m88rs2000_writereg(state, 0x76, 0x8);
return ret;
} }
static fe_code_rate_t m88rs2000_get_fec(struct m88rs2000_state *state) static fe_code_rate_t m88rs2000_get_fec(struct m88rs2000_state *state)
{ {
u8 reg; u8 reg;
@ -650,12 +655,8 @@ static int m88rs2000_set_frontend(struct dvb_frontend *fe)
if (ret < 0) if (ret < 0)
return -ENODEV; return -ENODEV;
/* Unknown */
reg = m88rs2000_readreg(state, 0x70);
ret = m88rs2000_writereg(state, 0x70, reg);
/* Set FEC */ /* Set FEC */
ret |= m88rs2000_set_fec(state, c->fec_inner); ret = m88rs2000_set_fec(state, c->fec_inner);
ret |= m88rs2000_writereg(state, 0x85, 0x1); ret |= m88rs2000_writereg(state, 0x85, 0x1);
ret |= m88rs2000_writereg(state, 0x8a, 0xbf); ret |= m88rs2000_writereg(state, 0x8a, 0xbf);
ret |= m88rs2000_writereg(state, 0x8d, 0x1e); ret |= m88rs2000_writereg(state, 0x8d, 0x1e);