[media] m88rs2000: Correct m88rs2000_set_fec settings
Register 0x70 is used to set fec, register 0x76 is used to get fec Register 0x76 is set to 0x8. Signed-off-by: Malcolm Priestley <tvboxspy@gmail.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
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Родитель
7a9d6b43f8
Коммит
49c44802a7
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@ -541,34 +541,39 @@ static int m88rs2000_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
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static int m88rs2000_set_fec(struct m88rs2000_state *state,
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static int m88rs2000_set_fec(struct m88rs2000_state *state,
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fe_code_rate_t fec)
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fe_code_rate_t fec)
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{
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{
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u16 fec_set;
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u8 fec_set, reg;
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int ret;
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switch (fec) {
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switch (fec) {
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/* This is not confirmed kept for reference */
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case FEC_1_2:
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/* case FEC_1_2:
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fec_set = 0x8;
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fec_set = 0x88;
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break;
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break;
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case FEC_2_3:
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case FEC_2_3:
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fec_set = 0x68;
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fec_set = 0x10;
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break;
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break;
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case FEC_3_4:
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case FEC_3_4:
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fec_set = 0x48;
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fec_set = 0x20;
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break;
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break;
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case FEC_5_6:
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case FEC_5_6:
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fec_set = 0x28;
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fec_set = 0x40;
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break;
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break;
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case FEC_7_8:
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case FEC_7_8:
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fec_set = 0x18;
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fec_set = 0x80;
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break; */
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break;
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case FEC_AUTO:
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case FEC_AUTO:
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default:
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default:
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fec_set = 0x08;
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fec_set = 0x0;
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}
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}
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m88rs2000_writereg(state, 0x76, fec_set);
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return 0;
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reg = m88rs2000_readreg(state, 0x70);
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reg &= 0x7;
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ret = m88rs2000_writereg(state, 0x70, reg | fec_set);
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ret |= m88rs2000_writereg(state, 0x76, 0x8);
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return ret;
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}
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}
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static fe_code_rate_t m88rs2000_get_fec(struct m88rs2000_state *state)
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static fe_code_rate_t m88rs2000_get_fec(struct m88rs2000_state *state)
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{
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{
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u8 reg;
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u8 reg;
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@ -650,12 +655,8 @@ static int m88rs2000_set_frontend(struct dvb_frontend *fe)
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if (ret < 0)
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if (ret < 0)
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return -ENODEV;
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return -ENODEV;
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/* Unknown */
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reg = m88rs2000_readreg(state, 0x70);
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ret = m88rs2000_writereg(state, 0x70, reg);
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/* Set FEC */
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/* Set FEC */
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ret |= m88rs2000_set_fec(state, c->fec_inner);
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ret = m88rs2000_set_fec(state, c->fec_inner);
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ret |= m88rs2000_writereg(state, 0x85, 0x1);
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ret |= m88rs2000_writereg(state, 0x85, 0x1);
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ret |= m88rs2000_writereg(state, 0x8a, 0xbf);
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ret |= m88rs2000_writereg(state, 0x8a, 0xbf);
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ret |= m88rs2000_writereg(state, 0x8d, 0x1e);
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ret |= m88rs2000_writereg(state, 0x8d, 0x1e);
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