V4L/DVB (6743): cx25840: fix endianness inconsistency
cx25840_read4 reads a little-endian 32-bit value whereas cx25840_write4 writes the 32-bit value as big-endian. Convert write4 to use little-endian as well (that's the correct endianness). Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
This commit is contained in:
Hans Verkuil
Mauro Carvalho Chehab
Родитель
6b1e56763b
Коммит
4a56eb3f53
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@ -38,71 +38,71 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
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switch (freq) {
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case 32000:
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x0f040610);
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cx25840_write4(client, 0x108, 0x1006040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0xee39bb01);
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cx25840_write4(client, 0x110, 0x01bb39ee);
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if (state->is_cx25836)
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break;
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/* src3/4/6_ctl = 0x0801f77f */
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cx25840_write4(client, 0x900, 0x7ff70108);
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cx25840_write4(client, 0x904, 0x7ff70108);
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cx25840_write4(client, 0x90c, 0x7ff70108);
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cx25840_write4(client, 0x900, 0x0801f77f);
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cx25840_write4(client, 0x904, 0x0801f77f);
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cx25840_write4(client, 0x90c, 0x0801f77f);
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break;
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case 44100:
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x0f040910);
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cx25840_write4(client, 0x108, 0x1009040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0xd66bec00);
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cx25840_write4(client, 0x110, 0x00ec6bd6);
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if (state->is_cx25836)
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break;
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/* src3/4/6_ctl = 0x08016d59 */
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cx25840_write4(client, 0x900, 0x596d0108);
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cx25840_write4(client, 0x904, 0x596d0108);
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cx25840_write4(client, 0x90c, 0x596d0108);
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cx25840_write4(client, 0x900, 0x08016d59);
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cx25840_write4(client, 0x904, 0x08016d59);
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cx25840_write4(client, 0x90c, 0x08016d59);
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break;
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case 48000:
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x0f040a10);
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cx25840_write4(client, 0x108, 0x100a040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0xe5d69800);
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cx25840_write4(client, 0x110, 0x0098d6e5);
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if (state->is_cx25836)
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break;
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/* src3/4/6_ctl = 0x08014faa */
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cx25840_write4(client, 0x900, 0xaa4f0108);
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cx25840_write4(client, 0x904, 0xaa4f0108);
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cx25840_write4(client, 0x90c, 0xaa4f0108);
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cx25840_write4(client, 0x900, 0x08014faa);
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cx25840_write4(client, 0x904, 0x08014faa);
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cx25840_write4(client, 0x90c, 0x08014faa);
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break;
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}
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} else {
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switch (freq) {
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case 32000:
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x0f04081e);
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cx25840_write4(client, 0x108, 0x1e08040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0x69082a01);
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cx25840_write4(client, 0x110, 0x012a0869);
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if (state->is_cx25836)
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break;
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/* src1_ctl = 0x08010000 */
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cx25840_write4(client, 0x8f8, 0x00000108);
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cx25840_write4(client, 0x8f8, 0x08010000);
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/* src3/4/6_ctl = 0x08020000 */
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cx25840_write4(client, 0x900, 0x00000208);
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cx25840_write4(client, 0x904, 0x00000208);
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cx25840_write4(client, 0x90c, 0x00000208);
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cx25840_write4(client, 0x900, 0x08020000);
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cx25840_write4(client, 0x904, 0x08020000);
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cx25840_write4(client, 0x90c, 0x08020000);
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/* SA_MCLK_SEL=1, SA_MCLK_DIV=0x14 */
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cx25840_write(client, 0x127, 0x54);
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@ -110,40 +110,40 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
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case 44100:
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x0f040918);
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cx25840_write4(client, 0x108, 0x1809040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0xd66bec00);
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cx25840_write4(client, 0x110, 0x00ec6bd6);
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if (state->is_cx25836)
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break;
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/* src1_ctl = 0x08010000 */
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cx25840_write4(client, 0x8f8, 0xcd600108);
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cx25840_write4(client, 0x8f8, 0x080160cd);
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/* src3/4/6_ctl = 0x08020000 */
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cx25840_write4(client, 0x900, 0x85730108);
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cx25840_write4(client, 0x904, 0x85730108);
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cx25840_write4(client, 0x90c, 0x85730108);
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cx25840_write4(client, 0x900, 0x08017385);
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cx25840_write4(client, 0x904, 0x08017385);
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cx25840_write4(client, 0x90c, 0x08017385);
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break;
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case 48000:
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x0f040a18);
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cx25840_write4(client, 0x108, 0x180a040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0xe5d69800);
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cx25840_write4(client, 0x110, 0x0098d6e5);
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if (state->is_cx25836)
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break;
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/* src1_ctl = 0x08010000 */
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cx25840_write4(client, 0x8f8, 0x00800108);
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cx25840_write4(client, 0x8f8, 0x08018000);
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/* src3/4/6_ctl = 0x08020000 */
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cx25840_write4(client, 0x900, 0x55550108);
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cx25840_write4(client, 0x904, 0x55550108);
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cx25840_write4(client, 0x90c, 0x55550108);
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cx25840_write4(client, 0x900, 0x08015555);
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cx25840_write4(client, 0x904, 0x08015555);
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cx25840_write4(client, 0x90c, 0x08015555);
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break;
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}
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}
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@ -168,14 +168,14 @@ void cx25840_audio_set_path(struct i2c_client *client)
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if (state->aud_input == CX25840_AUDIO_SERIAL) {
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/* Set Path1 to Serial Audio Input */
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cx25840_write4(client, 0x8d0, 0x12100101);
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cx25840_write4(client, 0x8d0, 0x01011012);
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/* The microcontroller should not be started for the
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* non-tuner inputs: autodetection is specific for
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* TV audio. */
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} else {
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/* Set Path1 to Analog Demod Main Channel */
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cx25840_write4(client, 0x8d0, 0x7038061f);
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cx25840_write4(client, 0x8d0, 0x1f063870);
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}
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set_audclk_freq(client, state->audclk_freq);
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@ -73,10 +73,10 @@ int cx25840_write4(struct i2c_client *client, u16 addr, u32 value)
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u8 buffer[6];
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buffer[0] = addr >> 8;
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buffer[1] = addr & 0xff;
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buffer[2] = value >> 24;
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buffer[3] = (value >> 16) & 0xff;
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buffer[4] = (value >> 8) & 0xff;
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buffer[5] = value & 0xff;
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buffer[2] = value & 0xff;
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buffer[3] = (value >> 8) & 0xff;
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buffer[4] = (value >> 16) & 0xff;
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buffer[5] = value >> 24;
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return i2c_master_send(client, buffer, 6);
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}
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