platform/x86: intel_pmc_core: Avoid a u32 overflow
The register (SLP_S0_RES) at offset slp_s0_offset is a 32 bit register. The pmc_core_adjust_slp_s0_step() could overflow the u32 value while returning it after adjusting the step. Thus change to u64, this is already accounted for in debugfs attribute (that wants to output a 64 bit value). Signed-off-by: Rajat Jain <rajatja@google.com> Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
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@ -330,9 +330,9 @@ static inline void pmc_core_reg_write(struct pmc_dev *pmcdev, int
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writel(val, pmcdev->regbase + reg_offset);
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}
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static inline u32 pmc_core_adjust_slp_s0_step(u32 value)
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static inline u64 pmc_core_adjust_slp_s0_step(u32 value)
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{
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return value * SPT_PMC_SLP_S0_RES_COUNTER_STEP;
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return (u64)value * SPT_PMC_SLP_S0_RES_COUNTER_STEP;
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}
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static int pmc_core_dev_state_get(void *data, u64 *val)
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