x86/apic: Replace io_apic_ops with x86_io_apic_ops.
Which makes the code fit within the rest of the x86_ops functions. Acked-by: Suresh Siddha <suresh.b.siddha@intel.com> [v1: Changed x86_apic -> x86_ioapic per Yinghai Lu <yinghai@kernel.org> suggestion] [v2: Rebased on tip/x86/urgent and redid to match Ingo's syntax style] Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
This commit is contained in:
Konrad Rzeszutek Wilk
Родитель
69964ea4c7
Коммит
4a8e2a3115
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@ -5,7 +5,7 @@
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#include <asm/mpspec.h>
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#include <asm/apicdef.h>
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#include <asm/irq_vectors.h>
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#include <asm/x86_init.h>
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/*
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* Intel IO-APIC support for SMP and UP systems.
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*
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@ -21,15 +21,6 @@
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#define IO_APIC_REDIR_LEVEL_TRIGGER (1 << 15)
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#define IO_APIC_REDIR_MASKED (1 << 16)
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struct io_apic_ops {
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void (*init) (void);
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unsigned int (*read) (unsigned int apic, unsigned int reg);
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void (*write) (unsigned int apic, unsigned int reg, unsigned int value);
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void (*modify)(unsigned int apic, unsigned int reg, unsigned int value);
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};
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void __init set_io_apic_ops(const struct io_apic_ops *);
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/*
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* The structure of the IO-APIC:
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*/
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@ -156,7 +147,6 @@ struct io_apic_irq_attr;
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extern int io_apic_set_pci_routing(struct device *dev, int irq,
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struct io_apic_irq_attr *irq_attr);
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void setup_IO_APIC_irq_extra(u32 gsi);
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extern void ioapic_and_gsi_init(void);
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extern void ioapic_insert_resources(void);
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int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct io_apic_irq_attr *attr);
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@ -185,12 +175,29 @@ extern void mp_save_irq(struct mpc_intsrc *m);
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extern void disable_ioapic_support(void);
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extern void __init native_io_apic_init_mappings(void);
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extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);
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extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int val);
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extern void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);
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static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
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{
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return x86_io_apic_ops.read(apic, reg);
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}
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static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
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{
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x86_io_apic_ops.write(apic, reg, value);
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}
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static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
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{
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x86_io_apic_ops.modify(apic, reg, value);
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}
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#else /* !CONFIG_X86_IO_APIC */
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#define io_apic_assign_pci_irqs 0
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#define setup_ioapic_ids_from_mpc x86_init_noop
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static const int timer_through_8259 = 0;
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static inline void ioapic_and_gsi_init(void) { }
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static inline void ioapic_insert_resources(void) { }
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#define gsi_top (NR_IRQS_LEGACY)
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static inline int mp_find_ioapic(u32 gsi) { return 0; }
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@ -212,6 +219,10 @@ static inline int restore_ioapic_entries(void)
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static inline void mp_save_irq(struct mpc_intsrc *m) { };
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static inline void disable_ioapic_support(void) { }
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#define native_io_apic_init_mappings NULL
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#define native_io_apic_read NULL
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#define native_io_apic_write NULL
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#define native_io_apic_modify NULL
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#endif
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#endif /* _ASM_X86_IO_APIC_H */
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@ -188,11 +188,18 @@ struct x86_msi_ops {
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void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
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};
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struct x86_io_apic_ops {
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void (*init) (void);
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unsigned int (*read) (unsigned int apic, unsigned int reg);
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void (*write) (unsigned int apic, unsigned int reg, unsigned int value);
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void (*modify)(unsigned int apic, unsigned int reg, unsigned int value);
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};
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extern struct x86_init_ops x86_init;
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extern struct x86_cpuinit_ops x86_cpuinit;
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extern struct x86_platform_ops x86_platform;
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extern struct x86_msi_ops x86_msi;
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extern struct x86_io_apic_ops x86_io_apic_ops;
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extern void x86_init_noop(void);
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extern void x86_init_uint_noop(unsigned int unused);
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@ -68,24 +68,6 @@
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#define for_each_irq_pin(entry, head) \
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for (entry = head; entry; entry = entry->next)
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static void __init __ioapic_init_mappings(void);
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static unsigned int __io_apic_read (unsigned int apic, unsigned int reg);
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static void __io_apic_write (unsigned int apic, unsigned int reg, unsigned int val);
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static void __io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);
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static struct io_apic_ops io_apic_ops = {
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.init = __ioapic_init_mappings,
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.read = __io_apic_read,
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.write = __io_apic_write,
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.modify = __io_apic_modify,
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};
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void __init set_io_apic_ops(const struct io_apic_ops *ops)
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{
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io_apic_ops = *ops;
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}
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/*
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* Is the SiS APIC rmw bug present ?
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* -1 = don't know, 0 = no, 1 = yes
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@ -313,21 +295,6 @@ static void free_irq_at(unsigned int at, struct irq_cfg *cfg)
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irq_free_desc(at);
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}
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static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
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{
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return io_apic_ops.read(apic, reg);
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}
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static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
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{
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io_apic_ops.write(apic, reg, value);
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}
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static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
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{
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io_apic_ops.modify(apic, reg, value);
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}
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struct io_apic {
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unsigned int index;
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@ -349,14 +316,14 @@ static inline void io_apic_eoi(unsigned int apic, unsigned int vector)
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writel(vector, &io_apic->eoi);
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}
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static unsigned int __io_apic_read(unsigned int apic, unsigned int reg)
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unsigned int native_io_apic_read(unsigned int apic, unsigned int reg)
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{
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struct io_apic __iomem *io_apic = io_apic_base(apic);
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writel(reg, &io_apic->index);
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return readl(&io_apic->data);
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}
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static void __io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
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void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
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{
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struct io_apic __iomem *io_apic = io_apic_base(apic);
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@ -370,7 +337,7 @@ static void __io_apic_write(unsigned int apic, unsigned int reg, unsigned int va
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*
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* Older SiS APIC requires we rewrite the index register
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*/
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static void __io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
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void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
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{
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struct io_apic __iomem *io_apic = io_apic_base(apic);
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@ -3931,12 +3898,7 @@ static struct resource * __init ioapic_setup_resources(int nr_ioapics)
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return res;
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}
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void __init ioapic_and_gsi_init(void)
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{
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io_apic_ops.init();
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}
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static void __init __ioapic_init_mappings(void)
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void __init native_io_apic_init_mappings(void)
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{
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unsigned long ioapic_phys, idx = FIX_IO_APIC_BASE_0;
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struct resource *ioapic_res;
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@ -1012,7 +1012,7 @@ void __init setup_arch(char **cmdline_p)
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init_cpu_to_node();
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init_apic_mappings();
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ioapic_and_gsi_init();
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x86_io_apic_ops.init();
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kvm_guest_init();
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@ -18,6 +18,7 @@
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#include <asm/e820.h>
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#include <asm/time.h>
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#include <asm/irq.h>
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#include <asm/io_apic.h>
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#include <asm/pat.h>
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#include <asm/tsc.h>
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#include <asm/iommu.h>
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@ -119,3 +120,10 @@ struct x86_msi_ops x86_msi = {
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.teardown_msi_irqs = default_teardown_msi_irqs,
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.restore_msi_irqs = default_restore_msi_irqs,
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};
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struct x86_io_apic_ops x86_io_apic_ops = {
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.init = native_io_apic_init_mappings,
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.read = native_io_apic_read,
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.write = native_io_apic_write,
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.modify = native_io_apic_modify,
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};
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