Automatic merge of master.kernel.org:/home/rmk/linux-2.6-rmk.git
This commit is contained in:
Linus Torvalds
Коммит
4adb18173a
|
|
@ -85,6 +85,7 @@ choice
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|||
config ARCH_CLPS7500
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||||
bool "Cirrus-CL-PS7500FE"
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||||
select TIMER_ACORN
|
||||
select ISA
|
||||
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||||
config ARCH_CLPS711X
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||||
bool "CLPS711x/EP721x-based"
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||||
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@ -96,6 +97,7 @@ config ARCH_CO285
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|||
|
||||
config ARCH_EBSA110
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bool "EBSA-110"
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||||
select ISA
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||||
help
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||||
This is an evaluation board for the StrongARM processor available
|
||||
from Digital. It has limited hardware on-board, including an onboard
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||||
|
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@ -120,13 +122,16 @@ config ARCH_INTEGRATOR
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|||
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||||
config ARCH_IOP3XX
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bool "IOP3xx-based"
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select PCI
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|
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config ARCH_IXP4XX
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bool "IXP4xx-based"
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||||
select DMABOUNCE
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select PCI
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config ARCH_IXP2000
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bool "IXP2400/2800-based"
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select PCI
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config ARCH_L7200
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bool "LinkUp-L7200"
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@ -155,6 +160,8 @@ config ARCH_RPC
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config ARCH_SA1100
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bool "SA1100-based"
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select ISA
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select DISCONTIGMEM
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config ARCH_S3C2410
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bool "Samsung S3C2410"
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@ -165,6 +172,9 @@ config ARCH_S3C2410
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config ARCH_SHARK
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bool "Shark"
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select ISA
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select ISA_DMA
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select PCI
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config ARCH_LH7A40X
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bool "Sharp LH7A40X"
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|
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@ -252,8 +262,6 @@ config ARM_AMBA
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|
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config ISA
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bool
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depends on FOOTBRIDGE_HOST || ARCH_SHARK || ARCH_CLPS7500 || ARCH_EBSA110 || ARCH_CDB89712 || ARCH_EDB7211 || ARCH_SA1100 || ARCH_MX1ADS
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default y
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help
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||||
Find out whether you have ISA slots on your motherboard. ISA is the
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name of a bus system, i.e. the way the CPU talks to the other stuff
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@ -263,8 +271,6 @@ config ISA
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config ISA_DMA
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bool
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depends on FOOTBRIDGE_HOST || ARCH_SHARK
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default y
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config ISA_DMA_API
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bool
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@ -272,7 +278,6 @@ config ISA_DMA_API
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config PCI
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bool "PCI support" if ARCH_INTEGRATOR_AP
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default y if ARCH_SHARK || FOOTBRIDGE_HOST || ARCH_IOP3XX || ARCH_IXP4XX || ARCH_IXP2000
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help
|
||||
Find out whether you have a PCI motherboard. PCI is the name of a
|
||||
bus system, i.e. the way the CPU talks to the other stuff inside
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@ -300,7 +305,7 @@ menu "Kernel Features"
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config SMP
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bool "Symmetric Multi-Processing (EXPERIMENTAL)"
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depends on EXPERIMENTAL && n
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depends on EXPERIMENTAL #&& n
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help
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||||
This enables support for systems with more than one CPU. If you have
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||||
a system with only one CPU, like most personal computers, say N. If
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@ -340,8 +345,7 @@ config PREEMPT
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config DISCONTIGMEM
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bool
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depends on ARCH_EDB7211 || ARCH_SA1100 || (ARCH_LH7A40X && !LH7A40X_CONTIGMEM)
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default y
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default (ARCH_LH7A40X && !LH7A40X_CONTIGMEM)
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help
|
||||
Say Y to support efficient handling of discontiguous physical memory,
|
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for architectures which are either NUMA (Non-Uniform Memory Access)
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|
|
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|
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@ -17,8 +17,8 @@
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|||
|
||||
#include <asm/glue.h>
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#include <asm/vfpmacros.h>
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#include <asm/hardware.h> @ should be moved into entry-macro.S
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||||
#include <asm/arch/irqs.h> @ should be moved into entry-macro.S
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||||
#include <asm/hardware.h> /* should be moved into entry-macro.S */
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||||
#include <asm/arch/irqs.h> /* should be moved into entry-macro.S */
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||||
#include <asm/arch/entry-macro.S>
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||||
|
||||
#include "entry-header.S"
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||||
|
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@ -505,9 +505,9 @@ ENTRY(__switch_to)
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|||
mra r4, r5, acc0
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||||
stmia ip, {r4, r5}
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#endif
|
||||
#ifdef CONFIG_HAS_TLS_REG
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||||
#if defined(CONFIG_HAS_TLS_REG)
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mcr p15, 0, r3, c13, c0, 3 @ set TLS register
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#else
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#elif !defined(CONFIG_TLS_REG_EMUL)
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mov r4, #0xffff0fff
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str r3, [r4, #-15] @ TLS val at 0xffff0ff0
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#endif
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||||
|
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@ -690,11 +690,7 @@ __kuser_cmpxchg: @ 0xffff0fc0
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|
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__kuser_get_tls: @ 0xffff0fe0
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|
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#ifndef CONFIG_HAS_TLS_REG
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|
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#ifdef CONFIG_SMP /* sanity check */
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#error "CONFIG_SMP without CONFIG_HAS_TLS_REG is wrong"
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#endif
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#if !defined(CONFIG_HAS_TLS_REG) && !defined(CONFIG_TLS_REG_EMUL)
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ldr r0, [pc, #(16 - 8)] @ TLS stored at 0xffff0ff0
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mov pc, lr
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||||
|
|
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|
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@ -19,6 +19,7 @@
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|||
#include <asm/procinfo.h>
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#include <asm/ptrace.h>
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#include <asm/constants.h>
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#include <asm/thread_info.h>
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#include <asm/system.h>
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|
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#define PROCINFO_MMUFLAGS 8
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|
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@ -131,7 +132,7 @@ __switch_data:
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.long processor_id @ r4
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.long __machine_arch_type @ r5
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.long cr_alignment @ r6
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.long init_thread_union+8192 @ sp
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||||
.long init_thread_union + THREAD_START_SP @ sp
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|
||||
/*
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* The following fragment of code is executed with the MMU on, and uses
|
||||
|
|
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|
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@ -256,8 +256,6 @@ static unsigned long *thread_info_head;
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|||
static unsigned int nr_thread_info;
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||||
|
||||
#define EXTRA_TASK_STRUCT 4
|
||||
#define ll_alloc_task_struct() ((struct thread_info *) __get_free_pages(GFP_KERNEL,1))
|
||||
#define ll_free_task_struct(p) free_pages((unsigned long)(p),1)
|
||||
|
||||
struct thread_info *alloc_thread_info(struct task_struct *task)
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||||
{
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||||
|
|
@ -274,17 +272,16 @@ struct thread_info *alloc_thread_info(struct task_struct *task)
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}
|
||||
|
||||
if (!thread)
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||||
thread = ll_alloc_task_struct();
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||||
thread = (struct thread_info *)
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__get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
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||||
|
||||
#ifdef CONFIG_MAGIC_SYSRQ
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||||
#ifdef CONFIG_DEBUG_STACK_USAGE
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||||
/*
|
||||
* The stack must be cleared if you want SYSRQ-T to
|
||||
* give sensible stack usage information
|
||||
*/
|
||||
if (thread) {
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||||
char *p = (char *)thread;
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||||
memzero(p+KERNEL_STACK_SIZE, KERNEL_STACK_SIZE);
|
||||
}
|
||||
if (thread)
|
||||
memzero(thread, THREAD_SIZE);
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#endif
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||||
return thread;
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||||
}
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|
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@ -297,7 +294,7 @@ void free_thread_info(struct thread_info *thread)
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|||
thread_info_head = p;
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||||
nr_thread_info += 1;
|
||||
} else
|
||||
ll_free_task_struct(thread);
|
||||
free_pages((unsigned long)thread, THREAD_SIZE_ORDER);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -350,7 +347,7 @@ copy_thread(int nr, unsigned long clone_flags, unsigned long stack_start,
|
|||
struct thread_info *thread = p->thread_info;
|
||||
struct pt_regs *childregs;
|
||||
|
||||
childregs = ((struct pt_regs *)((unsigned long)thread + THREAD_SIZE - 8)) - 1;
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||||
childregs = ((struct pt_regs *)((unsigned long)thread + THREAD_START_SP)) - 1;
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||||
*childregs = *regs;
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||||
childregs->ARM_r0 = 0;
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||||
childregs->ARM_sp = stack_start;
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||||
|
|
@ -447,15 +444,17 @@ EXPORT_SYMBOL(kernel_thread);
|
|||
unsigned long get_wchan(struct task_struct *p)
|
||||
{
|
||||
unsigned long fp, lr;
|
||||
unsigned long stack_page;
|
||||
unsigned long stack_start, stack_end;
|
||||
int count = 0;
|
||||
if (!p || p == current || p->state == TASK_RUNNING)
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||||
return 0;
|
||||
|
||||
stack_page = 4096 + (unsigned long)p->thread_info;
|
||||
stack_start = (unsigned long)(p->thread_info + 1);
|
||||
stack_end = ((unsigned long)p->thread_info) + THREAD_SIZE;
|
||||
|
||||
fp = thread_saved_fp(p);
|
||||
do {
|
||||
if (fp < stack_page || fp > 4092+stack_page)
|
||||
if (fp < stack_start || fp > stack_end)
|
||||
return 0;
|
||||
lr = pc_pointer (((unsigned long *)fp)[-1]);
|
||||
if (!in_sched_functions(lr))
|
||||
|
|
|
|||
|
|
@ -302,7 +302,7 @@ long execve(const char *filename, char **argv, char **envp)
|
|||
"b ret_to_user"
|
||||
:
|
||||
: "r" (current_thread_info()),
|
||||
"Ir" (THREAD_SIZE - 8 - sizeof(regs)),
|
||||
"Ir" (THREAD_START_SP - sizeof(regs)),
|
||||
"r" (®s),
|
||||
"Ir" (sizeof(regs))
|
||||
: "r0", "r1", "r2", "r3", "ip", "memory");
|
||||
|
|
|
|||
|
|
@ -218,7 +218,8 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err)
|
|||
tsk->comm, tsk->pid, tsk->thread_info + 1);
|
||||
|
||||
if (!user_mode(regs) || in_interrupt()) {
|
||||
dump_mem("Stack: ", regs->ARM_sp, 8192+(unsigned long)tsk->thread_info);
|
||||
dump_mem("Stack: ", regs->ARM_sp,
|
||||
THREAD_SIZE + (unsigned long)tsk->thread_info);
|
||||
dump_backtrace(regs, tsk);
|
||||
dump_instr(regs);
|
||||
}
|
||||
|
|
@ -450,9 +451,9 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
|
|||
|
||||
case NR(set_tls):
|
||||
thread->tp_value = regs->ARM_r0;
|
||||
#ifdef CONFIG_HAS_TLS_REG
|
||||
#if defined(CONFIG_HAS_TLS_REG)
|
||||
asm ("mcr p15, 0, %0, c13, c0, 3" : : "r" (regs->ARM_r0) );
|
||||
#else
|
||||
#elif !defined(CONFIG_TLS_REG_EMUL)
|
||||
/*
|
||||
* User space must never try to access this directly.
|
||||
* Expect your app to break eventually if you do so.
|
||||
|
|
@ -497,11 +498,14 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_CPU_32v6) && !defined(CONFIG_HAS_TLS_REG)
|
||||
#ifdef CONFIG_TLS_REG_EMUL
|
||||
|
||||
/*
|
||||
* We might be running on an ARMv6+ processor which should have the TLS
|
||||
* register, but for some reason we can't use it and have to emulate it.
|
||||
* register but for some reason we can't use it, or maybe an SMP system
|
||||
* using a pre-ARMv6 processor (there are apparently a few prototypes like
|
||||
* that in existence) and therefore access to that register must be
|
||||
* emulated.
|
||||
*/
|
||||
|
||||
static int get_tp_trap(struct pt_regs *regs, unsigned int instr)
|
||||
|
|
|
|||
|
|
@ -5,6 +5,7 @@
|
|||
|
||||
#include <asm-generic/vmlinux.lds.h>
|
||||
#include <linux/config.h>
|
||||
#include <asm/thread_info.h>
|
||||
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(stext)
|
||||
|
|
@ -103,7 +104,7 @@ SECTIONS
|
|||
__data_loc = ALIGN(4); /* location in binary */
|
||||
. = DATAADDR;
|
||||
#else
|
||||
. = ALIGN(8192);
|
||||
. = ALIGN(THREAD_SIZE);
|
||||
__data_loc = .;
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@ config ARCH_AUTCPU12
|
|||
|
||||
config ARCH_CDB89712
|
||||
bool "CDB89712"
|
||||
select ISA
|
||||
help
|
||||
This is an evaluation board from Cirrus for the CS89712 processor.
|
||||
The board includes 2 serial ports, Ethernet, IRDA, and expansion
|
||||
|
|
@ -26,6 +27,8 @@ config ARCH_CLEP7312
|
|||
|
||||
config ARCH_EDB7211
|
||||
bool "EDB7211"
|
||||
select ISA
|
||||
select DISCONTIGMEM
|
||||
help
|
||||
Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211
|
||||
evaluation board.
|
||||
|
|
|
|||
|
|
@ -5,6 +5,9 @@ menu "Footbridge Implementations"
|
|||
config ARCH_CATS
|
||||
bool "CATS"
|
||||
select FOOTBRIDGE_HOST
|
||||
select ISA
|
||||
select ISA_DMA
|
||||
select PCI
|
||||
help
|
||||
Say Y here if you intend to run this kernel on the CATS.
|
||||
|
||||
|
|
@ -13,6 +16,9 @@ config ARCH_CATS
|
|||
config ARCH_PERSONAL_SERVER
|
||||
bool "Compaq Personal Server"
|
||||
select FOOTBRIDGE_HOST
|
||||
select ISA
|
||||
select ISA_DMA
|
||||
select PCI
|
||||
---help---
|
||||
Say Y here if you intend to run this kernel on the Compaq
|
||||
Personal Server.
|
||||
|
|
@ -42,6 +48,9 @@ config ARCH_EBSA285_HOST
|
|||
bool "EBSA285 (host mode)"
|
||||
select ARCH_EBSA285
|
||||
select FOOTBRIDGE_HOST
|
||||
select ISA
|
||||
select ISA_DMA
|
||||
select PCI
|
||||
help
|
||||
Say Y here if you intend to run this kernel on the EBSA285 card
|
||||
in host ("central function") mode.
|
||||
|
|
@ -51,6 +60,9 @@ config ARCH_EBSA285_HOST
|
|||
config ARCH_NETWINDER
|
||||
bool "NetWinder"
|
||||
select FOOTBRIDGE_HOST
|
||||
select ISA
|
||||
select ISA_DMA
|
||||
select PCI
|
||||
help
|
||||
Say Y here if you intend to run this kernel on the Rebel.COM
|
||||
NetWinder. Information about this machine can be found at:
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@ menu "IMX Implementations"
|
|||
config ARCH_MX1ADS
|
||||
bool "mx1ads"
|
||||
depends on ARCH_IMX
|
||||
select ISA
|
||||
help
|
||||
Say Y here if you are using the Motorola MX1ADS board
|
||||
|
||||
|
|
|
|||
|
|
@ -410,17 +410,23 @@ config CPU_BPREDICT_DISABLE
|
|||
help
|
||||
Say Y here to disable branch prediction. If unsure, say N.
|
||||
|
||||
config TLS_REG_EMUL
|
||||
bool
|
||||
default y if (SMP || CPU_32v6) && (CPU_32v5 || CPU_32v4 || CPU_32v3)
|
||||
help
|
||||
We might be running on an ARMv6+ processor which should have the TLS
|
||||
register but for some reason we can't use it, or maybe an SMP system
|
||||
using a pre-ARMv6 processor (there are apparently a few prototypes
|
||||
like that in existence) and therefore access to that register must
|
||||
be emulated.
|
||||
|
||||
config HAS_TLS_REG
|
||||
bool
|
||||
depends on CPU_32v6 && !CPU_32v5 && !CPU_32v4 && !CPU_32v3
|
||||
default y
|
||||
depends on CPU_32v6
|
||||
default y if !TLS_REG_EMUL
|
||||
help
|
||||
This selects support for the CP15 thread register.
|
||||
It is defined to be available on ARMv6 or later. However
|
||||
if the kernel is configured to support multiple CPUs including
|
||||
a pre-ARMv6 processors, or if a given ARMv6 processor doesn't
|
||||
implement the thread register for some reason, then access to
|
||||
this register from user space must be trapped and emulated.
|
||||
If user space is relying on the __kuser_get_tls code then
|
||||
there should not be any impact.
|
||||
It is defined to be available on ARMv6 or later. If a particular
|
||||
ARMv6 or later CPU doesn't support it then it must omc;ide "select
|
||||
TLS_REG_EMUL" along with its other caracteristics.
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,35 @@
|
|||
/*
|
||||
* This structure describes the machine which we are running on.
|
||||
*/
|
||||
struct imxfb_mach_info {
|
||||
u_long pixclock;
|
||||
|
||||
u_short xres;
|
||||
u_short yres;
|
||||
|
||||
u_char bpp;
|
||||
u_char hsync_len;
|
||||
u_char left_margin;
|
||||
u_char right_margin;
|
||||
|
||||
u_char vsync_len;
|
||||
u_char upper_margin;
|
||||
u_char lower_margin;
|
||||
u_char sync;
|
||||
|
||||
u_int cmap_greyscale:1,
|
||||
cmap_inverse:1,
|
||||
cmap_static:1,
|
||||
unused:29;
|
||||
|
||||
u_int pcr;
|
||||
u_int pwmr;
|
||||
u_int lscr1;
|
||||
|
||||
u_char * fixed_screen_cpu;
|
||||
dma_addr_t fixed_screen_dma;
|
||||
|
||||
void (*lcd_power)(int);
|
||||
void (*backlight_power)(int);
|
||||
};
|
||||
void set_imx_fb_info(struct imxfb_mach_info *hard_imx_fb_info);
|
||||
|
|
@ -23,8 +23,6 @@
|
|||
#include <asm/procinfo.h>
|
||||
#include <asm/types.h>
|
||||
|
||||
#define KERNEL_STACK_SIZE PAGE_SIZE
|
||||
|
||||
union debug_insn {
|
||||
u32 arm;
|
||||
u16 thumb;
|
||||
|
|
@ -87,8 +85,9 @@ unsigned long get_wchan(struct task_struct *p);
|
|||
*/
|
||||
extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
|
||||
|
||||
#define KSTK_EIP(tsk) (((unsigned long *)(4096+(unsigned long)(tsk)->thread_info))[1019])
|
||||
#define KSTK_ESP(tsk) (((unsigned long *)(4096+(unsigned long)(tsk)->thread_info))[1017])
|
||||
#define KSTK_REGS(tsk) (((struct pt_regs *)(THREAD_START_SP + (unsigned long)(tsk)->thread_info)) - 1)
|
||||
#define KSTK_EIP(tsk) KSTK_REGS(tsk)->ARM_pc
|
||||
#define KSTK_ESP(tsk) KSTK_REGS(tsk)->ARM_sp
|
||||
|
||||
/*
|
||||
* Prefetching support - only ARMv5.
|
||||
|
|
|
|||
|
|
@ -14,6 +14,10 @@
|
|||
|
||||
#include <asm/fpstate.h>
|
||||
|
||||
#define THREAD_SIZE_ORDER 1
|
||||
#define THREAD_SIZE 8192
|
||||
#define THREAD_START_SP (THREAD_SIZE - 8)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
struct task_struct;
|
||||
|
|
@ -77,8 +81,6 @@ struct thread_info {
|
|||
#define init_thread_info (init_thread_union.thread_info)
|
||||
#define init_stack (init_thread_union.stack)
|
||||
|
||||
#define THREAD_SIZE 8192
|
||||
|
||||
/*
|
||||
* how to get the thread information struct from C
|
||||
*/
|
||||
|
|
|
|||
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