drm/msm/dp: reduce link rate if failed at link training 1
Reduce link rate and re start link training if link training 1 failed due to loss of clock recovery done to fix Link Layer CTS case 4.3.1.7. Also only update voltage and pre-emphasis swing level after link training started to fix Link Layer CTS case 4.3.1.6. Changes in V2: -- replaced cr_status with link_status[DP_LINK_STATUS_SIZE] -- replaced dp_ctrl_any_lane_cr_done() with dp_ctrl_colco_recovery_any_ok() -- replaced dp_ctrl_any_ane_cr_lose() with !drm_dp_clock_recovery_ok() Changes in V3: -- return failed if lane_count <= 1 Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1628196295-7382-3-git-send-email-khsieh@codeaurora.org [remove unused cr_status variable] Signed-off-by: Rob Clark <robdclark@chromium.org>
This commit is contained in:
Kuogee Hsieh
Rob Clark
Родитель
52352fe2f8
Коммит
4b85d405cf
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@ -81,13 +81,6 @@ struct dp_ctrl_private {
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struct completion video_comp;
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};
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struct dp_cr_status {
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u8 lane_0_1;
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u8 lane_2_3;
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};
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#define DP_LANE0_1_CR_DONE 0x11
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static int dp_aux_link_configure(struct drm_dp_aux *aux,
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struct dp_link_info *link)
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{
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@ -1080,7 +1073,7 @@ static int dp_ctrl_read_link_status(struct dp_ctrl_private *ctrl,
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}
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static int dp_ctrl_link_train_1(struct dp_ctrl_private *ctrl,
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struct dp_cr_status *cr, int *training_step)
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int *training_step)
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{
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int tries, old_v_level, ret = 0;
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u8 link_status[DP_LINK_STATUS_SIZE];
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@ -1109,9 +1102,6 @@ static int dp_ctrl_link_train_1(struct dp_ctrl_private *ctrl,
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if (ret)
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return ret;
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cr->lane_0_1 = link_status[0];
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cr->lane_2_3 = link_status[1];
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if (drm_dp_clock_recovery_ok(link_status,
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ctrl->link->link_params.num_lanes)) {
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return 0;
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@ -1188,7 +1178,7 @@ static void dp_ctrl_clear_training_pattern(struct dp_ctrl_private *ctrl)
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}
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static int dp_ctrl_link_train_2(struct dp_ctrl_private *ctrl,
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struct dp_cr_status *cr, int *training_step)
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int *training_step)
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{
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int tries = 0, ret = 0;
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char pattern;
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@ -1204,10 +1194,6 @@ static int dp_ctrl_link_train_2(struct dp_ctrl_private *ctrl,
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else
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pattern = DP_TRAINING_PATTERN_2;
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ret = dp_ctrl_update_vx_px(ctrl);
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if (ret)
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return ret;
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ret = dp_catalog_ctrl_set_pattern(ctrl->catalog, pattern);
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if (ret)
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return ret;
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@ -1220,8 +1206,6 @@ static int dp_ctrl_link_train_2(struct dp_ctrl_private *ctrl,
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ret = dp_ctrl_read_link_status(ctrl, link_status);
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if (ret)
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return ret;
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cr->lane_0_1 = link_status[0];
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cr->lane_2_3 = link_status[1];
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if (drm_dp_channel_eq_ok(link_status,
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ctrl->link->link_params.num_lanes)) {
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@ -1241,7 +1225,7 @@ static int dp_ctrl_link_train_2(struct dp_ctrl_private *ctrl,
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static int dp_ctrl_reinitialize_mainlink(struct dp_ctrl_private *ctrl);
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static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl,
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struct dp_cr_status *cr, int *training_step)
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int *training_step)
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{
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int ret = 0;
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u8 encoding = DP_SET_ANSI_8B10B;
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@ -1257,7 +1241,7 @@ static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl,
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drm_dp_dpcd_write(ctrl->aux, DP_MAIN_LINK_CHANNEL_CODING_SET,
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&encoding, 1);
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ret = dp_ctrl_link_train_1(ctrl, cr, training_step);
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ret = dp_ctrl_link_train_1(ctrl, training_step);
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if (ret) {
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DRM_ERROR("link training #1 failed. ret=%d\n", ret);
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goto end;
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@ -1266,7 +1250,7 @@ static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl,
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/* print success info as this is a result of user initiated action */
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DRM_DEBUG_DP("link training #1 successful\n");
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ret = dp_ctrl_link_train_2(ctrl, cr, training_step);
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ret = dp_ctrl_link_train_2(ctrl, training_step);
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if (ret) {
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DRM_ERROR("link training #2 failed. ret=%d\n", ret);
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goto end;
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@ -1282,7 +1266,7 @@ end:
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}
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static int dp_ctrl_setup_main_link(struct dp_ctrl_private *ctrl,
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struct dp_cr_status *cr, int *training_step)
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int *training_step)
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{
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int ret = 0;
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@ -1297,7 +1281,7 @@ static int dp_ctrl_setup_main_link(struct dp_ctrl_private *ctrl,
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* a link training pattern, we have to first do soft reset.
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*/
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ret = dp_ctrl_link_train(ctrl, cr, training_step);
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ret = dp_ctrl_link_train(ctrl, training_step);
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return ret;
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}
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@ -1495,14 +1479,13 @@ static int dp_ctrl_deinitialize_mainlink(struct dp_ctrl_private *ctrl)
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static int dp_ctrl_link_maintenance(struct dp_ctrl_private *ctrl)
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{
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int ret = 0;
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struct dp_cr_status cr;
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int training_step = DP_TRAINING_NONE;
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dp_ctrl_push_idle(&ctrl->dp_ctrl);
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ctrl->dp_ctrl.pixel_rate = ctrl->panel->dp_mode.drm_mode.clock;
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ret = dp_ctrl_setup_main_link(ctrl, &cr, &training_step);
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ret = dp_ctrl_setup_main_link(ctrl, &training_step);
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if (ret)
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goto end;
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@ -1633,6 +1616,25 @@ void dp_ctrl_handle_sink_request(struct dp_ctrl *dp_ctrl)
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}
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}
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static bool dp_ctrl_clock_recovery_any_ok(
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const u8 link_status[DP_LINK_STATUS_SIZE],
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int lane_count)
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{
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int reduced_cnt;
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if (lane_count <= 1)
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return false;
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/*
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* only interested in the lane number after reduced
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* lane_count = 4, then only interested in 2 lanes
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* lane_count = 2, then only interested in 1 lane
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*/
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reduced_cnt = lane_count >> 1;
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return drm_dp_clock_recovery_ok(link_status, reduced_cnt);
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}
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int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl)
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{
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int rc = 0;
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@ -1640,7 +1642,7 @@ int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl)
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u32 rate = 0;
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int link_train_max_retries = 5;
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u32 const phy_cts_pixel_clk_khz = 148500;
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struct dp_cr_status cr;
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u8 link_status[DP_LINK_STATUS_SIZE];
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unsigned int training_step;
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if (!dp_ctrl)
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@ -1680,19 +1682,21 @@ int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl)
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}
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training_step = DP_TRAINING_NONE;
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rc = dp_ctrl_setup_main_link(ctrl, &cr, &training_step);
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rc = dp_ctrl_setup_main_link(ctrl, &training_step);
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if (rc == 0) {
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/* training completed successfully */
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break;
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} else if (training_step == DP_TRAINING_1) {
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/* link train_1 failed */
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if (!dp_catalog_link_is_connected(ctrl->catalog)) {
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if (!dp_catalog_link_is_connected(ctrl->catalog))
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break;
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}
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dp_ctrl_read_link_status(ctrl, link_status);
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rc = dp_ctrl_link_rate_down_shift(ctrl);
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if (rc < 0) { /* already in RBR = 1.6G */
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if (cr.lane_0_1 & DP_LANE0_1_CR_DONE) {
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if (dp_ctrl_clock_recovery_any_ok(link_status,
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ctrl->link->link_params.num_lanes)) {
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/*
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* some lanes are ready,
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* reduce lane number
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@ -1708,12 +1712,18 @@ int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl)
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}
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}
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} else if (training_step == DP_TRAINING_2) {
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/* link train_2 failed, lower lane rate */
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if (!dp_catalog_link_is_connected(ctrl->catalog)) {
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/* link train_2 failed */
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if (!dp_catalog_link_is_connected(ctrl->catalog))
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break;
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}
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rc = dp_ctrl_link_lane_down_shift(ctrl);
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dp_ctrl_read_link_status(ctrl, link_status);
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if (!drm_dp_clock_recovery_ok(link_status,
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ctrl->link->link_params.num_lanes))
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rc = dp_ctrl_link_rate_down_shift(ctrl);
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else
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rc = dp_ctrl_link_lane_down_shift(ctrl);
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if (rc < 0) {
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/* end with failure */
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break; /* lane == 1 already */
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