MIPS: uasm: Add divu uasm instruction
It will be used later on by bpf-jit [ralf@linux-mips.org: Resolved conflict.] Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/6727/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -105,6 +105,7 @@ Ip_u2u1s3(_daddiu);
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Ip_u3u1u2(_daddu);
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Ip_u2u1msbu3(_dins);
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Ip_u2u1msbu3(_dinsm);
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Ip_u1u2(_divu);
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Ip_u1u2u3(_dmfc0);
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Ip_u1u2u3(_dmtc0);
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Ip_u2u1u3(_drotr);
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@ -311,6 +311,7 @@ enum mm_32axf_minor_op {
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mm_syscall_op = 0x22d,
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mm_wait_op = 0x24d,
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mm_eret_op = 0x3cd,
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mm_divu_op = 0x5dc,
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};
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/*
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@ -63,6 +63,7 @@ static struct insn insn_table_MM[] = {
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{ insn_cache, M(mm_pool32b_op, 0, 0, mm_cache_func, 0, 0), RT | RS | SIMM },
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{ insn_daddu, 0, 0 },
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{ insn_daddiu, 0, 0 },
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{ insn_divu, M(mm_pool32a_op, 0, 0, 0, mm_divu_op, mm_pool32axf_op), RT | RS },
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{ insn_dmfc0, 0, 0 },
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{ insn_dmtc0, 0, 0 },
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{ insn_dsll, 0, 0 },
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@ -67,6 +67,7 @@ static struct insn insn_table[] = {
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{ insn_daddu, M(spec_op, 0, 0, 0, 0, daddu_op), RS | RT | RD },
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{ insn_dinsm, M(spec3_op, 0, 0, 0, 0, dinsm_op), RS | RT | RD | RE },
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{ insn_dins, M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE },
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{ insn_divu, M(spec_op, 0, 0, 0, 0, divu_op), RS | RT },
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{ insn_dmfc0, M(cop0_op, dmfc_op, 0, 0, 0, 0), RT | RD | SET},
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{ insn_dmtc0, M(cop0_op, dmtc_op, 0, 0, 0, 0), RT | RD | SET},
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{ insn_drotr32, M(spec_op, 1, 0, 0, 0, dsrl32_op), RT | RD | RE },
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@ -47,7 +47,7 @@ enum opcode {
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insn_addiu, insn_addu, insn_and, insn_andi, insn_bbit0, insn_bbit1,
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insn_beq, insn_beql, insn_bgez, insn_bgezl, insn_bltz, insn_bltzl,
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insn_bne, insn_cache, insn_daddiu, insn_daddu, insn_dins, insn_dinsm,
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insn_dmfc0, insn_dmtc0, insn_drotr, insn_drotr32, insn_dsll,
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insn_divu, insn_dmfc0, insn_dmtc0, insn_drotr, insn_drotr32, insn_dsll,
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insn_dsll32, insn_dsra, insn_dsrl, insn_dsrl32, insn_dsubu, insn_eret,
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insn_ext, insn_ins, insn_j, insn_jal, insn_jalr, insn_jr, insn_ld,
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insn_ldx, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx, insn_mfc0,
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@ -251,6 +251,7 @@ I_u1u2u3(_dmfc0)
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I_u1u2u3(_dmtc0)
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I_u2u1s3(_daddiu)
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I_u3u1u2(_daddu)
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I_u1u2(_divu)
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I_u2u1u3(_dsll)
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I_u2u1u3(_dsll32)
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I_u2u1u3(_dsra)
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