firmware: tegra: bpmp: Use iosys-map helpers
The shared memory used for inter-processor communication between the CPU and the BPMP can reside either in system memory or in I/O memory. Use the iosys-map helpers to abstract these differences away. Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding
Родитель
236d3907aa
Коммит
4c1e0a9735
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@ -18,8 +18,8 @@ struct tegra186_bpmp {
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struct {
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struct gen_pool *pool;
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void __iomem *virt;
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dma_addr_t phys;
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void *virt;
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} tx, rx;
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struct {
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@ -40,31 +40,27 @@ mbox_client_to_bpmp(struct mbox_client *client)
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static bool tegra186_bpmp_is_message_ready(struct tegra_bpmp_channel *channel)
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{
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void *frame;
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int err;
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frame = tegra_ivc_read_get_next_frame(channel->ivc);
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if (IS_ERR(frame)) {
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channel->ib = NULL;
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err = tegra_ivc_read_get_next_frame(channel->ivc, &channel->ib);
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if (err) {
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iosys_map_clear(&channel->ib);
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return false;
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}
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channel->ib = frame;
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return true;
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}
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static bool tegra186_bpmp_is_channel_free(struct tegra_bpmp_channel *channel)
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{
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void *frame;
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int err;
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frame = tegra_ivc_write_get_next_frame(channel->ivc);
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if (IS_ERR(frame)) {
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channel->ob = NULL;
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err = tegra_ivc_write_get_next_frame(channel->ivc, &channel->ob);
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if (err) {
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iosys_map_clear(&channel->ob);
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return false;
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}
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channel->ob = frame;
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return true;
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}
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@ -109,6 +105,7 @@ static int tegra186_bpmp_channel_init(struct tegra_bpmp_channel *channel,
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{
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struct tegra186_bpmp *priv = bpmp->priv;
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size_t message_size, queue_size;
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struct iosys_map rx, tx;
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unsigned int offset;
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int err;
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@ -121,10 +118,11 @@ static int tegra186_bpmp_channel_init(struct tegra_bpmp_channel *channel,
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queue_size = tegra_ivc_total_queue_size(message_size);
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offset = queue_size * index;
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err = tegra_ivc_init(channel->ivc, NULL,
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priv->rx.virt + offset, priv->rx.phys + offset,
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priv->tx.virt + offset, priv->tx.phys + offset,
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1, message_size, tegra186_bpmp_ivc_notify,
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iosys_map_set_vaddr_iomem(&rx, priv->rx.virt + offset);
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iosys_map_set_vaddr_iomem(&tx, priv->tx.virt + offset);
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err = tegra_ivc_init(channel->ivc, NULL, &rx, priv->rx.phys + offset, &tx,
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priv->tx.phys + offset, 1, message_size, tegra186_bpmp_ivc_notify,
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bpmp);
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if (err < 0) {
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dev_err(bpmp->dev, "failed to setup IVC for channel %u: %d\n",
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@ -179,7 +177,7 @@ static int tegra186_bpmp_init(struct tegra_bpmp *bpmp)
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return -EPROBE_DEFER;
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}
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priv->tx.virt = gen_pool_dma_alloc(priv->tx.pool, 4096, &priv->tx.phys);
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priv->tx.virt = (void __iomem *)gen_pool_dma_alloc(priv->tx.pool, 4096, &priv->tx.phys);
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if (!priv->tx.virt) {
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dev_err(bpmp->dev, "failed to allocate from TX pool\n");
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return -ENOMEM;
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@ -192,7 +190,7 @@ static int tegra186_bpmp_init(struct tegra_bpmp *bpmp)
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goto free_tx;
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}
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priv->rx.virt = gen_pool_dma_alloc(priv->rx.pool, 4096, &priv->rx.phys);
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priv->rx.virt = (void __iomem *)gen_pool_dma_alloc(priv->rx.pool, 4096, &priv->rx.phys);
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if (!priv->rx.virt) {
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dev_err(bpmp->dev, "failed to allocate from RX pool\n");
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err = -ENOMEM;
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@ -137,8 +137,8 @@ static int tegra210_bpmp_channel_init(struct tegra_bpmp_channel *channel,
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unsigned int index)
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{
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struct tegra210_bpmp *priv = bpmp->priv;
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void __iomem *p;
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u32 address;
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void *p;
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/* Retrieve channel base address from BPMP */
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writel(index << TRIGGER_ID_SHIFT | TRIGGER_CMD_GET,
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@ -149,8 +149,9 @@ static int tegra210_bpmp_channel_init(struct tegra_bpmp_channel *channel,
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if (!p)
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return -ENOMEM;
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channel->ib = p;
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channel->ob = p;
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iosys_map_set_vaddr_iomem(&channel->ib, p);
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iosys_map_set_vaddr_iomem(&channel->ob, p);
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channel->index = index;
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init_completion(&channel->completion);
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channel->bpmp = bpmp;
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@ -201,13 +201,13 @@ static ssize_t __tegra_bpmp_channel_read(struct tegra_bpmp_channel *channel,
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int err;
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if (data && size > 0)
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memcpy_fromio(data, channel->ib->data, size);
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tegra_bpmp_mb_read(data, &channel->ib, size);
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err = tegra_bpmp_ack_response(channel);
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if (err < 0)
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return err;
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*ret = channel->ib->code;
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*ret = tegra_bpmp_mb_read_field(&channel->ib, code);
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return 0;
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}
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@ -241,11 +241,11 @@ static ssize_t __tegra_bpmp_channel_write(struct tegra_bpmp_channel *channel,
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unsigned int mrq, unsigned long flags,
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const void *data, size_t size)
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{
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channel->ob->code = mrq;
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channel->ob->flags = flags;
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tegra_bpmp_mb_write_field(&channel->ob, code, mrq);
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tegra_bpmp_mb_write_field(&channel->ob, flags, flags);
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if (data && size > 0)
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memcpy_toio(channel->ob->data, data, size);
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tegra_bpmp_mb_write(&channel->ob, data, size);
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return tegra_bpmp_post_request(channel);
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}
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@ -400,7 +400,7 @@ static struct tegra_bpmp_mrq *tegra_bpmp_find_mrq(struct tegra_bpmp *bpmp,
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void tegra_bpmp_mrq_return(struct tegra_bpmp_channel *channel, int code,
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const void *data, size_t size)
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{
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unsigned long flags = channel->ib->flags;
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unsigned long flags = tegra_bpmp_mb_read_field(&channel->ib, flags);
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struct tegra_bpmp *bpmp = channel->bpmp;
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int err;
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@ -417,10 +417,10 @@ void tegra_bpmp_mrq_return(struct tegra_bpmp_channel *channel, int code,
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if (WARN_ON(!tegra_bpmp_is_response_channel_free(channel)))
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return;
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channel->ob->code = code;
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tegra_bpmp_mb_write_field(&channel->ob, code, code);
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if (data && size > 0)
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memcpy_toio(channel->ob->data, data, size);
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tegra_bpmp_mb_write(&channel->ob, data, size);
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err = tegra_bpmp_post_response(channel);
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if (WARN_ON(err < 0))
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@ -529,13 +529,13 @@ static void tegra_bpmp_mrq_handle_ping(unsigned int mrq,
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struct tegra_bpmp_channel *channel,
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void *data)
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{
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struct mrq_ping_request *request;
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struct mrq_ping_request request;
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struct mrq_ping_response response;
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request = (struct mrq_ping_request *)channel->ib->data;
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tegra_bpmp_mb_read(&request, &channel->ib, sizeof(request));
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memset(&response, 0, sizeof(response));
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response.reply = request->challenge << 1;
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response.reply = request.challenge << 1;
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tegra_bpmp_mrq_return(channel, 0, &response, sizeof(response));
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}
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@ -648,7 +648,7 @@ static int tegra_bpmp_get_firmware_tag(struct tegra_bpmp *bpmp, char *tag,
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static void tegra_bpmp_channel_signal(struct tegra_bpmp_channel *channel)
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{
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unsigned long flags = channel->ob->flags;
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unsigned long flags = tegra_bpmp_mb_read_field(&channel->ob, flags);
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if ((flags & MSG_RING) == 0)
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return;
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@ -666,8 +666,11 @@ void tegra_bpmp_handle_rx(struct tegra_bpmp *bpmp)
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count = bpmp->soc->channels.thread.count;
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busy = bpmp->threaded.busy;
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if (tegra_bpmp_is_request_ready(channel))
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tegra_bpmp_handle_mrq(bpmp, channel->ib->code, channel);
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if (tegra_bpmp_is_request_ready(channel)) {
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unsigned int mrq = tegra_bpmp_mb_read_field(&channel->ib, code);
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tegra_bpmp_handle_mrq(bpmp, mrq, channel);
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}
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spin_lock(&bpmp->lock);
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@ -68,6 +68,12 @@ struct tegra_ivc_header {
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} rx;
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};
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#define tegra_ivc_header_read_field(hdr, field) \
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iosys_map_rd_field(hdr, 0, struct tegra_ivc_header, field)
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#define tegra_ivc_header_write_field(hdr, field, value) \
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iosys_map_wr_field(hdr, 0, struct tegra_ivc_header, field, value)
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static inline void tegra_ivc_invalidate(struct tegra_ivc *ivc, dma_addr_t phys)
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{
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if (!ivc->peer)
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@ -86,16 +92,15 @@ static inline void tegra_ivc_flush(struct tegra_ivc *ivc, dma_addr_t phys)
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DMA_TO_DEVICE);
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}
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static inline bool tegra_ivc_empty(struct tegra_ivc *ivc,
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struct tegra_ivc_header *header)
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static inline bool tegra_ivc_empty(struct tegra_ivc *ivc, struct iosys_map *map)
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{
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/*
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* This function performs multiple checks on the same values with
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* security implications, so create snapshots with READ_ONCE() to
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* ensure that these checks use the same values.
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*/
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u32 tx = READ_ONCE(header->tx.count);
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u32 rx = READ_ONCE(header->rx.count);
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u32 tx = tegra_ivc_header_read_field(map, tx.count);
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u32 rx = tegra_ivc_header_read_field(map, rx.count);
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/*
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* Perform an over-full check to prevent denial of service attacks
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@ -113,11 +118,10 @@ static inline bool tegra_ivc_empty(struct tegra_ivc *ivc,
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return tx == rx;
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}
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static inline bool tegra_ivc_full(struct tegra_ivc *ivc,
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struct tegra_ivc_header *header)
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static inline bool tegra_ivc_full(struct tegra_ivc *ivc, struct iosys_map *map)
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{
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u32 tx = READ_ONCE(header->tx.count);
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u32 rx = READ_ONCE(header->rx.count);
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u32 tx = tegra_ivc_header_read_field(map, tx.count);
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u32 rx = tegra_ivc_header_read_field(map, rx.count);
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/*
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* Invalid cases where the counters indicate that the queue is over
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@ -126,11 +130,10 @@ static inline bool tegra_ivc_full(struct tegra_ivc *ivc,
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return tx - rx >= ivc->num_frames;
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}
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static inline u32 tegra_ivc_available(struct tegra_ivc *ivc,
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struct tegra_ivc_header *header)
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static inline u32 tegra_ivc_available(struct tegra_ivc *ivc, struct iosys_map *map)
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{
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u32 tx = READ_ONCE(header->tx.count);
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u32 rx = READ_ONCE(header->rx.count);
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u32 tx = tegra_ivc_header_read_field(map, tx.count);
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u32 rx = tegra_ivc_header_read_field(map, rx.count);
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/*
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* This function isn't expected to be used in scenarios where an
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@ -143,8 +146,9 @@ static inline u32 tegra_ivc_available(struct tegra_ivc *ivc,
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static inline void tegra_ivc_advance_tx(struct tegra_ivc *ivc)
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{
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WRITE_ONCE(ivc->tx.channel->tx.count,
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READ_ONCE(ivc->tx.channel->tx.count) + 1);
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unsigned int count = tegra_ivc_header_read_field(&ivc->tx.map, tx.count);
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tegra_ivc_header_write_field(&ivc->tx.map, tx.count, count + 1);
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if (ivc->tx.position == ivc->num_frames - 1)
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ivc->tx.position = 0;
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@ -154,8 +158,9 @@ static inline void tegra_ivc_advance_tx(struct tegra_ivc *ivc)
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static inline void tegra_ivc_advance_rx(struct tegra_ivc *ivc)
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{
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WRITE_ONCE(ivc->rx.channel->rx.count,
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READ_ONCE(ivc->rx.channel->rx.count) + 1);
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unsigned int count = tegra_ivc_header_read_field(&ivc->rx.map, rx.count);
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tegra_ivc_header_write_field(&ivc->rx.map, rx.count, count + 1);
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if (ivc->rx.position == ivc->num_frames - 1)
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ivc->rx.position = 0;
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@ -166,6 +171,7 @@ static inline void tegra_ivc_advance_rx(struct tegra_ivc *ivc)
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static inline int tegra_ivc_check_read(struct tegra_ivc *ivc)
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{
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unsigned int offset = offsetof(struct tegra_ivc_header, tx.count);
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unsigned int state;
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/*
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* tx.channel->state is set locally, so it is not synchronized with
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@ -175,7 +181,8 @@ static inline int tegra_ivc_check_read(struct tegra_ivc *ivc)
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* asynchronous transition of rx.channel->state to
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* TEGRA_IVC_STATE_ACK is not allowed.
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*/
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if (ivc->tx.channel->tx.state != TEGRA_IVC_STATE_ESTABLISHED)
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state = tegra_ivc_header_read_field(&ivc->tx.map, tx.state);
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if (state != TEGRA_IVC_STATE_ESTABLISHED)
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return -ECONNRESET;
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/*
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@ -185,12 +192,12 @@ static inline int tegra_ivc_check_read(struct tegra_ivc *ivc)
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* Synchronization is only necessary when these pointers indicate
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* empty or full.
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*/
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if (!tegra_ivc_empty(ivc, ivc->rx.channel))
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if (!tegra_ivc_empty(ivc, &ivc->rx.map))
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return 0;
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tegra_ivc_invalidate(ivc, ivc->rx.phys + offset);
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if (tegra_ivc_empty(ivc, ivc->rx.channel))
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if (tegra_ivc_empty(ivc, &ivc->rx.map))
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return -ENOSPC;
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return 0;
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@ -199,29 +206,34 @@ static inline int tegra_ivc_check_read(struct tegra_ivc *ivc)
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static inline int tegra_ivc_check_write(struct tegra_ivc *ivc)
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{
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unsigned int offset = offsetof(struct tegra_ivc_header, rx.count);
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unsigned int state;
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if (ivc->tx.channel->tx.state != TEGRA_IVC_STATE_ESTABLISHED)
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state = tegra_ivc_header_read_field(&ivc->tx.map, tx.state);
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if (state != TEGRA_IVC_STATE_ESTABLISHED)
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return -ECONNRESET;
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if (!tegra_ivc_full(ivc, ivc->tx.channel))
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if (!tegra_ivc_full(ivc, &ivc->tx.map))
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return 0;
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tegra_ivc_invalidate(ivc, ivc->tx.phys + offset);
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if (tegra_ivc_full(ivc, ivc->tx.channel))
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if (tegra_ivc_full(ivc, &ivc->tx.map))
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return -ENOSPC;
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return 0;
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}
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static void *tegra_ivc_frame_virt(struct tegra_ivc *ivc,
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struct tegra_ivc_header *header,
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unsigned int frame)
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static int tegra_ivc_frame_virt(struct tegra_ivc *ivc, const struct iosys_map *header,
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unsigned int frame, struct iosys_map *map)
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{
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if (WARN_ON(frame >= ivc->num_frames))
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return ERR_PTR(-EINVAL);
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size_t offset = sizeof(struct tegra_ivc_header) + ivc->frame_size * frame;
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return (void *)(header + 1) + ivc->frame_size * frame;
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if (WARN_ON(frame >= ivc->num_frames))
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return -EINVAL;
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*map = IOSYS_MAP_INIT_OFFSET(header, offset);
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return 0;
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}
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static inline dma_addr_t tegra_ivc_frame_phys(struct tegra_ivc *ivc,
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@ -264,16 +276,16 @@ static inline void tegra_ivc_flush_frame(struct tegra_ivc *ivc,
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}
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/* directly peek at the next frame rx'ed */
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void *tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc)
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int tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc, struct iosys_map *map)
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{
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int err;
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if (WARN_ON(ivc == NULL))
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return ERR_PTR(-EINVAL);
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return -EINVAL;
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err = tegra_ivc_check_read(ivc);
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if (err < 0)
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return ERR_PTR(err);
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return err;
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/*
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* Order observation of ivc->rx.position potentially indicating new
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@ -284,7 +296,7 @@ void *tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc)
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tegra_ivc_invalidate_frame(ivc, ivc->rx.phys, ivc->rx.position, 0,
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||||
ivc->frame_size);
|
||||
|
||||
return tegra_ivc_frame_virt(ivc, ivc->rx.channel, ivc->rx.position);
|
||||
return tegra_ivc_frame_virt(ivc, &ivc->rx.map, ivc->rx.position, map);
|
||||
}
|
||||
EXPORT_SYMBOL(tegra_ivc_read_get_next_frame);
|
||||
|
||||
|
|
@ -320,7 +332,7 @@ int tegra_ivc_read_advance(struct tegra_ivc *ivc)
|
|||
*/
|
||||
tegra_ivc_invalidate(ivc, ivc->rx.phys + tx);
|
||||
|
||||
if (tegra_ivc_available(ivc, ivc->rx.channel) == ivc->num_frames - 1)
|
||||
if (tegra_ivc_available(ivc, &ivc->rx.map) == ivc->num_frames - 1)
|
||||
ivc->notify(ivc, ivc->notify_data);
|
||||
|
||||
return 0;
|
||||
|
|
@ -328,15 +340,15 @@ int tegra_ivc_read_advance(struct tegra_ivc *ivc)
|
|||
EXPORT_SYMBOL(tegra_ivc_read_advance);
|
||||
|
||||
/* directly poke at the next frame to be tx'ed */
|
||||
void *tegra_ivc_write_get_next_frame(struct tegra_ivc *ivc)
|
||||
int tegra_ivc_write_get_next_frame(struct tegra_ivc *ivc, struct iosys_map *map)
|
||||
{
|
||||
int err;
|
||||
|
||||
err = tegra_ivc_check_write(ivc);
|
||||
if (err < 0)
|
||||
return ERR_PTR(err);
|
||||
return err;
|
||||
|
||||
return tegra_ivc_frame_virt(ivc, ivc->tx.channel, ivc->tx.position);
|
||||
return tegra_ivc_frame_virt(ivc, &ivc->tx.map, ivc->tx.position, map);
|
||||
}
|
||||
EXPORT_SYMBOL(tegra_ivc_write_get_next_frame);
|
||||
|
||||
|
|
@ -376,7 +388,7 @@ int tegra_ivc_write_advance(struct tegra_ivc *ivc)
|
|||
*/
|
||||
tegra_ivc_invalidate(ivc, ivc->tx.phys + rx);
|
||||
|
||||
if (tegra_ivc_available(ivc, ivc->tx.channel) == 1)
|
||||
if (tegra_ivc_available(ivc, &ivc->tx.map) == 1)
|
||||
ivc->notify(ivc, ivc->notify_data);
|
||||
|
||||
return 0;
|
||||
|
|
@ -387,7 +399,7 @@ void tegra_ivc_reset(struct tegra_ivc *ivc)
|
|||
{
|
||||
unsigned int offset = offsetof(struct tegra_ivc_header, tx.count);
|
||||
|
||||
ivc->tx.channel->tx.state = TEGRA_IVC_STATE_SYNC;
|
||||
tegra_ivc_header_write_field(&ivc->tx.map, tx.state, TEGRA_IVC_STATE_SYNC);
|
||||
tegra_ivc_flush(ivc, ivc->tx.phys + offset);
|
||||
ivc->notify(ivc, ivc->notify_data);
|
||||
}
|
||||
|
|
@ -416,13 +428,14 @@ EXPORT_SYMBOL(tegra_ivc_reset);
|
|||
int tegra_ivc_notified(struct tegra_ivc *ivc)
|
||||
{
|
||||
unsigned int offset = offsetof(struct tegra_ivc_header, tx.count);
|
||||
enum tegra_ivc_state state;
|
||||
enum tegra_ivc_state rx_state, tx_state;
|
||||
|
||||
/* Copy the receiver's state out of shared memory. */
|
||||
tegra_ivc_invalidate(ivc, ivc->rx.phys + offset);
|
||||
state = READ_ONCE(ivc->rx.channel->tx.state);
|
||||
rx_state = tegra_ivc_header_read_field(&ivc->rx.map, tx.state);
|
||||
tx_state = tegra_ivc_header_read_field(&ivc->tx.map, tx.state);
|
||||
|
||||
if (state == TEGRA_IVC_STATE_SYNC) {
|
||||
if (rx_state == TEGRA_IVC_STATE_SYNC) {
|
||||
offset = offsetof(struct tegra_ivc_header, tx.count);
|
||||
|
||||
/*
|
||||
|
|
@ -436,8 +449,8 @@ int tegra_ivc_notified(struct tegra_ivc *ivc)
|
|||
* state and won't make progress until we change our state,
|
||||
* so the counters are not in use at this time.
|
||||
*/
|
||||
ivc->tx.channel->tx.count = 0;
|
||||
ivc->rx.channel->rx.count = 0;
|
||||
tegra_ivc_header_write_field(&ivc->tx.map, tx.count, 0);
|
||||
tegra_ivc_header_write_field(&ivc->rx.map, rx.count, 0);
|
||||
|
||||
ivc->tx.position = 0;
|
||||
ivc->rx.position = 0;
|
||||
|
|
@ -452,7 +465,7 @@ int tegra_ivc_notified(struct tegra_ivc *ivc)
|
|||
* Move to ACK state. We have just cleared our counters, so it
|
||||
* is now safe for the remote end to start using these values.
|
||||
*/
|
||||
ivc->tx.channel->tx.state = TEGRA_IVC_STATE_ACK;
|
||||
tegra_ivc_header_write_field(&ivc->tx.map, tx.state, TEGRA_IVC_STATE_ACK);
|
||||
tegra_ivc_flush(ivc, ivc->tx.phys + offset);
|
||||
|
||||
/*
|
||||
|
|
@ -460,8 +473,8 @@ int tegra_ivc_notified(struct tegra_ivc *ivc)
|
|||
*/
|
||||
ivc->notify(ivc, ivc->notify_data);
|
||||
|
||||
} else if (ivc->tx.channel->tx.state == TEGRA_IVC_STATE_SYNC &&
|
||||
state == TEGRA_IVC_STATE_ACK) {
|
||||
} else if (tx_state == TEGRA_IVC_STATE_SYNC &&
|
||||
rx_state == TEGRA_IVC_STATE_ACK) {
|
||||
offset = offsetof(struct tegra_ivc_header, tx.count);
|
||||
|
||||
/*
|
||||
|
|
@ -475,8 +488,8 @@ int tegra_ivc_notified(struct tegra_ivc *ivc)
|
|||
* state and won't make progress until we change our state,
|
||||
* so the counters are not in use at this time.
|
||||
*/
|
||||
ivc->tx.channel->tx.count = 0;
|
||||
ivc->rx.channel->rx.count = 0;
|
||||
tegra_ivc_header_write_field(&ivc->tx.map, tx.count, 0);
|
||||
tegra_ivc_header_write_field(&ivc->rx.map, rx.count, 0);
|
||||
|
||||
ivc->tx.position = 0;
|
||||
ivc->rx.position = 0;
|
||||
|
|
@ -492,7 +505,7 @@ int tegra_ivc_notified(struct tegra_ivc *ivc)
|
|||
* already cleared its counters, so it is safe to start
|
||||
* writing/reading on this channel.
|
||||
*/
|
||||
ivc->tx.channel->tx.state = TEGRA_IVC_STATE_ESTABLISHED;
|
||||
tegra_ivc_header_write_field(&ivc->tx.map, tx.state, TEGRA_IVC_STATE_ESTABLISHED);
|
||||
tegra_ivc_flush(ivc, ivc->tx.phys + offset);
|
||||
|
||||
/*
|
||||
|
|
@ -500,7 +513,7 @@ int tegra_ivc_notified(struct tegra_ivc *ivc)
|
|||
*/
|
||||
ivc->notify(ivc, ivc->notify_data);
|
||||
|
||||
} else if (ivc->tx.channel->tx.state == TEGRA_IVC_STATE_ACK) {
|
||||
} else if (tx_state == TEGRA_IVC_STATE_ACK) {
|
||||
offset = offsetof(struct tegra_ivc_header, tx.count);
|
||||
|
||||
/*
|
||||
|
|
@ -516,7 +529,7 @@ int tegra_ivc_notified(struct tegra_ivc *ivc)
|
|||
* cleared its counters, so it is safe to start writing/reading
|
||||
* on this channel.
|
||||
*/
|
||||
ivc->tx.channel->tx.state = TEGRA_IVC_STATE_ESTABLISHED;
|
||||
tegra_ivc_header_write_field(&ivc->tx.map, tx.state, TEGRA_IVC_STATE_ESTABLISHED);
|
||||
tegra_ivc_flush(ivc, ivc->tx.phys + offset);
|
||||
|
||||
/*
|
||||
|
|
@ -533,7 +546,7 @@ int tegra_ivc_notified(struct tegra_ivc *ivc)
|
|||
*/
|
||||
}
|
||||
|
||||
if (ivc->tx.channel->tx.state != TEGRA_IVC_STATE_ESTABLISHED)
|
||||
if (tx_state != TEGRA_IVC_STATE_ESTABLISHED)
|
||||
return -EAGAIN;
|
||||
|
||||
return 0;
|
||||
|
|
@ -609,8 +622,29 @@ static int tegra_ivc_check_params(unsigned long rx, unsigned long tx,
|
|||
return 0;
|
||||
}
|
||||
|
||||
int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, void *rx,
|
||||
dma_addr_t rx_phys, void *tx, dma_addr_t tx_phys,
|
||||
static inline void iosys_map_copy(struct iosys_map *dst, const struct iosys_map *src)
|
||||
{
|
||||
*dst = *src;
|
||||
}
|
||||
|
||||
static inline unsigned long iosys_map_get_address(const struct iosys_map *map)
|
||||
{
|
||||
if (map->is_iomem)
|
||||
return (unsigned long)map->vaddr_iomem;
|
||||
|
||||
return (unsigned long)map->vaddr;
|
||||
}
|
||||
|
||||
static inline void *iosys_map_get_vaddr(const struct iosys_map *map)
|
||||
{
|
||||
if (WARN_ON(map->is_iomem))
|
||||
return NULL;
|
||||
|
||||
return map->vaddr;
|
||||
}
|
||||
|
||||
int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, const struct iosys_map *rx,
|
||||
dma_addr_t rx_phys, const struct iosys_map *tx, dma_addr_t tx_phys,
|
||||
unsigned int num_frames, size_t frame_size,
|
||||
void (*notify)(struct tegra_ivc *ivc, void *data),
|
||||
void *data)
|
||||
|
|
@ -628,7 +662,7 @@ int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, void *rx,
|
|||
if (frame_size > INT_MAX)
|
||||
return -E2BIG;
|
||||
|
||||
err = tegra_ivc_check_params((unsigned long)rx, (unsigned long)tx,
|
||||
err = tegra_ivc_check_params(iosys_map_get_address(rx), iosys_map_get_address(tx),
|
||||
num_frames, frame_size);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
|
@ -636,12 +670,12 @@ int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, void *rx,
|
|||
queue_size = tegra_ivc_total_queue_size(num_frames * frame_size);
|
||||
|
||||
if (peer) {
|
||||
ivc->rx.phys = dma_map_single(peer, rx, queue_size,
|
||||
ivc->rx.phys = dma_map_single(peer, iosys_map_get_vaddr(rx), queue_size,
|
||||
DMA_BIDIRECTIONAL);
|
||||
if (dma_mapping_error(peer, ivc->rx.phys))
|
||||
return -ENOMEM;
|
||||
|
||||
ivc->tx.phys = dma_map_single(peer, tx, queue_size,
|
||||
ivc->tx.phys = dma_map_single(peer, iosys_map_get_vaddr(tx), queue_size,
|
||||
DMA_BIDIRECTIONAL);
|
||||
if (dma_mapping_error(peer, ivc->tx.phys)) {
|
||||
dma_unmap_single(peer, ivc->rx.phys, queue_size,
|
||||
|
|
@ -653,8 +687,8 @@ int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, void *rx,
|
|||
ivc->tx.phys = tx_phys;
|
||||
}
|
||||
|
||||
ivc->rx.channel = rx;
|
||||
ivc->tx.channel = tx;
|
||||
iosys_map_copy(&ivc->rx.map, rx);
|
||||
iosys_map_copy(&ivc->tx.map, tx);
|
||||
ivc->peer = peer;
|
||||
ivc->notify = notify;
|
||||
ivc->notify_data = data;
|
||||
|
|
|
|||
|
|
@ -106,21 +106,22 @@ static void tz_device_update_work_fn(struct work_struct *work)
|
|||
static void bpmp_mrq_thermal(unsigned int mrq, struct tegra_bpmp_channel *ch,
|
||||
void *data)
|
||||
{
|
||||
struct mrq_thermal_bpmp_to_host_request *req;
|
||||
struct mrq_thermal_bpmp_to_host_request req;
|
||||
struct tegra_bpmp_thermal *tegra = data;
|
||||
size_t offset;
|
||||
int i;
|
||||
|
||||
req = (struct mrq_thermal_bpmp_to_host_request *)ch->ib->data;
|
||||
offset = offsetof(struct tegra_bpmp_mb_data, data);
|
||||
iosys_map_memcpy_from(&req, &ch->ib, offset, sizeof(req));
|
||||
|
||||
if (req->type != CMD_THERMAL_HOST_TRIP_REACHED) {
|
||||
dev_err(tegra->dev, "%s: invalid request type: %d\n",
|
||||
__func__, req->type);
|
||||
if (req.type != CMD_THERMAL_HOST_TRIP_REACHED) {
|
||||
dev_err(tegra->dev, "%s: invalid request type: %d\n", __func__, req.type);
|
||||
tegra_bpmp_mrq_return(ch, -EINVAL, NULL, 0);
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < tegra->num_zones; ++i) {
|
||||
if (tegra->zones[i]->idx != req->host_trip_reached.zone)
|
||||
if (tegra->zones[i]->idx != req.host_trip_reached.zone)
|
||||
continue;
|
||||
|
||||
schedule_work(&tegra->zones[i]->tz_device_update_work);
|
||||
|
|
@ -129,7 +130,7 @@ static void bpmp_mrq_thermal(unsigned int mrq, struct tegra_bpmp_channel *ch,
|
|||
}
|
||||
|
||||
dev_err(tegra->dev, "%s: invalid thermal zone: %d\n", __func__,
|
||||
req->host_trip_reached.zone);
|
||||
req.host_trip_reached.zone);
|
||||
tegra_bpmp_mrq_return(ch, -EINVAL, NULL, 0);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -6,6 +6,7 @@
|
|||
#ifndef __SOC_TEGRA_BPMP_H
|
||||
#define __SOC_TEGRA_BPMP_H
|
||||
|
||||
#include <linux/iosys-map.h>
|
||||
#include <linux/mailbox_client.h>
|
||||
#include <linux/pm_domain.h>
|
||||
#include <linux/reset-controller.h>
|
||||
|
|
@ -36,10 +37,22 @@ struct tegra_bpmp_mb_data {
|
|||
u8 data[MSG_DATA_MIN_SZ];
|
||||
} __packed;
|
||||
|
||||
#define tegra_bpmp_mb_read(dst, mb, size) \
|
||||
iosys_map_memcpy_from(dst, mb, offsetof(struct tegra_bpmp_mb_data, data), size)
|
||||
|
||||
#define tegra_bpmp_mb_write(mb, src, size) \
|
||||
iosys_map_memcpy_to(mb, offsetof(struct tegra_bpmp_mb_data, data), src, size)
|
||||
|
||||
#define tegra_bpmp_mb_read_field(mb, field) \
|
||||
iosys_map_rd_field(mb, 0, struct tegra_bpmp_mb_data, field)
|
||||
|
||||
#define tegra_bpmp_mb_write_field(mb, field, value) \
|
||||
iosys_map_wr_field(mb, 0, struct tegra_bpmp_mb_data, field, value)
|
||||
|
||||
struct tegra_bpmp_channel {
|
||||
struct tegra_bpmp *bpmp;
|
||||
struct tegra_bpmp_mb_data *ib;
|
||||
struct tegra_bpmp_mb_data *ob;
|
||||
struct iosys_map ib;
|
||||
struct iosys_map ob;
|
||||
struct completion completion;
|
||||
struct tegra_ivc *ivc;
|
||||
unsigned int index;
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@
|
|||
|
||||
#include <linux/device.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/iosys-map.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
struct tegra_ivc_header;
|
||||
|
|
@ -15,7 +16,7 @@ struct tegra_ivc {
|
|||
struct device *peer;
|
||||
|
||||
struct {
|
||||
struct tegra_ivc_header *channel;
|
||||
struct iosys_map map;
|
||||
unsigned int position;
|
||||
dma_addr_t phys;
|
||||
} rx, tx;
|
||||
|
|
@ -36,7 +37,7 @@ struct tegra_ivc {
|
|||
*
|
||||
* Returns a pointer to the frame, or an error encoded pointer.
|
||||
*/
|
||||
void *tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc);
|
||||
int tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc, struct iosys_map *map);
|
||||
|
||||
/**
|
||||
* tegra_ivc_read_advance - Advance the read queue
|
||||
|
|
@ -56,7 +57,7 @@ int tegra_ivc_read_advance(struct tegra_ivc *ivc);
|
|||
*
|
||||
* Returns a pointer to the frame, or an error encoded pointer.
|
||||
*/
|
||||
void *tegra_ivc_write_get_next_frame(struct tegra_ivc *ivc);
|
||||
int tegra_ivc_write_get_next_frame(struct tegra_ivc *ivc, struct iosys_map *map);
|
||||
|
||||
/**
|
||||
* tegra_ivc_write_advance - Advance the write queue
|
||||
|
|
@ -91,8 +92,8 @@ void tegra_ivc_reset(struct tegra_ivc *ivc);
|
|||
|
||||
size_t tegra_ivc_align(size_t size);
|
||||
unsigned tegra_ivc_total_queue_size(unsigned queue_size);
|
||||
int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, void *rx,
|
||||
dma_addr_t rx_phys, void *tx, dma_addr_t tx_phys,
|
||||
int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, const struct iosys_map *rx,
|
||||
dma_addr_t rx_phys, const struct iosys_map *tx, dma_addr_t tx_phys,
|
||||
unsigned int num_frames, size_t frame_size,
|
||||
void (*notify)(struct tegra_ivc *ivc, void *data),
|
||||
void *data);
|
||||
|
|
|
|||
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