Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Ingo Molnar: "Misc kernel side fixes: - fix event leak - fix AMD PMU driver bug - fix core event handling bug - fix build bug on certain randconfigs Plus misc tooling fixes" * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf/x86/amd/ibs: Fix pmu::stop() nesting perf/core: Don't leak event in the syscall error path perf/core: Fix time tracking bug with multiplexing perf jit: genelf makes assumptions about endian perf hists: Fix determination of a callchain node's childlessness perf tools: Add missing initialization of perf_sample.cpumode in synthesized samples perf tools: Fix build break on powerpc perf/x86: Move events_sysfs_show() outside CPU_SUP_INTEL perf bench: Fix detached tarball building due to missing 'perf bench memcpy' headers perf tests: Fix tarpkg build test error output redirection
This commit is contained in:
Коммит
4c3b73c6a2
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@ -28,10 +28,46 @@ static u32 ibs_caps;
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#define IBS_FETCH_CONFIG_MASK (IBS_FETCH_RAND_EN | IBS_FETCH_MAX_CNT)
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#define IBS_OP_CONFIG_MASK IBS_OP_MAX_CNT
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/*
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* IBS states:
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*
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* ENABLED; tracks the pmu::add(), pmu::del() state, when set the counter is taken
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* and any further add()s must fail.
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*
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* STARTED/STOPPING/STOPPED; deal with pmu::start(), pmu::stop() state but are
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* complicated by the fact that the IBS hardware can send late NMIs (ie. after
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* we've cleared the EN bit).
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*
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* In order to consume these late NMIs we have the STOPPED state, any NMI that
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* happens after we've cleared the EN state will clear this bit and report the
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* NMI handled (this is fundamentally racy in the face or multiple NMI sources,
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* someone else can consume our BIT and our NMI will go unhandled).
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*
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* And since we cannot set/clear this separate bit together with the EN bit,
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* there are races; if we cleared STARTED early, an NMI could land in
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* between clearing STARTED and clearing the EN bit (in fact multiple NMIs
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* could happen if the period is small enough), and consume our STOPPED bit
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* and trigger streams of unhandled NMIs.
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*
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* If, however, we clear STARTED late, an NMI can hit between clearing the
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* EN bit and clearing STARTED, still see STARTED set and process the event.
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* If this event will have the VALID bit clear, we bail properly, but this
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* is not a given. With VALID set we can end up calling pmu::stop() again
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* (the throttle logic) and trigger the WARNs in there.
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*
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* So what we do is set STOPPING before clearing EN to avoid the pmu::stop()
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* nesting, and clear STARTED late, so that we have a well defined state over
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* the clearing of the EN bit.
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*
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* XXX: we could probably be using !atomic bitops for all this.
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*/
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enum ibs_states {
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IBS_ENABLED = 0,
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IBS_STARTED = 1,
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IBS_STOPPING = 2,
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IBS_STOPPED = 3,
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IBS_MAX_STATES,
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};
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@ -377,11 +413,10 @@ static void perf_ibs_start(struct perf_event *event, int flags)
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perf_ibs_set_period(perf_ibs, hwc, &period);
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/*
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* Set STARTED before enabling the hardware, such that
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* a subsequent NMI must observe it. Then clear STOPPING
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* such that we don't consume NMIs by accident.
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* Set STARTED before enabling the hardware, such that a subsequent NMI
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* must observe it.
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*/
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set_bit(IBS_STARTED, pcpu->state);
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set_bit(IBS_STARTED, pcpu->state);
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clear_bit(IBS_STOPPING, pcpu->state);
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perf_ibs_enable_event(perf_ibs, hwc, period >> 4);
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@ -396,6 +431,9 @@ static void perf_ibs_stop(struct perf_event *event, int flags)
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u64 config;
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int stopping;
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if (test_and_set_bit(IBS_STOPPING, pcpu->state))
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return;
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stopping = test_bit(IBS_STARTED, pcpu->state);
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if (!stopping && (hwc->state & PERF_HES_UPTODATE))
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@ -405,12 +443,12 @@ static void perf_ibs_stop(struct perf_event *event, int flags)
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if (stopping) {
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/*
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* Set STOPPING before disabling the hardware, such that it
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* Set STOPPED before disabling the hardware, such that it
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* must be visible to NMIs the moment we clear the EN bit,
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* at which point we can generate an !VALID sample which
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* we need to consume.
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*/
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set_bit(IBS_STOPPING, pcpu->state);
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set_bit(IBS_STOPPED, pcpu->state);
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perf_ibs_disable_event(perf_ibs, hwc, config);
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/*
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* Clear STARTED after disabling the hardware; if it were
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@ -556,7 +594,7 @@ fail:
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* with samples that even have the valid bit cleared.
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* Mark all this NMIs as handled.
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*/
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if (test_and_clear_bit(IBS_STOPPING, pcpu->state))
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if (test_and_clear_bit(IBS_STOPPED, pcpu->state))
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return 1;
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return 0;
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@ -800,6 +800,9 @@ ssize_t intel_event_sysfs_show(char *page, u64 config);
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struct attribute **merge_attr(struct attribute **a, struct attribute **b);
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ssize_t events_sysfs_show(struct device *dev, struct device_attribute *attr,
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char *page);
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#ifdef CONFIG_CPU_SUP_AMD
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int amd_pmu_init(void);
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@ -930,9 +933,6 @@ int p6_pmu_init(void);
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int knc_pmu_init(void);
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ssize_t events_sysfs_show(struct device *dev, struct device_attribute *attr,
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char *page);
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static inline int is_ht_workaround_enabled(void)
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{
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return !!(x86_pmu.flags & PMU_FL_EXCL_ENABLED);
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@ -2417,14 +2417,24 @@ static void ctx_sched_out(struct perf_event_context *ctx,
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cpuctx->task_ctx = NULL;
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}
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is_active ^= ctx->is_active; /* changed bits */
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/*
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* Always update time if it was set; not only when it changes.
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* Otherwise we can 'forget' to update time for any but the last
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* context we sched out. For example:
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*
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* ctx_sched_out(.event_type = EVENT_FLEXIBLE)
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* ctx_sched_out(.event_type = EVENT_PINNED)
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*
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* would only update time for the pinned events.
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*/
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if (is_active & EVENT_TIME) {
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/* update (and stop) ctx time */
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update_context_time(ctx);
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update_cgrp_time_from_cpuctx(cpuctx);
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}
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is_active ^= ctx->is_active; /* changed bits */
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if (!ctx->nr_active || !(is_active & EVENT_ALL))
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return;
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@ -8532,6 +8542,7 @@ SYSCALL_DEFINE5(perf_event_open,
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f_flags);
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if (IS_ERR(event_file)) {
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err = PTR_ERR(event_file);
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event_file = NULL;
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goto err_context;
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}
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@ -74,6 +74,7 @@ arch/*/include/uapi/asm/unistd*.h
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arch/*/include/uapi/asm/perf_regs.h
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arch/*/lib/memcpy*.S
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arch/*/lib/memset*.S
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arch/*/include/asm/*features.h
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include/linux/poison.h
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include/linux/hw_breakpoint.h
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include/uapi/linux/perf_event.h
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@ -4,6 +4,8 @@
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#include <stdlib.h>
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#include <string.h>
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#include <linux/stringify.h>
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#include "header.h"
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#include "util.h"
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#define mfspr(rn) ({unsigned long rval; \
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asm volatile("mfspr %0," __stringify(rn) \
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@ -15,7 +15,7 @@ TMP_DEST=$(mktemp -d)
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tar xf ${TARBALL} -C $TMP_DEST
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rm -f ${TARBALL}
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cd - > /dev/null
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make -C $TMP_DEST/perf*/tools/perf > /dev/null 2>&1
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make -C $TMP_DEST/perf*/tools/perf > /dev/null
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RC=$?
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rm -rf ${TMP_DEST}
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exit $RC
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@ -337,7 +337,7 @@ static void callchain_node__init_have_children(struct callchain_node *node,
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chain = list_entry(node->val.next, struct callchain_list, list);
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chain->has_children = has_sibling;
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if (node->val.next != node->val.prev) {
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if (!list_empty(&node->val)) {
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chain = list_entry(node->val.prev, struct callchain_list, list);
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chain->has_children = !RB_EMPTY_ROOT(&node->rb_root);
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}
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@ -56,13 +56,22 @@ const char *perf_event__name(unsigned int id)
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return perf_event__names[id];
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}
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static struct perf_sample synth_sample = {
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static int perf_tool__process_synth_event(struct perf_tool *tool,
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union perf_event *event,
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struct machine *machine,
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perf_event__handler_t process)
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{
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struct perf_sample synth_sample = {
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.pid = -1,
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.tid = -1,
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.time = -1,
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.stream_id = -1,
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.cpu = -1,
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.period = 1,
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.cpumode = event->header.misc & PERF_RECORD_MISC_CPUMODE_MASK,
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};
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return process(tool, event, &synth_sample, machine);
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};
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/*
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@ -186,7 +195,7 @@ pid_t perf_event__synthesize_comm(struct perf_tool *tool,
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if (perf_event__prepare_comm(event, pid, machine, &tgid, &ppid) != 0)
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return -1;
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if (process(tool, event, &synth_sample, machine) != 0)
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if (perf_tool__process_synth_event(tool, event, machine, process) != 0)
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return -1;
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return tgid;
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@ -218,7 +227,7 @@ static int perf_event__synthesize_fork(struct perf_tool *tool,
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event->fork.header.size = (sizeof(event->fork) + machine->id_hdr_size);
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if (process(tool, event, &synth_sample, machine) != 0)
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if (perf_tool__process_synth_event(tool, event, machine, process) != 0)
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return -1;
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return 0;
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@ -344,7 +353,7 @@ out:
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event->mmap2.pid = tgid;
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event->mmap2.tid = pid;
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if (process(tool, event, &synth_sample, machine) != 0) {
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if (perf_tool__process_synth_event(tool, event, machine, process) != 0) {
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rc = -1;
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break;
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}
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@ -402,7 +411,7 @@ int perf_event__synthesize_modules(struct perf_tool *tool,
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memcpy(event->mmap.filename, pos->dso->long_name,
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pos->dso->long_name_len + 1);
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if (process(tool, event, &synth_sample, machine) != 0) {
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if (perf_tool__process_synth_event(tool, event, machine, process) != 0) {
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rc = -1;
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break;
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}
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@ -472,7 +481,7 @@ static int __event__synthesize_thread(union perf_event *comm_event,
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/*
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* Send the prepared comm event
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*/
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if (process(tool, comm_event, &synth_sample, machine) != 0)
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if (perf_tool__process_synth_event(tool, comm_event, machine, process) != 0)
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break;
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rc = 0;
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@ -701,7 +710,7 @@ int perf_event__synthesize_kernel_mmap(struct perf_tool *tool,
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event->mmap.len = map->end - event->mmap.start;
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event->mmap.pid = machine->pid;
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err = process(tool, event, &synth_sample, machine);
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err = perf_tool__process_synth_event(tool, event, machine, process);
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free(event);
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return err;
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@ -9,36 +9,32 @@ int jit_add_debug_info(Elf *e, uint64_t code_addr, void *debug, int nr_debug_ent
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#if defined(__arm__)
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#define GEN_ELF_ARCH EM_ARM
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#define GEN_ELF_ENDIAN ELFDATA2LSB
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#define GEN_ELF_CLASS ELFCLASS32
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#elif defined(__aarch64__)
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#define GEN_ELF_ARCH EM_AARCH64
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#define GEN_ELF_ENDIAN ELFDATA2LSB
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#define GEN_ELF_CLASS ELFCLASS64
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#elif defined(__x86_64__)
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#define GEN_ELF_ARCH EM_X86_64
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#define GEN_ELF_ENDIAN ELFDATA2LSB
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#define GEN_ELF_CLASS ELFCLASS64
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#elif defined(__i386__)
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#define GEN_ELF_ARCH EM_386
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#define GEN_ELF_ENDIAN ELFDATA2LSB
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#define GEN_ELF_CLASS ELFCLASS32
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#elif defined(__ppcle__)
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#define GEN_ELF_ARCH EM_PPC
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#define GEN_ELF_ENDIAN ELFDATA2LSB
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#elif defined(__powerpc64__)
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#define GEN_ELF_ARCH EM_PPC64
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#define GEN_ELF_CLASS ELFCLASS64
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#elif defined(__powerpc__)
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#define GEN_ELF_ARCH EM_PPC64
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#define GEN_ELF_ENDIAN ELFDATA2MSB
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#define GEN_ELF_CLASS ELFCLASS64
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#elif defined(__powerpcle__)
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#define GEN_ELF_ARCH EM_PPC64
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#define GEN_ELF_ENDIAN ELFDATA2LSB
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#define GEN_ELF_CLASS ELFCLASS64
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#define GEN_ELF_ARCH EM_PPC
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#define GEN_ELF_CLASS ELFCLASS32
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#else
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#error "unsupported architecture"
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#endif
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#if __BYTE_ORDER == __BIG_ENDIAN
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#define GEN_ELF_ENDIAN ELFDATA2MSB
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#else
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#define GEN_ELF_ENDIAN ELFDATA2LSB
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#endif
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#if GEN_ELF_CLASS == ELFCLASS64
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#define elf_newehdr elf64_newehdr
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#define elf_getshdr elf64_getshdr
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@ -279,6 +279,7 @@ static int intel_bts_synth_branch_sample(struct intel_bts_queue *btsq,
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event.sample.header.misc = PERF_RECORD_MISC_USER;
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event.sample.header.size = sizeof(struct perf_event_header);
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sample.cpumode = PERF_RECORD_MISC_USER;
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sample.ip = le64_to_cpu(branch->from);
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sample.pid = btsq->pid;
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sample.tid = btsq->tid;
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|
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@ -979,6 +979,7 @@ static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq)
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if (!pt->timeless_decoding)
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sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
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sample.cpumode = PERF_RECORD_MISC_USER;
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sample.ip = ptq->state->from_ip;
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sample.pid = ptq->pid;
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sample.tid = ptq->tid;
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|
@ -1035,6 +1036,7 @@ static int intel_pt_synth_instruction_sample(struct intel_pt_queue *ptq)
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if (!pt->timeless_decoding)
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sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
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sample.cpumode = PERF_RECORD_MISC_USER;
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sample.ip = ptq->state->from_ip;
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sample.pid = ptq->pid;
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sample.tid = ptq->tid;
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|
@ -1092,6 +1094,7 @@ static int intel_pt_synth_transaction_sample(struct intel_pt_queue *ptq)
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if (!pt->timeless_decoding)
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sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
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sample.cpumode = PERF_RECORD_MISC_USER;
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sample.ip = ptq->state->from_ip;
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sample.pid = ptq->pid;
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sample.tid = ptq->tid;
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|
|
|
@ -417,6 +417,7 @@ static int jit_repipe_code_load(struct jit_buf_desc *jd, union jr_entry *jr)
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* use first address as sample address
|
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*/
|
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memset(&sample, 0, sizeof(sample));
|
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sample.cpumode = PERF_RECORD_MISC_USER;
|
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sample.pid = pid;
|
||||
sample.tid = tid;
|
||||
sample.time = id->time;
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||||
|
@ -505,6 +506,7 @@ static int jit_repipe_code_move(struct jit_buf_desc *jd, union jr_entry *jr)
|
|||
* use first address as sample address
|
||||
*/
|
||||
memset(&sample, 0, sizeof(sample));
|
||||
sample.cpumode = PERF_RECORD_MISC_USER;
|
||||
sample.pid = pid;
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||||
sample.tid = tid;
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||||
sample.time = id->time;
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|
|
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