x86-32: Handle exception table entries during early boot
If we get an exception during early boot, walk the exception table to see if we should intercept it. The main use case for this is to allow rdmsr_safe()/wrmsr_safe() during CPU initialization. Since the exception table is currently sorted at runtime, and fairly late in startup, this code walks the exception table linearly. We obviously don't need to worry about modules, however: none have been loaded at this point. This patch changes the early IDT setup to look a lot more like x86-64: we now install handlers for all 32 exception vectors. The output of the early exception handler has changed somewhat as it directly reflects the stack frame of the exception handler, and the stack frame has been somewhat restructured. Finally, centralize the code that can and should be run only once. [ v2: Use early_fixup_exception() instead of linear search ] Signed-off-by: H. Peter Anvin <hpa@zytor.com> Link: http://lkml.kernel.org/r/1334794610-5546-6-git-send-email-hpa@zytor.com
This commit is contained in:
H. Peter Anvin
H. Peter Anvin
Родитель
9900aa2f95
Коммит
4c5023a3fa
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@ -21,6 +21,7 @@
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#include <asm/msr-index.h>
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#include <asm/cpufeature.h>
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#include <asm/percpu.h>
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#include <asm/nops.h>
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/* Physical address */
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#define pa(X) ((X) - __PAGE_OFFSET)
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@ -363,28 +364,23 @@ default_entry:
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pushl $0
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popfl
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#ifdef CONFIG_SMP
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cmpb $0, ready
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jnz checkCPUtype
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#endif /* CONFIG_SMP */
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/*
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* start system 32-bit setup. We need to re-do some of the things done
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* in 16-bit mode for the "real" operations.
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*/
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call setup_idt
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checkCPUtype:
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movl $-1,X86_CPUID # -1 for no CPUID initially
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movl setup_once_ref,%eax
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andl %eax,%eax
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jz 1f # Did we do this already?
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call *%eax
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1:
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/* check if it is 486 or 386. */
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/*
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* XXX - this does a lot of unnecessary setup. Alignment checks don't
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* apply at our cpl of 0 and the stack ought to be aligned already, and
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* we don't need to preserve eflags.
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*/
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movl $-1,X86_CPUID # -1 for no CPUID initially
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movb $3,X86 # at least 386
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pushfl # push EFLAGS
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popl %eax # get EFLAGS
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@ -450,21 +446,6 @@ is386: movl $2,%ecx # set MP
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movl $(__KERNEL_PERCPU), %eax
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movl %eax,%fs # set this cpu's percpu
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#ifdef CONFIG_CC_STACKPROTECTOR
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/*
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* The linker can't handle this by relocation. Manually set
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* base address in stack canary segment descriptor.
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*/
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cmpb $0,ready
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jne 1f
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movl $gdt_page,%eax
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movl $stack_canary,%ecx
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movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
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shrl $16, %ecx
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movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
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movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
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1:
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#endif
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movl $(__KERNEL_STACK_CANARY),%eax
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movl %eax,%gs
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@ -473,7 +454,6 @@ is386: movl $2,%ecx # set MP
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cld # gcc2 wants the direction flag cleared at all times
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pushl $0 # fake return address for unwinder
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movb $1, ready
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jmp *(initial_code)
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/*
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@ -495,81 +475,122 @@ check_x87:
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.byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
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ret
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#include "verify_cpu.S"
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/*
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* setup_idt
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* setup_once
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*
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* sets up a idt with 256 entries pointing to
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* ignore_int, interrupt gates. It doesn't actually load
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* idt - that can be done only after paging has been enabled
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* and the kernel moved to PAGE_OFFSET. Interrupts
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* are enabled elsewhere, when we can be relatively
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* sure everything is ok.
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* The setup work we only want to run on the BSP.
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*
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* Warning: %esi is live across this function.
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*/
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setup_idt:
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lea ignore_int,%edx
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__INIT
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setup_once:
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/*
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* Set up a idt with 256 entries pointing to ignore_int,
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* interrupt gates. It doesn't actually load idt - that needs
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* to be done on each CPU. Interrupts are enabled elsewhere,
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* when we can be relatively sure everything is ok.
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*/
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movl $idt_table,%edi
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movl $early_idt_handlers,%eax
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movl $NUM_EXCEPTION_VECTORS,%ecx
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1:
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movl %eax,(%edi)
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movl %eax,4(%edi)
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/* interrupt gate, dpl=0, present */
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movl $(0x8E000000 + __KERNEL_CS),2(%edi)
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addl $9,%eax
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addl $8,%edi
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loop 1b
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movl $256 - NUM_EXCEPTION_VECTORS,%ecx
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movl $ignore_int,%edx
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movl $(__KERNEL_CS << 16),%eax
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movw %dx,%ax /* selector = 0x0010 = cs */
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movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
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lea idt_table,%edi
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mov $256,%ecx
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rp_sidt:
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2:
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movl %eax,(%edi)
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movl %edx,4(%edi)
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addl $8,%edi
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dec %ecx
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jne rp_sidt
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loop 2b
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.macro set_early_handler handler,trapno
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lea \handler,%edx
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movl $(__KERNEL_CS << 16),%eax
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movw %dx,%ax
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movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
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lea idt_table,%edi
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movl %eax,8*\trapno(%edi)
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movl %edx,8*\trapno+4(%edi)
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.endm
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set_early_handler handler=early_divide_err,trapno=0
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set_early_handler handler=early_illegal_opcode,trapno=6
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set_early_handler handler=early_protection_fault,trapno=13
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set_early_handler handler=early_page_fault,trapno=14
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#ifdef CONFIG_CC_STACKPROTECTOR
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/*
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* Configure the stack canary. The linker can't handle this by
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* relocation. Manually set base address in stack canary
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* segment descriptor.
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*/
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movl $gdt_page,%eax
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movl $stack_canary,%ecx
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movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
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shrl $16, %ecx
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movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
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movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
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#endif
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andl $0,setup_once_ref /* Once is enough, thanks */
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ret
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early_divide_err:
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xor %edx,%edx
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pushl $0 /* fake errcode */
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jmp early_fault
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early_illegal_opcode:
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movl $6,%edx
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pushl $0 /* fake errcode */
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jmp early_fault
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early_protection_fault:
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movl $13,%edx
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jmp early_fault
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early_page_fault:
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movl $14,%edx
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jmp early_fault
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early_fault:
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ENTRY(early_idt_handlers)
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# 36(%esp) %eflags
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# 32(%esp) %cs
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# 28(%esp) %eip
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# 24(%rsp) error code
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i = 0
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.rept NUM_EXCEPTION_VECTORS
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.if (EXCEPTION_ERRCODE_MASK >> i) & 1
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ASM_NOP2
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.else
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pushl $0 # Dummy error code, to make stack frame uniform
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.endif
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pushl $i # 20(%esp) Vector number
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jmp early_idt_handler
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i = i + 1
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.endr
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ENDPROC(early_idt_handlers)
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/* This is global to keep gas from relaxing the jumps */
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ENTRY(early_idt_handler)
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cld
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#ifdef CONFIG_PRINTK
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pusha
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cmpl $2,%ss:early_recursion_flag
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je hlt_loop
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incl %ss:early_recursion_flag
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push %eax # 16(%esp)
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push %ecx # 12(%esp)
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push %edx # 8(%esp)
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push %ds # 4(%esp)
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push %es # 0(%esp)
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movl $(__KERNEL_DS),%eax
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movl %eax,%ds
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movl %eax,%es
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cmpl $2,early_recursion_flag
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je hlt_loop
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incl early_recursion_flag
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cmpl $(__KERNEL_CS),32(%esp)
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jne 10f
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leal 28(%esp),%eax # Pointer to %eip
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call early_fixup_exception
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andl %eax,%eax
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jnz ex_entry /* found an exception entry */
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10:
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#ifdef CONFIG_PRINTK
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xorl %eax,%eax
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movw %ax,2(%esp) /* clean up the segment values on some cpus */
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movw %ax,6(%esp)
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movw %ax,34(%esp)
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leal 40(%esp),%eax
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pushl %eax /* %esp before the exception */
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pushl %ebx
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pushl %ebp
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pushl %esi
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pushl %edi
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movl %cr2,%eax
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pushl %eax
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pushl %edx /* trapno */
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pushl (20+6*4)(%esp) /* trapno */
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pushl $fault_msg
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call printk
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#endif
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@ -578,6 +599,17 @@ hlt_loop:
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hlt
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jmp hlt_loop
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ex_entry:
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pop %es
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pop %ds
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pop %edx
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pop %ecx
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pop %eax
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addl $8,%esp /* drop vector number and error code */
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decl %ss:early_recursion_flag
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iret
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ENDPROC(early_idt_handler)
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/* This is the default interrupt "handler" :-) */
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ALIGN
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ignore_int:
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@ -611,13 +643,18 @@ ignore_int:
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popl %eax
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#endif
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iret
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ENDPROC(ignore_int)
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__INITDATA
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.align 4
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early_recursion_flag:
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.long 0
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#include "verify_cpu.S"
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__REFDATA
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.align 4
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__REFDATA
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.align 4
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ENTRY(initial_code)
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.long i386_start_kernel
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ENTRY(setup_once_ref)
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.long setup_once
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/*
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* BSS section
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@ -670,22 +707,19 @@ ENTRY(initial_page_table)
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ENTRY(stack_start)
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.long init_thread_union+THREAD_SIZE
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early_recursion_flag:
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.long 0
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ready: .byte 0
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__INITRODATA
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int_msg:
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.asciz "Unknown interrupt or fault at: %p %p %p\n"
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fault_msg:
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/* fault info: */
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.ascii "BUG: Int %d: CR2 %p\n"
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/* pusha regs: */
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.ascii " EDI %p ESI %p EBP %p ESP %p\n"
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.ascii " EBX %p EDX %p ECX %p EAX %p\n"
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/* regs pushed in early_idt_handler: */
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.ascii " EDI %p ESI %p EBP %p EBX %p\n"
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.ascii " ESP %p ES %p DS %p\n"
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.ascii " EDX %p ECX %p EAX %p\n"
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/* fault frame: */
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.ascii " err %p EIP %p CS %p flg %p\n"
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.ascii " vec %p err %p EIP %p CS %p flg %p\n"
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.ascii "Stack: %p %p %p %p %p %p %p %p\n"
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.ascii " %p %p %p %p %p %p %p %p\n"
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.asciz " %p %p %p %p %p %p %p %p\n"
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@ -699,6 +733,7 @@ fault_msg:
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* segment size, and 32-bit linear address value:
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*/
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.data
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.globl boot_gdt_descr
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.globl idt_descr
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