intel-iommu: Enable DMAR on 32-bit kernel.
If we fix a few highmem-related thinkos and a couple of printk format warnings, the Intel IOMMU driver works fine in a 32-bit kernel. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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3199aa6bc8
Коммит
4cf2e75d0b
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@ -1794,7 +1794,7 @@ config PCI_MMCONFIG
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config DMAR
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bool "Support for DMA Remapping Devices (EXPERIMENTAL)"
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depends on X86_64 && PCI_MSI && ACPI && EXPERIMENTAL
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depends on PCI_MSI && ACPI && EXPERIMENTAL
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help
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DMA remapping (DMAR) devices support enables independent address
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translations for Direct Memory Access (DMA) from devices.
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@ -2315,7 +2315,7 @@ static dma_addr_t __intel_map_single(struct device *hwdev, phys_addr_t paddr,
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error:
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if (iova)
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__free_iova(&domain->iovad, iova);
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printk(KERN_ERR"Device %s request: %lx@%llx dir %d --- failed\n",
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printk(KERN_ERR"Device %s request: %zx@%llx dir %d --- failed\n",
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pci_name(pdev), size, (unsigned long long)paddr, dir);
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return 0;
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}
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@ -2411,7 +2411,7 @@ void intel_unmap_single(struct device *dev, dma_addr_t dev_addr, size_t size,
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start_addr = iova->pfn_lo << PAGE_SHIFT;
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size = aligned_size((u64)dev_addr, size);
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pr_debug("Device %s unmapping: %lx@%llx\n",
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pr_debug("Device %s unmapping: %zx@%llx\n",
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pci_name(pdev), size, (unsigned long long)start_addr);
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/* clear the whole page */
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@ -2469,8 +2469,6 @@ void intel_free_coherent(struct device *hwdev, size_t size, void *vaddr,
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free_pages((unsigned long)vaddr, order);
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}
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#define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg)))
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void intel_unmap_sg(struct device *hwdev, struct scatterlist *sglist,
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int nelems, int dir)
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{
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@ -2480,7 +2478,7 @@ void intel_unmap_sg(struct device *hwdev, struct scatterlist *sglist,
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unsigned long start_addr;
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struct iova *iova;
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size_t size = 0;
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void *addr;
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phys_addr_t addr;
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struct scatterlist *sg;
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struct intel_iommu *iommu;
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@ -2496,7 +2494,7 @@ void intel_unmap_sg(struct device *hwdev, struct scatterlist *sglist,
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if (!iova)
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return;
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for_each_sg(sglist, sg, nelems, i) {
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addr = SG_ENT_VIRT_ADDRESS(sg);
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addr = page_to_phys(sg_page(sg)) + sg->offset;
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size += aligned_size((u64)addr, sg->length);
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}
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@ -2523,7 +2521,7 @@ static int intel_nontranslate_map_sg(struct device *hddev,
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for_each_sg(sglist, sg, nelems, i) {
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BUG_ON(!sg_page(sg));
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sg->dma_address = virt_to_bus(SG_ENT_VIRT_ADDRESS(sg));
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sg->dma_address = page_to_phys(sg_page(sg)) + sg->offset;
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sg->dma_length = sg->length;
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}
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return nelems;
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@ -2532,7 +2530,7 @@ static int intel_nontranslate_map_sg(struct device *hddev,
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int intel_map_sg(struct device *hwdev, struct scatterlist *sglist, int nelems,
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int dir)
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{
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void *addr;
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phys_addr_t addr;
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int i;
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struct pci_dev *pdev = to_pci_dev(hwdev);
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struct dmar_domain *domain;
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@ -2556,8 +2554,7 @@ int intel_map_sg(struct device *hwdev, struct scatterlist *sglist, int nelems,
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iommu = domain_get_iommu(domain);
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for_each_sg(sglist, sg, nelems, i) {
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addr = SG_ENT_VIRT_ADDRESS(sg);
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addr = (void *)virt_to_phys(addr);
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addr = page_to_phys(sg_page(sg)) + sg->offset;
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size += aligned_size((u64)addr, sg->length);
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}
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@ -2580,8 +2577,7 @@ int intel_map_sg(struct device *hwdev, struct scatterlist *sglist, int nelems,
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start_addr = iova->pfn_lo << PAGE_SHIFT;
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offset = 0;
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for_each_sg(sglist, sg, nelems, i) {
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addr = SG_ENT_VIRT_ADDRESS(sg);
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addr = (void *)virt_to_phys(addr);
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addr = page_to_phys(sg_page(sg)) + sg->offset;
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size = aligned_size((u64)addr, sg->length);
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ret = domain_page_mapping(domain, start_addr + offset,
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((u64)addr) & PAGE_MASK,
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