OMAP: I2C: split device registration and convert OMAP2+ to omap_device
Split the OMAP1 and OMAP2+ platform_device build and register code. Convert the OMAP2+ variant to use omap_device. This patch was developed in collaboration with Rajendra Nayak <rnayak@ti.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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@ -27,18 +27,18 @@
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#include <linux/platform_device.h>
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#include <linux/i2c.h>
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#include <linux/i2c-omap.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <mach/irqs.h>
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#include <plat/mux.h>
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#include <plat/i2c.h>
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#include <plat/omap-pm.h>
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#include <plat/omap_device.h>
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#define OMAP_I2C_SIZE 0x3f
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#define OMAP1_I2C_BASE 0xfffb3800
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#define OMAP2_I2C_BASE1 0x48070000
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#define OMAP2_I2C_BASE2 0x48072000
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#define OMAP2_I2C_BASE3 0x48060000
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#define OMAP4_I2C_BASE4 0x48350000
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static const char name[] = "i2c_omap";
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@ -55,15 +55,6 @@ static const char name[] = "i2c_omap";
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static struct resource i2c_resources[][2] = {
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{ I2C_RESOURCE_BUILDER(0, 0) },
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#if defined(CONFIG_ARCH_OMAP2PLUS)
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{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, 0) },
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#endif
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#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
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{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, 0) },
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#endif
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#if defined(CONFIG_ARCH_OMAP4)
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{ I2C_RESOURCE_BUILDER(OMAP4_I2C_BASE4, 0) },
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#endif
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};
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#define I2C_DEV_BUILDER(bus_id, res, data) \
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@ -77,18 +68,11 @@ static struct resource i2c_resources[][2] = {
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}, \
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}
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static struct omap_i2c_bus_platform_data i2c_pdata[ARRAY_SIZE(i2c_resources)];
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#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
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#define OMAP_I2C_MAX_CONTROLLERS 4
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static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
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static struct platform_device omap_i2c_devices[] = {
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I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
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#if defined(CONFIG_ARCH_OMAP2PLUS)
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I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_pdata[1]),
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#endif
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#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
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I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_pdata[2]),
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#endif
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#if defined(CONFIG_ARCH_OMAP4)
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I2C_DEV_BUILDER(4, i2c_resources[3], &i2c_pdata[3]),
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#endif
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};
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#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
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@ -109,35 +93,20 @@ static int __init omap_i2c_nr_ports(void)
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return ports;
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}
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/* Shared between omap2 and 3 */
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static resource_size_t omap2_i2c_irq[3] __initdata = {
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INT_24XX_I2C1_IRQ,
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INT_24XX_I2C2_IRQ,
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INT_34XX_I2C3_IRQ,
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};
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static resource_size_t omap4_i2c_irq[4] __initdata = {
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OMAP44XX_IRQ_I2C1,
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OMAP44XX_IRQ_I2C2,
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OMAP44XX_IRQ_I2C3,
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OMAP44XX_IRQ_I2C4,
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};
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static inline int omap1_i2c_add_bus(struct platform_device *pdev, int bus_id)
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static inline int omap1_i2c_add_bus(int bus_id)
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{
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struct omap_i2c_bus_platform_data *pd;
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struct resource *res;
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struct platform_device *pdev;
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struct omap_i2c_bus_platform_data *pdata;
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pd = pdev->dev.platform_data;
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res = pdev->resource;
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res[0].start = OMAP1_I2C_BASE;
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res[0].end = res[0].start + OMAP_I2C_SIZE;
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res[1].start = INT_I2C;
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omap1_i2c_mux_pins(bus_id);
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pdev = &omap_i2c_devices[bus_id - 1];
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pdata = &i2c_pdata[bus_id - 1];
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return platform_device_register(pdev);
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}
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/*
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* XXX This function is a temporary compatibility wrapper - only
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* needed until the I2C driver can be converted to call
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@ -148,52 +117,57 @@ static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
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omap_pm_set_max_mpu_wakeup_lat(dev, t);
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}
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static inline int omap2_i2c_add_bus(struct platform_device *pdev, int bus_id)
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static struct omap_device_pm_latency omap_i2c_latency[] = {
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[0] = {
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.deactivate_func = omap_device_idle_hwmods,
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.activate_func = omap_device_enable_hwmods,
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.flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
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},
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};
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static inline int omap2_i2c_add_bus(int bus_id)
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{
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struct resource *res;
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resource_size_t *irq;
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int l;
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struct omap_hwmod *oh;
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struct omap_device *od;
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char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
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struct omap_i2c_bus_platform_data *pdata;
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res = pdev->resource;
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if (!cpu_is_omap44xx())
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irq = omap2_i2c_irq;
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else
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irq = omap4_i2c_irq;
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if (bus_id == 1) {
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res[0].start = OMAP2_I2C_BASE1;
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res[0].end = res[0].start + OMAP_I2C_SIZE;
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}
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res[1].start = irq[bus_id - 1];
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omap2_i2c_mux_pins(bus_id);
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l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
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WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
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"String buffer overflow in I2C%d device setup\n", bus_id);
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oh = omap_hwmod_lookup(oh_name);
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if (!oh) {
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pr_err("Could not look up %s\n", oh_name);
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return -EEXIST;
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}
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pdata = &i2c_pdata[bus_id - 1];
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/*
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* When waiting for completion of a i2c transfer, we need to
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* set a wake up latency constraint for the MPU. This is to
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* ensure quick enough wakeup from idle, when transfer
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* completes.
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* Only omap3 has support for constraints
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*/
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if (cpu_is_omap34xx()) {
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struct omap_i2c_bus_platform_data *pd;
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if (cpu_is_omap34xx())
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pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
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od = omap_device_build(name, bus_id, oh, pdata,
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sizeof(struct omap_i2c_bus_platform_data),
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omap_i2c_latency, ARRAY_SIZE(omap_i2c_latency), 0);
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WARN(IS_ERR(od), "Could not build omap_device for %s\n", name);
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pd = pdev->dev.platform_data;
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pd->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
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}
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return platform_device_register(pdev);
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return PTR_ERR(od);
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}
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static int __init omap_i2c_add_bus(int bus_id)
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{
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struct platform_device *pdev;
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pdev = &omap_i2c_devices[bus_id - 1];
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if (cpu_class_is_omap1())
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return omap1_i2c_add_bus(pdev, bus_id);
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return omap1_i2c_add_bus(bus_id);
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else
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return omap2_i2c_add_bus(pdev, bus_id);
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return omap2_i2c_add_bus(bus_id);
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}
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/**
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@ -1,9 +1,14 @@
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#ifndef __I2C_OMAP_H__
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#define __I2C_OMAP_H__
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#include <linux/platform_device.h>
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struct omap_i2c_bus_platform_data {
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u32 clkrate;
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void (*set_mpu_wkup_lat)(struct device *dev, long set);
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int (*device_enable) (struct platform_device *pdev);
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int (*device_shutdown) (struct platform_device *pdev);
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int (*device_idle) (struct platform_device *pdev);
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};
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#endif
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