perf, x86: implement group scheduling transactional APIs
Convert to the transactional PMU API and remove the duplication of group_sched_in(). Reviewed-by: Stephane Eranian <eranian@google.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: David Miller <davem@davemloft.net> Cc: Paul Mackerras <paulus@samba.org> LKML-Reference: <1272002172.5707.61.camel@minggr.sh.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Lin Ming
Ingo Molnar
Родитель
6bde9b6ce0
Коммит
4d1c52b02d
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@ -110,6 +110,8 @@ struct cpu_hw_events {
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u64 tags[X86_PMC_IDX_MAX];
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struct perf_event *event_list[X86_PMC_IDX_MAX]; /* in enabled order */
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unsigned int group_flag;
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/*
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* Intel DebugStore bits
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*/
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@ -961,6 +963,14 @@ static int x86_pmu_enable(struct perf_event *event)
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if (n < 0)
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return n;
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/*
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* If group events scheduling transaction was started,
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* skip the schedulability test here, it will be peformed
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* at commit time(->commit_txn) as a whole
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*/
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if (cpuc->group_flag & PERF_EVENT_TXN_STARTED)
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goto out;
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ret = x86_pmu.schedule_events(cpuc, n, assign);
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if (ret)
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return ret;
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@ -970,6 +980,7 @@ static int x86_pmu_enable(struct perf_event *event)
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*/
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memcpy(cpuc->assign, assign, n*sizeof(int));
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out:
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cpuc->n_events = n;
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cpuc->n_added += n - n0;
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@ -1227,119 +1238,6 @@ x86_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
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return &unconstrained;
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}
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static int x86_event_sched_in(struct perf_event *event,
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struct perf_cpu_context *cpuctx)
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{
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int ret = 0;
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event->state = PERF_EVENT_STATE_ACTIVE;
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event->oncpu = smp_processor_id();
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event->tstamp_running += event->ctx->time - event->tstamp_stopped;
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if (!is_x86_event(event))
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ret = event->pmu->enable(event);
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if (!ret && !is_software_event(event))
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cpuctx->active_oncpu++;
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if (!ret && event->attr.exclusive)
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cpuctx->exclusive = 1;
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return ret;
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}
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static void x86_event_sched_out(struct perf_event *event,
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struct perf_cpu_context *cpuctx)
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{
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event->state = PERF_EVENT_STATE_INACTIVE;
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event->oncpu = -1;
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if (!is_x86_event(event))
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event->pmu->disable(event);
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event->tstamp_running -= event->ctx->time - event->tstamp_stopped;
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if (!is_software_event(event))
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cpuctx->active_oncpu--;
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if (event->attr.exclusive || !cpuctx->active_oncpu)
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cpuctx->exclusive = 0;
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}
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/*
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* Called to enable a whole group of events.
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* Returns 1 if the group was enabled, or -EAGAIN if it could not be.
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* Assumes the caller has disabled interrupts and has
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* frozen the PMU with hw_perf_save_disable.
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*
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* called with PMU disabled. If successful and return value 1,
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* then guaranteed to call perf_enable() and hw_perf_enable()
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*/
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int hw_perf_group_sched_in(struct perf_event *leader,
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struct perf_cpu_context *cpuctx,
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struct perf_event_context *ctx)
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{
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struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
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struct perf_event *sub;
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int assign[X86_PMC_IDX_MAX];
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int n0, n1, ret;
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if (!x86_pmu_initialized())
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return 0;
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/* n0 = total number of events */
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n0 = collect_events(cpuc, leader, true);
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if (n0 < 0)
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return n0;
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ret = x86_pmu.schedule_events(cpuc, n0, assign);
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if (ret)
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return ret;
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ret = x86_event_sched_in(leader, cpuctx);
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if (ret)
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return ret;
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n1 = 1;
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list_for_each_entry(sub, &leader->sibling_list, group_entry) {
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if (sub->state > PERF_EVENT_STATE_OFF) {
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ret = x86_event_sched_in(sub, cpuctx);
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if (ret)
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goto undo;
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++n1;
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}
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}
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/*
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* copy new assignment, now we know it is possible
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* will be used by hw_perf_enable()
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*/
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memcpy(cpuc->assign, assign, n0*sizeof(int));
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cpuc->n_events = n0;
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cpuc->n_added += n1;
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ctx->nr_active += n1;
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/*
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* 1 means successful and events are active
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* This is not quite true because we defer
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* actual activation until hw_perf_enable() but
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* this way we* ensure caller won't try to enable
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* individual events
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*/
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return 1;
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undo:
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x86_event_sched_out(leader, cpuctx);
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n0 = 1;
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list_for_each_entry(sub, &leader->sibling_list, group_entry) {
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if (sub->state == PERF_EVENT_STATE_ACTIVE) {
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x86_event_sched_out(sub, cpuctx);
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if (++n0 == n1)
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break;
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}
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}
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return ret;
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}
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#include "perf_event_amd.c"
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#include "perf_event_p6.c"
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#include "perf_event_p4.c"
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@ -1471,6 +1369,59 @@ static inline void x86_pmu_read(struct perf_event *event)
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x86_perf_event_update(event);
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}
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/*
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* Start group events scheduling transaction
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* Set the flag to make pmu::enable() not perform the
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* schedulability test, it will be performed at commit time
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*/
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static void x86_pmu_start_txn(const struct pmu *pmu)
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{
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struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
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cpuc->group_flag |= PERF_EVENT_TXN_STARTED;
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}
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/*
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* Stop group events scheduling transaction
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* Clear the flag and pmu::enable() will perform the
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* schedulability test.
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*/
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static void x86_pmu_cancel_txn(const struct pmu *pmu)
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{
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struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
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cpuc->group_flag &= ~PERF_EVENT_TXN_STARTED;
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}
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/*
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* Commit group events scheduling transaction
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* Perform the group schedulability test as a whole
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* Return 0 if success
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*/
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static int x86_pmu_commit_txn(const struct pmu *pmu)
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{
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struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
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int assign[X86_PMC_IDX_MAX];
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int n, ret;
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n = cpuc->n_events;
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if (!x86_pmu_initialized())
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return -EAGAIN;
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ret = x86_pmu.schedule_events(cpuc, n, assign);
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if (ret)
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return ret;
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/*
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* copy new assignment, now we know it is possible
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* will be used by hw_perf_enable()
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*/
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memcpy(cpuc->assign, assign, n*sizeof(int));
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return 0;
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}
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static const struct pmu pmu = {
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.enable = x86_pmu_enable,
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.disable = x86_pmu_disable,
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@ -1478,6 +1429,9 @@ static const struct pmu pmu = {
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.stop = x86_pmu_stop,
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.read = x86_pmu_read,
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.unthrottle = x86_pmu_unthrottle,
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.start_txn = x86_pmu_start_txn,
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.cancel_txn = x86_pmu_cancel_txn,
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.commit_txn = x86_pmu_commit_txn,
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};
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/*
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