[CPUFREQ] p4-clockmod: add more CPUs
Several more Intel CPUs are now capable using the p4-clockmod cpufreq driver. As it is of limited use most of the time, print a big bold warning if a better cpufreq driver might be available. Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Dave Jones <davej@redhat.com>
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@ -163,29 +163,27 @@ static int cpufreq_p4_verify(struct cpufreq_policy *policy)
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static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
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static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
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{
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{
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if ((c->x86 == 0x06) && (c->x86_model == 0x09)) {
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if (c->x86 == 0x06) {
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/* Pentium M (Banias) */
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if (cpu_has(c, X86_FEATURE_EST))
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printk(KERN_WARNING PFX "Warning: Pentium M detected. "
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printk(KERN_WARNING PFX "Warning: EST-capable CPU detected. "
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"The speedstep_centrino module offers voltage scaling"
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"The acpi-cpufreq module offers voltage scaling"
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" in addition of frequency scaling. You should use "
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" in addition of frequency scaling. You should use "
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"that instead of p4-clockmod, if possible.\n");
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"that instead of p4-clockmod, if possible.\n");
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return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM);
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switch (c->x86_model) {
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}
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case 0x0E: /* Core */
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case 0x0F: /* Core Duo */
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if ((c->x86 == 0x06) && (c->x86_model == 0x0D)) {
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p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
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/* Pentium M (Dothan) */
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return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PCORE);
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printk(KERN_WARNING PFX "Warning: Pentium M detected. "
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case 0x0D: /* Pentium M (Dothan) */
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"The speedstep_centrino module offers voltage scaling"
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p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
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" in addition of frequency scaling. You should use "
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/* fall through */
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"that instead of p4-clockmod, if possible.\n");
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case 0x09: /* Pentium M (Banias) */
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/* on P-4s, the TSC runs with constant frequency independent whether
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return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM);
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* throttling is active or not. */
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}
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p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
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return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM);
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}
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}
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if (c->x86 != 0xF) {
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if (c->x86 != 0xF) {
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printk(KERN_WARNING PFX "Unknown p4-clockmod-capable CPU. Please send an e-mail to <linux@brodo.de>\n");
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printk(KERN_WARNING PFX "Unknown p4-clockmod-capable CPU. Please send an e-mail to <cpufreq@lists.linux.org.uk>\n");
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return 0;
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return 0;
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}
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}
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@ -123,6 +123,36 @@ static unsigned int pentiumM_get_frequency(void)
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return (msr_tmp * 100 * 1000);
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return (msr_tmp * 100 * 1000);
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}
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}
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static unsigned int pentium_core_get_frequency(void)
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{
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u32 fsb = 0;
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u32 msr_lo, msr_tmp;
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rdmsr(MSR_FSB_FREQ, msr_lo, msr_tmp);
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/* see table B-2 of 24547212.pdf */
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switch (msr_lo & 0x07) {
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case 5:
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fsb = 400;
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break;
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case 1:
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fsb = 533;
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break;
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case 3:
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fsb = 667;
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break;
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default:
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printk(KERN_ERR "PCORE - MSR_FSB_FREQ undefined value");
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}
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rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
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dprintk("PCORE - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n", msr_lo, msr_tmp);
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msr_tmp = (msr_lo >> 22) & 0x1f;
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dprintk("bits 22-26 are 0x%x, speed is %u\n", msr_tmp, (msr_tmp * fsb * 1000));
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return (msr_tmp * fsb * 1000);
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}
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static unsigned int pentium4_get_frequency(void)
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static unsigned int pentium4_get_frequency(void)
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{
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{
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@ -174,6 +204,8 @@ static unsigned int pentium4_get_frequency(void)
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unsigned int speedstep_get_processor_frequency(unsigned int processor)
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unsigned int speedstep_get_processor_frequency(unsigned int processor)
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{
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{
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switch (processor) {
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switch (processor) {
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case SPEEDSTEP_PROCESSOR_PCORE:
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return pentium_core_get_frequency();
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case SPEEDSTEP_PROCESSOR_PM:
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case SPEEDSTEP_PROCESSOR_PM:
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return pentiumM_get_frequency();
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return pentiumM_get_frequency();
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case SPEEDSTEP_PROCESSOR_P4D:
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case SPEEDSTEP_PROCESSOR_P4D:
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@ -22,6 +22,7 @@
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* the speedstep_get_processor_frequency() call. */
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* the speedstep_get_processor_frequency() call. */
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#define SPEEDSTEP_PROCESSOR_PM 0xFFFFFF03 /* Pentium M */
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#define SPEEDSTEP_PROCESSOR_PM 0xFFFFFF03 /* Pentium M */
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#define SPEEDSTEP_PROCESSOR_P4D 0xFFFFFF04 /* desktop P4 */
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#define SPEEDSTEP_PROCESSOR_P4D 0xFFFFFF04 /* desktop P4 */
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#define SPEEDSTEP_PROCESSOR_PCORE 0xFFFFFF05 /* Core */
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/* speedstep states -- only two of them */
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/* speedstep states -- only two of them */
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@ -95,6 +95,8 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val)
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#define MSR_P6_PERFCTR0 0xc1
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#define MSR_P6_PERFCTR0 0xc1
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#define MSR_P6_PERFCTR1 0xc2
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#define MSR_P6_PERFCTR1 0xc2
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#define MSR_FSB_FREQ 0xcd
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#define MSR_IA32_BBL_CR_CTL 0x119
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#define MSR_IA32_BBL_CR_CTL 0x119
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