media: hantro: Fix overfill bottom register field name
[ Upstream commit89d78e0133
] The Hantro H1 hardware can crop off pixels from the right and bottom of the source frame. These are controlled with the H1_REG_IN_IMG_CTRL_OVRFLB and H1_REG_IN_IMG_CTRL_OVRFLR in the H1_REG_IN_IMG_CTRL register. The ChromeOS kernel driver that this was based on incorrectly added the _D4 suffix H1_REG_IN_IMG_CTRL_OVRFLB. This field crops the bottom of the input frame, and the number is _not_ divided by 4. [1] Correct the name to avoid confusion when crop support with the selection API is added. [1] https://chromium.googlesource.com/chromiumos/third_party/kernel/+/refs/ \ heads/chromeos-4.19/drivers/staging/media/hantro/hantro_h1_vp8_enc.c#377 Fixes:775fec6900
("media: add Rockchip VPU JPEG encoder driver") Fixes:a29add8c9b
("media: rockchip/vpu: rename from rockchip to hantro") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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Родитель
b0b890dd8d
Коммит
4ea5483120
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@ -23,7 +23,7 @@ static void hantro_h1_set_src_img_ctrl(struct hantro_dev *vpu,
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reg = H1_REG_IN_IMG_CTRL_ROW_LEN(pix_fmt->width)
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reg = H1_REG_IN_IMG_CTRL_ROW_LEN(pix_fmt->width)
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| H1_REG_IN_IMG_CTRL_OVRFLR_D4(0)
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| H1_REG_IN_IMG_CTRL_OVRFLR_D4(0)
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| H1_REG_IN_IMG_CTRL_OVRFLB_D4(0)
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| H1_REG_IN_IMG_CTRL_OVRFLB(0)
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| H1_REG_IN_IMG_CTRL_FMT(ctx->vpu_src_fmt->enc_fmt);
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| H1_REG_IN_IMG_CTRL_FMT(ctx->vpu_src_fmt->enc_fmt);
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vepu_write_relaxed(vpu, reg, H1_REG_IN_IMG_CTRL);
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vepu_write_relaxed(vpu, reg, H1_REG_IN_IMG_CTRL);
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}
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}
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@ -47,7 +47,7 @@
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#define H1_REG_IN_IMG_CTRL 0x03c
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#define H1_REG_IN_IMG_CTRL 0x03c
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#define H1_REG_IN_IMG_CTRL_ROW_LEN(x) ((x) << 12)
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#define H1_REG_IN_IMG_CTRL_ROW_LEN(x) ((x) << 12)
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#define H1_REG_IN_IMG_CTRL_OVRFLR_D4(x) ((x) << 10)
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#define H1_REG_IN_IMG_CTRL_OVRFLR_D4(x) ((x) << 10)
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#define H1_REG_IN_IMG_CTRL_OVRFLB_D4(x) ((x) << 6)
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#define H1_REG_IN_IMG_CTRL_OVRFLB(x) ((x) << 6)
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#define H1_REG_IN_IMG_CTRL_FMT(x) ((x) << 2)
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#define H1_REG_IN_IMG_CTRL_FMT(x) ((x) << 2)
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#define H1_REG_ENC_CTRL0 0x040
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#define H1_REG_ENC_CTRL0 0x040
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#define H1_REG_ENC_CTRL0_INIT_QP(x) ((x) << 26)
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#define H1_REG_ENC_CTRL0_INIT_QP(x) ((x) << 26)
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