media updates for v6.4-rc1
-----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+QmuaPwR3wnBdVwACF8+vY7k4RUFAmRHgagACgkQCF8+vY7k 4RWmZQ//dcAgFS36a86xhEzyXZUeUmXly1hd8fzZsxEhYniIitIKGqVkEXPfqPaK JkQQ4t/NJVXQNajZjJaUlPpb/ssxV8jIJiOPdWfUZi0sa4mlllLunv1wu9EMlP9S ED46kFWA5aM39PUCIIgmnj+3qovWP8bhywhn/6iE+XCHtXcLWGRIQLWFAjRjwLSM sFvejrh//uYXWoaZxtVZ6RgU9XR37ekI1h2TiU3I4HMt2v/ytqS8AByNCxhfdB5d v+2Kuob6D6vgik2+HCayKjJqv0/2OT7mJELqUOh2zJdgua4fwJgu4hqK6CqUaarT bP5ycCKs+8QGnf7a83rN2Ul9HbF28v23gCJDUp/x229ScPPmcglyXHXx2mjgcArf blMMdswSF2ya4AbOGfRM2/roHghZDl3CK86l4ylU8Wgehvftip6FgktWDXtKy+iM hogFDBn72V8p2mvkUMDXBHQmS3H4YYRWO2LRLXlgcMDfjh79Mrj7YpvC+ceyE8Z1 +Qc+uTxOeA9v9yE8Axs/VV0gsUsUEkmRdoFZ2x+lCYUMLxarz+qxtfTX3W6D3eFH xIJVt+Mz7K/LarUTNKo+qqXRTyuw2HevIvWmpZ2g4stID0u889WPeVQMZJVz0hns N/DnWrIeM9dtbHfZiNK7q7bpO98PI3GgQR2fj9HtuQcJoaRIp08= =ocor -----END PGP SIGNATURE----- Merge tag 'media/v6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media Pull media updates from Mauro Carvalho Chehab: - Removal of some old unused sensor drivers: ad9389b, m5mols, mt9m032, mt9t001, noon010pc30, s5k6aa, sr030pc30 and vs6624 - New i.MX8 image sensor interface driver - Some new RC keymaps - lots of cleanups at atomisp driver to make it support standard features present on other webcam drivers - the cx18 and saa7146 now uses VB2 - lots of cleanups and driver improvements * tag 'media/v6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (460 commits) media: ov5670: Fix probe on ACPI media: nxp: imx8-isi: Remove 300ms sleep after enabling channel media: nxp: imx8-isi: Replace udelay() with fsleep() media: nxp: imx8-isi: Drop partial support for i.MX8QM and i.MX8QXP media: nxp: Add i.MX8 ISI driver media: dt-bindings: media: Add i.MX8 ISI DT bindings media: atomisp: gmin_platform: Add Lenovo Ideapad Miix 310 gmin_vars media: atomisp: gmin_platform: Make DMI quirks take precedence over the _DSM table media: atomisp: Remove struct atomisp_sub_device index field media: atomisp: Drop support for streaming from 2 sensors at once media: atomisp: Remove atomisp_try_fmt() call from atomisp_set_fmt() media: atomisp: Remove unused ATOM_ISP_MAX_WIDTH_TMP and ATOM_ISP_MAX_HEIGHT_TMP media: atomisp: Remove snr_mbus_fmt local var from atomisp_try_fmt() media: atomisp: Remove custom V4L2_CID_FMT_AUTO control media: atomisp: Remove continuous mode related code from atomisp_set_fmt() media: atomisp: Remove duplicate atomisp_[start|stop]_streaming() prototypes media: atomisp: gc0310: Switch over to ACPI powermanagement media: atomisp: gc0310: Use devm_kzalloc() for data struct media: atomisp: gc0310: Add runtime-pm support media: atomisp: gc0310: Delay power-on till streaming is started ...
This commit is contained in:
Linus Torvalds
Коммит
4ea956963f
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@ -55,6 +55,15 @@ Miscellaneous:
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you can control the CEC line through this driver. This supports error
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injection as well.
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- cec-gpio and Allwinner A10 (or any other driver that uses the CEC pin
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framework to drive the CEC pin directly): the CEC pin framework uses
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high-resolution timers. These timers are affected by NTP daemons that
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speed up or slow down the clock to sync with the official time. The
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chronyd server will by default increase or decrease the clock by
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1/12th. This will cause the CEC timings to go out of spec. To fix this,
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add a 'maxslewrate 40000' line to chronyd.conf. This limits the clock
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frequency change to 1/25th, which keeps the CEC timings within spec.
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Utilities
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=========
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@ -296,69 +305,71 @@ broadcast messages twice to reduce the chance of them being lost. Specifically
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Making a CEC debugger
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=====================
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By using a Raspberry Pi 2B/3/4 and some cheap components you can make
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By using a Raspberry Pi 4B and some cheap components you can make
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your own low-level CEC debugger.
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Here is a picture of my setup:
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https://hverkuil.home.xs4all.nl/rpi3-cec.jpg
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It's a Raspberry Pi 3 together with a breadboard and some breadboard wires:
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http://www.dx.com/p/diy-40p-male-to-female-male-to-male-female-to-female-dupont-line-wire-3pcs-356089#.WYLOOXWGN7I
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Finally on of these HDMI female-female passthrough connectors (full soldering type 1):
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The critical component is one of these HDMI female-female passthrough connectors
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(full soldering type 1):
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https://elabbay.myshopify.com/collections/camera/products/hdmi-af-af-v1a-hdmi-type-a-female-to-hdmi-type-a-female-pass-through-adapter-breakout-board?variant=45533926147
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We've tested this and it works up to 4kp30 (297 MHz). The quality is not high
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enough to pass-through 4kp60 (594 MHz).
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The video quality is variable and certainly not enough to pass-through 4kp60
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(594 MHz) video. You might be able to support 4kp30, but more likely you will
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be limited to 1080p60 (148.5 MHz). But for CEC testing that is fine.
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I also added an RTC and a breakout shield:
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You need a breadboard and some breadboard wires:
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https://www.amazon.com/Makerfire%C2%AE-Raspberry-Module-DS1307-Battery/dp/B00ZOXWHK4
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http://www.dx.com/p/diy-40p-male-to-female-male-to-male-female-to-female-dupont-line-wire-3pcs-356089#.WYLOOXWGN7I
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https://www.dx.com/p/raspberry-pi-gpio-expansion-board-breadboard-easy-multiplexing-board-one-to-three-with-screw-for-raspberry-pi-2-3-b-b-2729992.html#.YGRCG0MzZ7I
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These two are not needed but they make life a bit easier.
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If you want to monitor the HPD line as well, then you need one of these
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level shifters:
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If you want to monitor the HPD and/or 5V lines as well, then you need one of
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these 5V to 3.3V level shifters:
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https://www.adafruit.com/product/757
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(This is just where I got these components, there are many other places you
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can get similar things).
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The CEC pin of the HDMI connector needs to be connected to these pins:
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CE0/IO8 and CE1/IO7 (pull-up GPIOs). The (optional) HPD pin of the HDMI
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connector should be connected (via a level shifter to convert the 5V
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to 3.3V) to these pins: IO17 and IO27. The (optional) 5V pin of the HDMI
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connector should be connected (via a level shifter) to these pins: IO22
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and IO24. Monitoring the HPD an 5V lines is not necessary, but it is helpful.
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The ground pin of the HDMI connector needs to be connected to a ground
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pin of the Raspberry Pi, of course.
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This kernel patch will hook up the cec-gpio driver correctly to
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e.g. ``arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts``::
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The CEC pin of the HDMI connector needs to be connected to these pins:
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GPIO 6 and GPIO 7. The optional HPD pin of the HDMI connector should
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be connected via the level shifter to these pins: GPIO 23 and GPIO 12.
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The optional 5V pin of the HDMI connector should be connected via the
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level shifter to these pins: GPIO 25 and GPIO 22. Monitoring the HPD and
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5V lines is not necessary, but it is helpful.
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This device tree addition in ``arch/arm/boot/dts/bcm2711-rpi-4-b.dts``
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will hook up the cec-gpio driver correctly::
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cec@6 {
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compatible = "cec-gpio";
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cec-gpios = <&gpio 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
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hpd-gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
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v5-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
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};
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cec@7 {
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compatible = "cec-gpio";
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cec-gpios = <&gpio 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
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hpd-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
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hpd-gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
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v5-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
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};
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cec@8 {
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compatible = "cec-gpio";
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cec-gpios = <&gpio 8 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
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hpd-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
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v5-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
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};
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If you haven't hooked up the HPD and/or 5V lines, then just delete those
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lines.
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This dts change will enable two cec GPIO devices: I typically use one to
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send/receive CEC commands and the other to monitor. If you monitor using
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an unconfigured CEC adapter then it will use GPIO interrupts which makes
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monitoring very accurate.
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If you just want to monitor traffic, then a single instance is sufficient.
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The minimum configuration is one HDMI female-female passthrough connector
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and two female-female breadboard wires: one for connecting the HDMI ground
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pin to a ground pin on the Raspberry Pi, and the other to connect the HDMI
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CEC pin to GPIO 6 on the Raspberry Pi.
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The documentation on how to use the error injection is here: :ref:`cec_pin_error_inj`.
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``cec-ctl --monitor-pin`` will do low-level CEC bus sniffing and analysis.
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@ -72,17 +72,13 @@ imx319 Sony IMX319 sensor
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imx334 Sony IMX334 sensor
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imx355 Sony IMX355 sensor
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imx412 Sony IMX412 sensor
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m5mols Fujitsu M-5MOLS 8MP sensor
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mt9m001 mt9m001
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mt9m032 MT9M032 camera sensor
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mt9m111 mt9m111, mt9m112 and mt9m131
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mt9p031 Aptina MT9P031
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mt9t001 Aptina MT9T001
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mt9t112 Aptina MT9T111/MT9T112
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mt9v011 Micron mt9v011 sensor
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mt9v032 Micron MT9V032 sensor
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mt9v111 Aptina MT9V111 sensor
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noon010pc30 Siliconfile NOON010PC30 sensor
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ov13858 OmniVision OV13858 sensor
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ov13b10 OmniVision OV13B10 sensor
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ov2640 OmniVision OV2640 sensor
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@ -109,9 +105,6 @@ s5c73m3 Samsung S5C73M3 sensor
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s5k4ecgx Samsung S5K4ECGX sensor
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s5k5baf Samsung S5K5BAF sensor
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s5k6a3 Samsung S5K6A3 sensor
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s5k6aa Samsung S5K6AAFX sensor
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sr030pc30 Siliconfile SR030PC30 sensor
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vs6624 ST VS6624 sensor
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============ ==========================================================
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Flash devices
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@ -222,7 +215,6 @@ Video encoders
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============ ==========================================================
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Driver Name
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============ ==========================================================
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ad9389b Analog Devices AD9389B encoder
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adv7170 Analog Devices ADV7170 video encoder
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adv7175 Analog Devices ADV7175 video encoder
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adv7343 ADV7343 video encoder
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@ -11,7 +11,7 @@ maintainers:
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- Maxime Ripard <mripard@kernel.org>
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allOf:
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- $ref: "rc.yaml#"
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- $ref: rc.yaml#
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properties:
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compatible:
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@ -2,8 +2,8 @@
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/media/allwinner,sun50i-h6-vpu-g2.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/media/allwinner,sun50i-h6-vpu-g2.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Hantro G2 VPU codec implemented on Allwinner H6 SoC
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@ -2,8 +2,8 @@
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# Copyright 2020 BayLibre, SAS
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/media/amlogic,axg-ge2d.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/media/amlogic,axg-ge2d.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic GE2D Acceleration Unit
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@ -2,8 +2,8 @@
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# Copyright 2019 BayLibre, SAS
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/media/amlogic,gx-vdec.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/media/amlogic,gx-vdec.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic Video Decoder
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@ -2,8 +2,8 @@
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/media/amlogic,meson-ir-tx.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/media/amlogic,meson-ir-tx.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic Meson IR transmitter
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@ -0,0 +1,47 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/amlogic,meson6-ir.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic Meson IR remote control receiver
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maintainers:
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- Neil Armstrong <neil.armstrong@linaro.org>
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allOf:
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- $ref: rc.yaml#
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properties:
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compatible:
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oneOf:
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- enum:
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- amlogic,meson6-ir
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- amlogic,meson8b-ir
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- amlogic,meson-gxbb-ir
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- items:
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- const: amlogic,meson-gx-ir
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- const: amlogic,meson-gxbb-ir
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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ir-receiver@c8100480 {
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compatible = "amlogic,meson6-ir";
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reg = <0xc8100480 0x20>;
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interrupts = <GIC_SPI 15 IRQ_TYPE_EDGE_RISING>;
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};
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@ -1,16 +0,0 @@
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Exynos4x12/Exynos5 SoC series camera host interface (FIMC-LITE)
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Required properties:
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- compatible : should be one of:
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"samsung,exynos4212-fimc-lite" for Exynos4212/4412 SoCs,
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"samsung,exynos5250-fimc-lite" for Exynos5250 compatible
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devices;
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- reg : physical base address and size of the device memory mapped
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registers;
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- interrupts : should contain FIMC-LITE interrupt;
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- clocks : FIMC LITE gate clock should be specified in this property.
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- clock-names : should contain "flite" entry.
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Each FIMC device should have an alias in the aliases node, in the form of
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fimc-lite<n>, where <n> is an integer specifying the IP block instance.
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@ -1,50 +0,0 @@
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Exynos4x12 SoC series Imaging Subsystem (FIMC-IS)
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The FIMC-IS is a subsystem for processing image signal from an image sensor.
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The Exynos4x12 SoC series FIMC-IS V1.5 comprises of a dedicated ARM Cortex-A5
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processor, ISP, DRC and FD IP blocks and peripheral devices such as UART, I2C
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and SPI bus controllers, PWM and ADC.
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fimc-is node
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------------
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Required properties:
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- compatible : should be "samsung,exynos4212-fimc-is" for Exynos4212 and
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Exynos4412 SoCs;
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- reg : physical base address and length of the registers set;
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- interrupts : must contain two FIMC-IS interrupts, in order: ISP0, ISP1;
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- clocks : list of clock specifiers, corresponding to entries in
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clock-names property;
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- clock-names : must contain "ppmuispx", "ppmuispx", "lite0", "lite1"
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"mpll", "sysreg", "isp", "drc", "fd", "mcuisp", "gicisp",
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"pwm_isp", "mcuctl_isp", "uart", "ispdiv0", "ispdiv1",
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"mcuispdiv0", "mcuispdiv1", "aclk200", "div_aclk200",
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"aclk400mcuisp", "div_aclk400mcuisp" entries,
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matching entries in the clocks property.
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pmu subnode
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-----------
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Required properties:
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- reg : must contain PMU physical base address and size of the register set.
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||||
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||||
The following are the FIMC-IS peripheral device nodes and can be specified
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||||
either standalone or as the fimc-is node child nodes.
|
||||
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||||
i2c-isp (ISP I2C bus controller) nodes
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||||
------------------------------------------
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||||
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||||
Required properties:
|
||||
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||||
- compatible : should be "samsung,exynos4212-i2c-isp" for Exynos4212 and
|
||||
Exynos4412 SoCs;
|
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- reg : physical base address and length of the registers set;
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- clocks : must contain gate clock specifier for this controller;
|
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- clock-names : must contain "i2c_isp" entry.
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||||
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||||
For the above nodes it is required to specify a pinctrl state named "default",
|
||||
according to the pinctrl bindings defined in ../pinctrl/pinctrl-bindings.txt.
|
||||
|
||||
Device tree nodes of the image sensors' controlled directly by the FIMC-IS
|
||||
firmware must be child nodes of their corresponding ISP I2C bus controller node.
|
||||
The data link of these image sensors must be specified using the common video
|
||||
interfaces bindings, defined in video-interfaces.txt.
|
||||
|
|
@ -23,6 +23,9 @@ properties:
|
|||
description: autosuspend delay time in milliseconds
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
wakeup-source:
|
||||
description: IR receiver can wake-up the system.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- gpios
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/i2c/chrontel,ch7322.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/i2c/chrontel,ch7322.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Chrontel HDMI-CEC Controller
|
||||
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@ properties:
|
|||
dongwoon,aac-mode:
|
||||
description:
|
||||
Indication of AAC mode select.
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum:
|
||||
- 1 # AAC2 mode(operation time# 0.48 x Tvib)
|
||||
- 2 # AAC3 mode(operation time# 0.70 x Tvib)
|
||||
|
|
@ -50,7 +50,7 @@ properties:
|
|||
description:
|
||||
Number of AAC Timing count that controlled by one 6-bit period of
|
||||
vibration register AACT[5:0], the unit of which is 100 us.
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 0x20
|
||||
minimum: 0x00
|
||||
maximum: 0x3f
|
||||
|
|
@ -59,7 +59,7 @@ properties:
|
|||
description:
|
||||
Indication of VCM internal clock dividing rate select, as one multiple
|
||||
factor to calculate VCM ring periodic time Tvib.
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum:
|
||||
- 0 # Dividing Rate - 2
|
||||
- 1 # Dividing Rate - 1
|
||||
|
|
|
|||
|
|
@ -86,7 +86,7 @@ properties:
|
|||
is 100000 micro volts
|
||||
|
||||
maxim,gpio-poc:
|
||||
$ref: '/schemas/types.yaml#/definitions/uint32-array'
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
description: |
|
||||
|
|
|
|||
|
|
@ -1,41 +0,0 @@
|
|||
* Omnivision OV2685 MIPI CSI-2 sensor
|
||||
|
||||
Required Properties:
|
||||
- compatible: shall be "ovti,ov2685"
|
||||
- clocks: reference to the xvclk input clock
|
||||
- clock-names: shall be "xvclk"
|
||||
- avdd-supply: Analog voltage supply, 2.8 volts
|
||||
- dovdd-supply: Digital I/O voltage supply, 1.8 volts
|
||||
- dvdd-supply: Digital core voltage supply, 1.8 volts
|
||||
- reset-gpios: Low active reset gpio
|
||||
|
||||
The device node shall contain one 'port' child node with an
|
||||
'endpoint' subnode for its digital output video port,
|
||||
in accordance with the video interface bindings defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
The endpoint optional property 'data-lanes' shall be "<1>".
|
||||
|
||||
Example:
|
||||
&i2c7 {
|
||||
ov2685: camera-sensor@3c {
|
||||
compatible = "ovti,ov2685";
|
||||
reg = <0x3c>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&clk_24m_cam>;
|
||||
|
||||
clocks = <&cru SCLK_TESTCLKOUT1>;
|
||||
clock-names = "xvclk";
|
||||
|
||||
avdd-supply = <&pp2800_cam>;
|
||||
dovdd-supply = <&pp1800>;
|
||||
dvdd-supply = <&pp1800>;
|
||||
reset-gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
|
||||
|
||||
port {
|
||||
ucam_out: endpoint {
|
||||
remote-endpoint = <&mipi_in_ucam>;
|
||||
data-lanes = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Omnivision OV8856 CMOS Sensor
|
||||
|
||||
maintainers:
|
||||
- Dongchun Zhu <dongchun.zhu@mediatek.com>
|
||||
- Sakari Ailus <sakari.ailus@linux.intel.com>
|
||||
|
||||
description: |-
|
||||
The Omnivision OV8856 is a high performance, 1/4-inch, 8 megapixel, CMOS
|
||||
|
|
|
|||
|
|
@ -88,7 +88,7 @@ properties:
|
|||
properties:
|
||||
link-frequencies: true
|
||||
ovti,mipi-clock-voltage:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
Definition of MIPI clock voltage unit. This entry corresponds to
|
||||
the link speed defined by the 'link-frequencies' property.
|
||||
|
|
|
|||
|
|
@ -0,0 +1,101 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/i2c/ovti,ov2685.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: OmniVision OV2685 Image Sensor
|
||||
|
||||
maintainers:
|
||||
- Shunqian Zheng <zhengsq@rock-chips.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: ovti,ov2685
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: XVCLK clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: xvclk
|
||||
|
||||
dvdd-supply:
|
||||
description: Digital Domain Power Supply
|
||||
|
||||
avdd-supply:
|
||||
description: Analog Domain Power Supply
|
||||
|
||||
dovdd-supply:
|
||||
description: I/O Domain Power Supply
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
description: Reset Pin GPIO Control (active low)
|
||||
|
||||
port:
|
||||
description: MIPI CSI-2 transmitter port
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
endpoint:
|
||||
$ref: /schemas/media/video-interfaces.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
data-lanes:
|
||||
maxItems: 2
|
||||
|
||||
required:
|
||||
- data-lanes
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- dvdd-supply
|
||||
- avdd-supply
|
||||
- dovdd-supply
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/rk3399-cru.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ov2685: camera-sensor@3c {
|
||||
compatible = "ovti,ov2685";
|
||||
reg = <0x3c>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&clk_24m_cam>;
|
||||
|
||||
clocks = <&cru SCLK_TESTCLKOUT1>;
|
||||
clock-names = "xvclk";
|
||||
|
||||
avdd-supply = <&pp2800_cam>;
|
||||
dovdd-supply = <&pp1800>;
|
||||
dvdd-supply = <&pp1800>;
|
||||
reset-gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
|
||||
|
||||
port {
|
||||
ucam_out: endpoint {
|
||||
remote-endpoint = <&mipi_in_ucam>;
|
||||
data-lanes = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -0,0 +1,101 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/i2c/samsung,s5k5baf.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung S5K5BAF UXGA 1/5" 2M CMOS Image Sensor with embedded SoC ISP
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: samsung,s5k5baf
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: mclk
|
||||
|
||||
clock-frequency:
|
||||
default: 24000000
|
||||
description: mclk clock frequency
|
||||
|
||||
rstn-gpios:
|
||||
maxItems: 1
|
||||
description: RSTN pin
|
||||
|
||||
stbyn-gpios:
|
||||
maxItems: 1
|
||||
description: STDBYN pin
|
||||
|
||||
vdda-supply:
|
||||
description: Analog power supply 2.8V (2.6V to 3.0V)
|
||||
|
||||
vddio-supply:
|
||||
description: I/O power supply 1.8V (1.65V to 1.95V) or 2.8V (2.5V to 3.1V)
|
||||
|
||||
vddreg-supply:
|
||||
description:
|
||||
Regulator input power supply 1.8V (1.7V to 1.9V) or 2.8V (2.6V to 3.0)
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
endpoint:
|
||||
$ref: /schemas/media/video-interfaces.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
data-lanes:
|
||||
items:
|
||||
- const: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- clock-names
|
||||
- rstn-gpios
|
||||
- stbyn-gpios
|
||||
- vdda-supply
|
||||
- vddio-supply
|
||||
- vddreg-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sensor@2d {
|
||||
compatible = "samsung,s5k5baf";
|
||||
reg = <0x2d>;
|
||||
clocks = <&camera 0>;
|
||||
clock-names = "mclk";
|
||||
clock-frequency = <24000000>;
|
||||
rstn-gpios = <&gpl2 1 GPIO_ACTIVE_LOW>;
|
||||
stbyn-gpios = <&gpl2 0 GPIO_ACTIVE_LOW>;
|
||||
vdda-supply = <&cam_io_en_reg>;
|
||||
vddio-supply = <&vtcam_reg>;
|
||||
vddreg-supply = <&vt_core_15v_reg>;
|
||||
|
||||
port {
|
||||
endpoint {
|
||||
remote-endpoint = <&csis1_ep>;
|
||||
data-lanes = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,98 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/i2c/samsung,s5k6a3.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung S5K6A3(YX) raw image sensor
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
|
||||
description:
|
||||
S5K6A3(YX) is a raw image sensor with MIPI CSI-2 and CCP2 image data
|
||||
interfaces and CCI (I2C compatible) control bus.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: samsung,s5k6a3
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: extclk
|
||||
|
||||
clock-frequency:
|
||||
default: 24000000
|
||||
description: extclk clock frequency
|
||||
|
||||
gpios:
|
||||
maxItems: 1
|
||||
description: GPIO connected to the RESET pin
|
||||
|
||||
afvdd-supply:
|
||||
description: AF (actuator) voltage supply
|
||||
|
||||
svdda-supply:
|
||||
description: Core voltage supply
|
||||
|
||||
svddio-supply:
|
||||
description: I/O voltage supply
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
endpoint:
|
||||
$ref: /schemas/media/video-interfaces.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
data-lanes:
|
||||
items:
|
||||
- const: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- clock-names
|
||||
- gpios
|
||||
- afvdd-supply
|
||||
- svdda-supply
|
||||
- svddio-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sensor@10 {
|
||||
compatible = "samsung,s5k6a3";
|
||||
reg = <0x10>;
|
||||
clock-frequency = <24000000>;
|
||||
clocks = <&camera 1>;
|
||||
clock-names = "extclk";
|
||||
gpios = <&gpm1 6 GPIO_ACTIVE_LOW>;
|
||||
afvdd-supply = <&ldo19_reg>;
|
||||
svdda-supply = <&cam_io_reg>;
|
||||
svddio-supply = <&ldo19_reg>;
|
||||
|
||||
port {
|
||||
endpoint {
|
||||
remote-endpoint = <&csis1_ep>;
|
||||
data-lanes = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -12,15 +12,26 @@ maintainers:
|
|||
|
||||
description: |-
|
||||
The Sony IMX290 is a 1/2.8-Inch CMOS Solid-state image sensor with Square
|
||||
Pixel for Color Cameras. It is programmable through I2C and 4-wire
|
||||
interfaces. The sensor output is available via CMOS logic parallel SDR
|
||||
output, Low voltage LVDS DDR output and CSI-2 serial data output. The CSI-2
|
||||
bus is the default. No bindings have been defined for the other busses.
|
||||
Pixel, available in either mono or colour variants. It is programmable
|
||||
through I2C and 4-wire interfaces.
|
||||
|
||||
The sensor output is available via CMOS logic parallel SDR output, Low voltage
|
||||
LVDS DDR output and CSI-2 serial data output. The CSI-2 bus is the default.
|
||||
No bindings have been defined for the other busses.
|
||||
|
||||
imx290lqr is the full model identifier for the colour variant. "sony,imx290"
|
||||
is treated the same as this as it was the original compatible string.
|
||||
imx290llr is the mono version of the sensor.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- sony,imx290
|
||||
oneOf:
|
||||
- enum:
|
||||
- sony,imx290lqr # Colour
|
||||
- sony,imx290llr # Monochrome
|
||||
- sony,imx327lqr # Colour
|
||||
- const: sony,imx290
|
||||
deprecated: true
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
@ -101,7 +112,7 @@ examples:
|
|||
#size-cells = <0>;
|
||||
|
||||
imx290: camera-sensor@1a {
|
||||
compatible = "sony,imx290";
|
||||
compatible = "sony,imx290lqr";
|
||||
reg = <0x1a>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
|
|
|
|||
|
|
@ -82,7 +82,7 @@ examples:
|
|||
imx334: endpoint {
|
||||
remote-endpoint = <&cam>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
link-frequencies = /bits/ 64 <891000000>;
|
||||
link-frequencies = /bits/ 64 <891000000 445500000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
mediatek,gce-client-reg:
|
||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
items:
|
||||
items:
|
||||
- description: phandle of GCE
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/mediatek,vcodec-subdev-decoder.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/mediatek,vcodec-subdev-decoder.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Mediatek Video Decode Accelerator With Multi Hardware
|
||||
|
||||
|
|
@ -61,7 +61,10 @@ properties:
|
|||
- mediatek,mt8195-vcodec-dec
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
minItems: 1
|
||||
items:
|
||||
- description: VDEC_SYS register space
|
||||
- description: VDEC_RACING_CTRL register space
|
||||
|
||||
iommus:
|
||||
minItems: 1
|
||||
|
|
@ -76,11 +79,6 @@ properties:
|
|||
The node of system control processor (SCP), using
|
||||
the remoteproc & rpmsg framework.
|
||||
|
||||
dma-ranges:
|
||||
maxItems: 1
|
||||
description: |
|
||||
Describes the physical address space of IOMMU maps to memory.
|
||||
|
||||
"#address-cells":
|
||||
const: 2
|
||||
|
||||
|
|
@ -91,17 +89,19 @@ properties:
|
|||
|
||||
# Required child node:
|
||||
patternProperties:
|
||||
'^vcodec-lat@[0-9a-f]+$':
|
||||
'^video-codec@[0-9a-f]+$':
|
||||
type: object
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- mediatek,mtk-vcodec-core
|
||||
- mediatek,mtk-vcodec-lat
|
||||
- mediatek,mtk-vcodec-lat-soc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
description: VDEC_MISC register space
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
|
@ -114,15 +114,12 @@ patternProperties:
|
|||
Refer to bindings/iommu/mediatek,iommu.yaml.
|
||||
|
||||
clocks:
|
||||
minItems: 4
|
||||
maxItems: 5
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: sel
|
||||
- const: soc-vdec
|
||||
- const: soc-lat
|
||||
- const: vdec
|
||||
- const: top
|
||||
minItems: 4
|
||||
maxItems: 5
|
||||
|
||||
assigned-clocks:
|
||||
maxItems: 1
|
||||
|
|
@ -145,65 +142,11 @@ patternProperties:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
'^vcodec-core@[0-9a-f]+$':
|
||||
type: object
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: mediatek,mtk-vcodec-core
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
iommus:
|
||||
minItems: 1
|
||||
maxItems: 32
|
||||
description: |
|
||||
List of the hardware port in respective IOMMU block for current Socs.
|
||||
Refer to bindings/iommu/mediatek,iommu.yaml.
|
||||
|
||||
clocks:
|
||||
maxItems: 5
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: sel
|
||||
- const: soc-vdec
|
||||
- const: soc-lat
|
||||
- const: vdec
|
||||
- const: top
|
||||
|
||||
assigned-clocks:
|
||||
maxItems: 1
|
||||
|
||||
assigned-clock-parents:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- iommus
|
||||
- clocks
|
||||
- clock-names
|
||||
- assigned-clocks
|
||||
- assigned-clock-parents
|
||||
- power-domains
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- iommus
|
||||
- mediatek,scp
|
||||
- dma-ranges
|
||||
- ranges
|
||||
|
||||
if:
|
||||
|
|
@ -211,12 +154,45 @@ if:
|
|||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- mediatek,mtk-vcodec-core
|
||||
- mediatek,mtk-vcodec-lat
|
||||
|
||||
then:
|
||||
required:
|
||||
- interrupts
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- mediatek,mt8192-vcodec-dec
|
||||
then:
|
||||
properties:
|
||||
clock-names:
|
||||
items:
|
||||
- const: sel
|
||||
- const: soc-vdec
|
||||
- const: soc-lat
|
||||
- const: vdec
|
||||
- const: top
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- mediatek,mt8195-vcodec-dec
|
||||
then:
|
||||
properties:
|
||||
clock-names:
|
||||
items:
|
||||
- const: sel
|
||||
- const: vdec
|
||||
- const: lat
|
||||
- const: top
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
|
@ -236,12 +212,11 @@ examples:
|
|||
compatible = "mediatek,mt8192-vcodec-dec";
|
||||
mediatek,scp = <&scp>;
|
||||
iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>;
|
||||
dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges = <0 0 0 0x16000000 0 0x40000>;
|
||||
reg = <0 0x16000000 0 0x1000>; /* VDEC_SYS */
|
||||
vcodec-lat@10000 {
|
||||
video-codec@10000 {
|
||||
compatible = "mediatek,mtk-vcodec-lat";
|
||||
reg = <0 0x10000 0 0x800>;
|
||||
interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
|
|
@ -264,7 +239,7 @@ examples:
|
|||
power-domains = <&spm MT8192_POWER_DOMAIN_VDEC>;
|
||||
};
|
||||
|
||||
vcodec-core@25000 {
|
||||
video-codec@25000 {
|
||||
compatible = "mediatek,mtk-vcodec-core";
|
||||
reg = <0 0x25000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
|
|
|
|||
|
|
@ -1,20 +0,0 @@
|
|||
* Amlogic Meson IR remote control receiver
|
||||
|
||||
Required properties:
|
||||
- compatible : depending on the platform this should be one of:
|
||||
- "amlogic,meson6-ir"
|
||||
- "amlogic,meson8b-ir"
|
||||
- "amlogic,meson-gxbb-ir"
|
||||
- reg : physical base address and length of the device registers
|
||||
- interrupts : a single specifier for the interrupt from the device
|
||||
|
||||
Optional properties:
|
||||
- linux,rc-map-name: see rc.txt file in the same directory.
|
||||
|
||||
Example:
|
||||
|
||||
ir-receiver@c8100480 {
|
||||
compatible= "amlogic,meson6-ir";
|
||||
reg = <0xc8100480 0x20>;
|
||||
interrupts = <0 15 1>;
|
||||
};
|
||||
|
|
@ -2,8 +2,8 @@
|
|||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/microchip,sama5d4-vdec.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/microchip,sama5d4-vdec.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Hantro G1 VPU codec implemented on Microchip SAMA5D4 SoCs
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,173 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: i.MX8 Image Sensing Interface
|
||||
|
||||
maintainers:
|
||||
- Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
|
||||
description: |
|
||||
The Image Sensing Interface (ISI) combines image processing pipelines with
|
||||
DMA engines to process and capture frames originating from a variety of
|
||||
sources. The inputs to the ISI go through Pixel Link interfaces, and their
|
||||
number and nature is SoC-dependent. They cover both capture interfaces (MIPI
|
||||
CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- fsl,imx8mn-isi
|
||||
- fsl,imx8mp-isi
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: The AXI clock
|
||||
- description: The APB clock
|
||||
# TODO: Check if the per-channel ipg_proc_clk clocks need to be specified
|
||||
# as well, in case some SoCs have the ability to control them separately.
|
||||
# This may be the case of the i.MX8[DQ]X(P)
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: axi
|
||||
- const: apb
|
||||
|
||||
fsl,blk-ctrl:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
A phandle referencing the block control that contains the CSIS to ISI
|
||||
gasket.
|
||||
|
||||
interrupts:
|
||||
description: Processing pipeline interrupts, one per pipeline
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
description: |
|
||||
Ports represent the Pixel Link inputs to the ISI. Their number and
|
||||
assignment are model-dependent. Each port shall have a single endpoint.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- fsl,blk-ctrl
|
||||
- ports
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: fsl,imx8mn-isi
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
ports:
|
||||
properties:
|
||||
port@0:
|
||||
description: MIPI CSI-2 RX
|
||||
required:
|
||||
- port@0
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: fsl,imx8mp-isi
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 2
|
||||
ports:
|
||||
properties:
|
||||
port@0:
|
||||
description: MIPI CSI-2 RX 0
|
||||
port@1:
|
||||
description: MIPI CSI-2 RX 1
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/imx8mn-clock.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/power/imx8mn-power.h>
|
||||
|
||||
isi@32e20000 {
|
||||
compatible = "fsl,imx8mn-isi";
|
||||
reg = <0x32e20000 0x100>;
|
||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
|
||||
<&clk IMX8MN_CLK_DISP_APB_ROOT>;
|
||||
clock-names = "axi", "apb";
|
||||
fsl,blk-ctrl = <&disp_blk_ctrl>;
|
||||
power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_ISI>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
isi_in: endpoint {
|
||||
remote-endpoint = <&mipi_csi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
#include <dt-bindings/clock/imx8mp-clock.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
isi@32e00000 {
|
||||
compatible = "fsl,imx8mp-isi";
|
||||
reg = <0x32e00000 0x4000>;
|
||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
|
||||
<&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
|
||||
clock-names = "axi", "apb";
|
||||
fsl,blk-ctrl = <&media_blk_ctrl>;
|
||||
power-domains = <&mediamix_pd>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
isi_in_0: endpoint {
|
||||
remote-endpoint = <&mipi_csi_0_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
isi_in_1: endpoint {
|
||||
remote-endpoint = <&mipi_csi_1_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
@ -2,8 +2,8 @@
|
|||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Hantro G1/G2 VPU codecs implemented on i.MX8M SoCs
|
||||
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,msm8916-camss.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,msm8916-camss.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm CAMSS ISP
|
||||
|
||||
|
|
|
|||
|
|
@ -1,11 +1,10 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,msm8916-venus.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,msm8916-venus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Venus video encode and decode accelerators
|
||||
title: Qualcomm MSM8916 Venus video encode and decode accelerators
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
||||
|
|
@ -14,16 +13,13 @@ description: |
|
|||
The Venus IP is a video encode and decode accelerator present
|
||||
on Qualcomm platforms
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,venus-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,msm8916-venus
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
|
|
@ -39,9 +35,6 @@ properties:
|
|||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
memory-region:
|
||||
maxItems: 1
|
||||
|
||||
video-decoder:
|
||||
type: object
|
||||
|
||||
|
|
@ -66,57 +59,36 @@ properties:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
video-firmware:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
description: |
|
||||
Firmware subnode is needed when the platform does not
|
||||
have TrustZone.
|
||||
|
||||
properties:
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- iommus
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- power-domains
|
||||
- clocks
|
||||
- clock-names
|
||||
- iommus
|
||||
- memory-region
|
||||
- video-decoder
|
||||
- video-encoder
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-msm8916.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-msm8916.h>
|
||||
|
||||
video-codec@1d00000 {
|
||||
compatible = "qcom,msm8916-venus";
|
||||
reg = <0x01d00000 0xff000>;
|
||||
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
|
||||
<&gcc GCC_VENUS0_AHB_CLK>,
|
||||
<&gcc GCC_VENUS0_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus";
|
||||
power-domains = <&gcc VENUS_GDSC>;
|
||||
iommus = <&apps_iommu 5>;
|
||||
memory-region = <&venus_mem>;
|
||||
video-codec@1d00000 {
|
||||
compatible = "qcom,msm8916-venus";
|
||||
reg = <0x01d00000 0xff000>;
|
||||
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
|
||||
<&gcc GCC_VENUS0_AHB_CLK>,
|
||||
<&gcc GCC_VENUS0_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus";
|
||||
power-domains = <&gcc VENUS_GDSC>;
|
||||
iommus = <&apps_iommu 5>;
|
||||
memory-region = <&venus_mem>;
|
||||
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,msm8996-camss.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,msm8996-camss.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm CAMSS ISP
|
||||
|
||||
|
|
|
|||
|
|
@ -1,11 +1,10 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,msm8996-venus.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,msm8996-venus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Venus video encode and decode accelerators
|
||||
title: Qualcomm MSM8996 Venus video encode and decode accelerators
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
||||
|
|
@ -14,16 +13,13 @@ description: |
|
|||
The Venus IP is a video encode and decode accelerator present
|
||||
on Qualcomm platforms
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,venus-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,msm8996-venus
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
|
|
@ -37,12 +33,17 @@ properties:
|
|||
- const: bus
|
||||
- const: mbus
|
||||
|
||||
interconnects:
|
||||
maxItems: 2
|
||||
|
||||
interconnect-names:
|
||||
items:
|
||||
- const: video-mem
|
||||
- const: cpu-cfg
|
||||
|
||||
iommus:
|
||||
maxItems: 20
|
||||
|
||||
memory-region:
|
||||
maxItems: 1
|
||||
|
||||
video-decoder:
|
||||
type: object
|
||||
|
||||
|
|
@ -93,83 +94,62 @@ properties:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
video-firmware:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
description: |
|
||||
Firmware subnode is needed when the platform does not
|
||||
have TrustZone.
|
||||
|
||||
properties:
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- iommus
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- power-domains
|
||||
- clocks
|
||||
- clock-names
|
||||
- iommus
|
||||
- memory-region
|
||||
- video-decoder
|
||||
- video-encoder
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,mmcc-msm8996.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,mmcc-msm8996.h>
|
||||
|
||||
video-codec@c00000 {
|
||||
compatible = "qcom,msm8996-venus";
|
||||
reg = <0x00c00000 0xff000>;
|
||||
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mmcc VIDEO_CORE_CLK>,
|
||||
<&mmcc VIDEO_AHB_CLK>,
|
||||
<&mmcc VIDEO_AXI_CLK>,
|
||||
<&mmcc VIDEO_MAXI_CLK>;
|
||||
clock-names = "core", "iface", "bus", "mbus";
|
||||
power-domains = <&mmcc VENUS_GDSC>;
|
||||
iommus = <&venus_smmu 0x00>,
|
||||
<&venus_smmu 0x01>,
|
||||
<&venus_smmu 0x0a>,
|
||||
<&venus_smmu 0x07>,
|
||||
<&venus_smmu 0x0e>,
|
||||
<&venus_smmu 0x0f>,
|
||||
<&venus_smmu 0x08>,
|
||||
<&venus_smmu 0x09>,
|
||||
<&venus_smmu 0x0b>,
|
||||
<&venus_smmu 0x0c>,
|
||||
<&venus_smmu 0x0d>,
|
||||
<&venus_smmu 0x10>,
|
||||
<&venus_smmu 0x11>,
|
||||
<&venus_smmu 0x21>,
|
||||
<&venus_smmu 0x28>,
|
||||
<&venus_smmu 0x29>,
|
||||
<&venus_smmu 0x2b>,
|
||||
<&venus_smmu 0x2c>,
|
||||
<&venus_smmu 0x2d>,
|
||||
<&venus_smmu 0x31>;
|
||||
memory-region = <&venus_mem>;
|
||||
video-codec@c00000 {
|
||||
compatible = "qcom,msm8996-venus";
|
||||
reg = <0x00c00000 0xff000>;
|
||||
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mmcc VIDEO_CORE_CLK>,
|
||||
<&mmcc VIDEO_AHB_CLK>,
|
||||
<&mmcc VIDEO_AXI_CLK>,
|
||||
<&mmcc VIDEO_MAXI_CLK>;
|
||||
clock-names = "core", "iface", "bus", "mbus";
|
||||
power-domains = <&mmcc VENUS_GDSC>;
|
||||
iommus = <&venus_smmu 0x00>,
|
||||
<&venus_smmu 0x01>,
|
||||
<&venus_smmu 0x0a>,
|
||||
<&venus_smmu 0x07>,
|
||||
<&venus_smmu 0x0e>,
|
||||
<&venus_smmu 0x0f>,
|
||||
<&venus_smmu 0x08>,
|
||||
<&venus_smmu 0x09>,
|
||||
<&venus_smmu 0x0b>,
|
||||
<&venus_smmu 0x0c>,
|
||||
<&venus_smmu 0x0d>,
|
||||
<&venus_smmu 0x10>,
|
||||
<&venus_smmu 0x11>,
|
||||
<&venus_smmu 0x21>,
|
||||
<&venus_smmu 0x28>,
|
||||
<&venus_smmu 0x29>,
|
||||
<&venus_smmu 0x2b>,
|
||||
<&venus_smmu 0x2c>,
|
||||
<&venus_smmu 0x2d>,
|
||||
<&venus_smmu 0x31>;
|
||||
memory-region = <&venus_mem>;
|
||||
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
|
||||
clock-names = "core";
|
||||
power-domains = <&mmcc VENUS_CORE0_GDSC>;
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
|
||||
clock-names = "core";
|
||||
power-domains = <&mmcc VENUS_CORE1_GDSC>;
|
||||
};
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
|
||||
clock-names = "core";
|
||||
power-domains = <&mmcc VENUS_CORE0_GDSC>;
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
|
||||
clock-names = "core";
|
||||
power-domains = <&mmcc VENUS_CORE1_GDSC>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,11 +1,10 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,sc7180-venus.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,sc7180-venus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Venus video encode and decode accelerators
|
||||
title: Qualcomm SC7180 Venus video encode and decode accelerators
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
||||
|
|
@ -14,16 +13,13 @@ description: |
|
|||
The Venus IP is a video encode and decode accelerator present
|
||||
on Qualcomm platforms
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,venus-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,sc7180-venus
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
minItems: 2
|
||||
maxItems: 3
|
||||
|
|
@ -60,6 +56,10 @@ properties:
|
|||
- const: video-mem
|
||||
- const: cpu-cfg
|
||||
|
||||
operating-points-v2: true
|
||||
opp-table:
|
||||
type: object
|
||||
|
||||
video-decoder:
|
||||
type: object
|
||||
|
||||
|
|
@ -84,63 +84,42 @@ properties:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
video-firmware:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
description: |
|
||||
Firmware subnode is needed when the platform does not
|
||||
have TrustZone.
|
||||
|
||||
properties:
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- iommus
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- power-domains
|
||||
- power-domain-names
|
||||
- clocks
|
||||
- clock-names
|
||||
- iommus
|
||||
- memory-region
|
||||
- video-decoder
|
||||
- video-encoder
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sc7180.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sc7180.h>
|
||||
|
||||
venus: video-codec@aa00000 {
|
||||
compatible = "qcom,sc7180-venus";
|
||||
reg = <0x0aa00000 0xff000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&videocc VENUS_GDSC>,
|
||||
<&videocc VCODEC0_GDSC>;
|
||||
power-domain-names = "venus", "vcodec0";
|
||||
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus",
|
||||
"vcodec0_core", "vcodec0_bus";
|
||||
iommus = <&apps_smmu 0x0c00 0x60>;
|
||||
memory-region = <&venus_mem>;
|
||||
venus: video-codec@aa00000 {
|
||||
compatible = "qcom,sc7180-venus";
|
||||
reg = <0x0aa00000 0xff000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&videocc VENUS_GDSC>,
|
||||
<&videocc VCODEC0_GDSC>;
|
||||
power-domain-names = "venus", "vcodec0";
|
||||
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus",
|
||||
"vcodec0_core", "vcodec0_bus";
|
||||
iommus = <&apps_smmu 0x0c00 0x60>;
|
||||
memory-region = <&venus_mem>;
|
||||
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,11 +1,10 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,sc7280-venus.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,sc7280-venus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Venus video encode and decode accelerators
|
||||
title: Qualcomm SC7280 Venus video encode and decode accelerators
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
||||
|
|
@ -14,16 +13,13 @@ description: |
|
|||
The Venus Iris2 IP is a video encode and decode accelerator present
|
||||
on Qualcomm platforms
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,venus-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,sc7280-venus
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
minItems: 2
|
||||
maxItems: 3
|
||||
|
|
@ -49,9 +45,6 @@ properties:
|
|||
iommus:
|
||||
maxItems: 2
|
||||
|
||||
memory-region:
|
||||
maxItems: 1
|
||||
|
||||
interconnects:
|
||||
maxItems: 2
|
||||
|
||||
|
|
@ -60,6 +53,10 @@ properties:
|
|||
- const: cpu-cfg
|
||||
- const: video-mem
|
||||
|
||||
operating-points-v2: true
|
||||
opp-table:
|
||||
type: object
|
||||
|
||||
video-decoder:
|
||||
type: object
|
||||
|
||||
|
|
@ -84,79 +81,58 @@ properties:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
video-firmware:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
description: |
|
||||
Firmware subnode is needed when the platform does not
|
||||
have TrustZone.
|
||||
|
||||
properties:
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- iommus
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- power-domains
|
||||
- power-domain-names
|
||||
- clocks
|
||||
- clock-names
|
||||
- iommus
|
||||
- memory-region
|
||||
- video-decoder
|
||||
- video-encoder
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sc7280.h>
|
||||
#include <dt-bindings/interconnect/qcom,sc7280.h>
|
||||
#include <dt-bindings/power/qcom-rpmpd.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sc7280.h>
|
||||
#include <dt-bindings/interconnect/qcom,sc7280.h>
|
||||
#include <dt-bindings/power/qcom-rpmpd.h>
|
||||
|
||||
venus: video-codec@aa00000 {
|
||||
compatible = "qcom,sc7280-venus";
|
||||
reg = <0x0aa00000 0xd0600>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
venus: video-codec@aa00000 {
|
||||
compatible = "qcom,sc7280-venus";
|
||||
reg = <0x0aa00000 0xd0600>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
clocks = <&videocc VIDEO_CC_MVSC_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_MVSC_CTL_AXI_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_AXI_CLK>;
|
||||
clock-names = "core", "bus", "iface",
|
||||
"vcodec_core", "vcodec_bus";
|
||||
clocks = <&videocc VIDEO_CC_MVSC_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_MVSC_CTL_AXI_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_AXI_CLK>;
|
||||
clock-names = "core", "bus", "iface",
|
||||
"vcodec_core", "vcodec_bus";
|
||||
|
||||
power-domains = <&videocc MVSC_GDSC>,
|
||||
<&videocc MVS0_GDSC>,
|
||||
<&rpmhpd SC7280_CX>;
|
||||
power-domain-names = "venus", "vcodec0", "cx";
|
||||
power-domains = <&videocc MVSC_GDSC>,
|
||||
<&videocc MVS0_GDSC>,
|
||||
<&rpmhpd SC7280_CX>;
|
||||
power-domain-names = "venus", "vcodec0", "cx";
|
||||
|
||||
interconnects = <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_VENUS_CFG 0>,
|
||||
<&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>;
|
||||
interconnect-names = "cpu-cfg", "video-mem";
|
||||
interconnects = <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_VENUS_CFG 0>,
|
||||
<&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>;
|
||||
interconnect-names = "cpu-cfg", "video-mem";
|
||||
|
||||
iommus = <&apps_smmu 0x2180 0x20>,
|
||||
<&apps_smmu 0x2184 0x20>;
|
||||
iommus = <&apps_smmu 0x2180 0x20>,
|
||||
<&apps_smmu 0x2184 0x20>;
|
||||
|
||||
memory-region = <&video_mem>;
|
||||
memory-region = <&video_mem>;
|
||||
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
|
||||
video-firmware {
|
||||
iommus = <&apps_smmu 0x21a2 0x0>;
|
||||
};
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
|
||||
video-firmware {
|
||||
iommus = <&apps_smmu 0x21a2 0x0>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,sdm660-camss.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,sdm660-camss.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm CAMSS ISP
|
||||
|
||||
|
|
|
|||
|
|
@ -1,11 +1,10 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,sdm660-venus.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,sdm660-venus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Venus video encode and decode accelerators
|
||||
title: Qualcomm SDM660 Venus video encode and decode accelerators
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
||||
|
|
@ -15,13 +14,13 @@ description: |
|
|||
The Venus IP is a video encode and decode accelerator present
|
||||
on Qualcomm platforms
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,venus-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,sdm660-venus
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 4
|
||||
|
||||
|
|
@ -40,15 +39,9 @@ properties:
|
|||
- const: cpu-cfg
|
||||
- const: video-mem
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
iommus:
|
||||
maxItems: 20
|
||||
|
||||
memory-region:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
|
|
@ -102,86 +95,65 @@ properties:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
video-firmware:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
description: |
|
||||
Firmware subnode is needed when the platform does not
|
||||
have TrustZone.
|
||||
|
||||
properties:
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- iommus
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- interrupts
|
||||
- iommus
|
||||
- memory-region
|
||||
- power-domains
|
||||
- video-decoder
|
||||
- video-encoder
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,mmcc-sdm660.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,mmcc-sdm660.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
video-codec@cc00000 {
|
||||
compatible = "qcom,sdm660-venus";
|
||||
reg = <0x0cc00000 0xff000>;
|
||||
clocks = <&mmcc VIDEO_CORE_CLK>,
|
||||
<&mmcc VIDEO_AHB_CLK>,
|
||||
<&mmcc VIDEO_AXI_CLK>,
|
||||
<&mmcc THROTTLE_VIDEO_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus", "bus_throttle";
|
||||
interconnects = <&gnoc 0 &mnoc 13>,
|
||||
<&mnoc 4 &bimc 5>;
|
||||
interconnect-names = "cpu-cfg", "video-mem";
|
||||
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
|
||||
iommus = <&mmss_smmu 0x400>,
|
||||
<&mmss_smmu 0x401>,
|
||||
<&mmss_smmu 0x40a>,
|
||||
<&mmss_smmu 0x407>,
|
||||
<&mmss_smmu 0x40e>,
|
||||
<&mmss_smmu 0x40f>,
|
||||
<&mmss_smmu 0x408>,
|
||||
<&mmss_smmu 0x409>,
|
||||
<&mmss_smmu 0x40b>,
|
||||
<&mmss_smmu 0x40c>,
|
||||
<&mmss_smmu 0x40d>,
|
||||
<&mmss_smmu 0x410>,
|
||||
<&mmss_smmu 0x421>,
|
||||
<&mmss_smmu 0x428>,
|
||||
<&mmss_smmu 0x429>,
|
||||
<&mmss_smmu 0x42b>,
|
||||
<&mmss_smmu 0x42c>,
|
||||
<&mmss_smmu 0x42d>,
|
||||
<&mmss_smmu 0x411>,
|
||||
<&mmss_smmu 0x431>;
|
||||
memory-region = <&venus_region>;
|
||||
power-domains = <&mmcc VENUS_GDSC>;
|
||||
video-codec@cc00000 {
|
||||
compatible = "qcom,sdm660-venus";
|
||||
reg = <0x0cc00000 0xff000>;
|
||||
clocks = <&mmcc VIDEO_CORE_CLK>,
|
||||
<&mmcc VIDEO_AHB_CLK>,
|
||||
<&mmcc VIDEO_AXI_CLK>,
|
||||
<&mmcc THROTTLE_VIDEO_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus", "bus_throttle";
|
||||
interconnects = <&gnoc 0 &mnoc 13>,
|
||||
<&mnoc 4 &bimc 5>;
|
||||
interconnect-names = "cpu-cfg", "video-mem";
|
||||
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
|
||||
iommus = <&mmss_smmu 0x400>,
|
||||
<&mmss_smmu 0x401>,
|
||||
<&mmss_smmu 0x40a>,
|
||||
<&mmss_smmu 0x407>,
|
||||
<&mmss_smmu 0x40e>,
|
||||
<&mmss_smmu 0x40f>,
|
||||
<&mmss_smmu 0x408>,
|
||||
<&mmss_smmu 0x409>,
|
||||
<&mmss_smmu 0x40b>,
|
||||
<&mmss_smmu 0x40c>,
|
||||
<&mmss_smmu 0x40d>,
|
||||
<&mmss_smmu 0x410>,
|
||||
<&mmss_smmu 0x421>,
|
||||
<&mmss_smmu 0x428>,
|
||||
<&mmss_smmu 0x429>,
|
||||
<&mmss_smmu 0x42b>,
|
||||
<&mmss_smmu 0x42c>,
|
||||
<&mmss_smmu 0x42d>,
|
||||
<&mmss_smmu 0x411>,
|
||||
<&mmss_smmu 0x431>;
|
||||
memory-region = <&venus_region>;
|
||||
power-domains = <&mmcc VENUS_GDSC>;
|
||||
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
|
||||
clock-names = "vcodec0_core";
|
||||
power-domains = <&mmcc VENUS_CORE0_GDSC>;
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
|
||||
clock-names = "vcodec0_core";
|
||||
power-domains = <&mmcc VENUS_CORE0_GDSC>;
|
||||
};
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
|
||||
clock-names = "vcodec0_core";
|
||||
power-domains = <&mmcc VENUS_CORE0_GDSC>;
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
|
||||
clock-names = "vcodec0_core";
|
||||
power-domains = <&mmcc VENUS_CORE0_GDSC>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,sdm845-camss.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,sdm845-camss.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm CAMSS ISP
|
||||
|
||||
|
|
|
|||
|
|
@ -1,11 +1,10 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,sdm845-venus-v2.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,sdm845-venus-v2.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Venus video encode and decode accelerators
|
||||
title: Qualcomm SDM845 Venus v2 video encode and decode accelerators
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
||||
|
|
@ -14,16 +13,13 @@ description: |
|
|||
The Venus IP is a video encode and decode accelerator present
|
||||
on Qualcomm platforms
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,venus-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,sdm845-venus-v2
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
minItems: 3
|
||||
maxItems: 4
|
||||
|
|
@ -52,8 +48,9 @@ properties:
|
|||
iommus:
|
||||
maxItems: 2
|
||||
|
||||
memory-region:
|
||||
maxItems: 1
|
||||
operating-points-v2: true
|
||||
opp-table:
|
||||
type: object
|
||||
|
||||
video-core0:
|
||||
type: object
|
||||
|
|
@ -79,68 +76,47 @@ properties:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
video-firmware:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
description: |
|
||||
Firmware subnode is needed when the platform does not
|
||||
have TrustZone.
|
||||
|
||||
properties:
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- iommus
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- power-domains
|
||||
- power-domain-names
|
||||
- clocks
|
||||
- clock-names
|
||||
- iommus
|
||||
- memory-region
|
||||
- video-core0
|
||||
- video-core1
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sdm845.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sdm845.h>
|
||||
|
||||
video-codec@aa00000 {
|
||||
compatible = "qcom,sdm845-venus-v2";
|
||||
reg = <0x0aa00000 0xff000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_AXI_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC1_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC1_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus",
|
||||
"vcodec0_core", "vcodec0_bus",
|
||||
"vcodec1_core", "vcodec1_bus";
|
||||
power-domains = <&videocc VENUS_GDSC>,
|
||||
<&videocc VCODEC0_GDSC>,
|
||||
<&videocc VCODEC1_GDSC>;
|
||||
power-domain-names = "venus", "vcodec0", "vcodec1";
|
||||
iommus = <&apps_smmu 0x10a0 0x8>,
|
||||
<&apps_smmu 0x10b0 0x0>;
|
||||
memory-region = <&venus_mem>;
|
||||
video-codec@aa00000 {
|
||||
compatible = "qcom,sdm845-venus-v2";
|
||||
reg = <0x0aa00000 0xff000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_AXI_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC1_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC1_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus",
|
||||
"vcodec0_core", "vcodec0_bus",
|
||||
"vcodec1_core", "vcodec1_bus";
|
||||
power-domains = <&videocc VENUS_GDSC>,
|
||||
<&videocc VCODEC0_GDSC>,
|
||||
<&videocc VCODEC1_GDSC>;
|
||||
power-domain-names = "venus", "vcodec0", "vcodec1";
|
||||
iommus = <&apps_smmu 0x10a0 0x8>,
|
||||
<&apps_smmu 0x10b0 0x0>;
|
||||
memory-region = <&venus_mem>;
|
||||
|
||||
video-core0 {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-core1 {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
video-core0 {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-core1 {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,11 +1,10 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,sdm845-venus.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,sdm845-venus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Venus video encode and decode accelerators
|
||||
title: Qualcomm SDM845 Venus video encode and decode accelerators
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
||||
|
|
@ -14,16 +13,13 @@ description: |
|
|||
The Venus IP is a video encode and decode accelerator present
|
||||
on Qualcomm platforms
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,venus-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,sdm845-venus
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
|
|
@ -39,9 +35,6 @@ properties:
|
|||
iommus:
|
||||
maxItems: 2
|
||||
|
||||
memory-region:
|
||||
maxItems: 1
|
||||
|
||||
video-core0:
|
||||
type: object
|
||||
|
||||
|
|
@ -94,66 +87,45 @@ properties:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
video-firmware:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
description: |
|
||||
Firmware subnode is needed when the platform does not
|
||||
have TrustZone.
|
||||
|
||||
properties:
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- iommus
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- power-domains
|
||||
- clocks
|
||||
- clock-names
|
||||
- iommus
|
||||
- memory-region
|
||||
- video-core0
|
||||
- video-core1
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sdm845.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sdm845.h>
|
||||
|
||||
video-codec@aa00000 {
|
||||
compatible = "qcom,sdm845-venus";
|
||||
reg = <0x0aa00000 0xff000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus";
|
||||
power-domains = <&videocc VENUS_GDSC>;
|
||||
iommus = <&apps_smmu 0x10a0 0x8>,
|
||||
<&apps_smmu 0x10b0 0x0>;
|
||||
memory-region = <&venus_mem>;
|
||||
video-codec@aa00000 {
|
||||
compatible = "qcom,sdm845-venus";
|
||||
reg = <0x0aa00000 0xff000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
|
||||
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>;
|
||||
clock-names = "core", "iface", "bus";
|
||||
power-domains = <&videocc VENUS_GDSC>;
|
||||
iommus = <&apps_smmu 0x10a0 0x8>,
|
||||
<&apps_smmu 0x10b0 0x0>;
|
||||
memory-region = <&venus_mem>;
|
||||
|
||||
video-core0 {
|
||||
compatible = "venus-decoder";
|
||||
clocks = <&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_AXI_CLK>;
|
||||
clock-names = "core", "bus";
|
||||
power-domains = <&videocc VCODEC0_GDSC>;
|
||||
};
|
||||
|
||||
video-core1 {
|
||||
compatible = "venus-encoder";
|
||||
clocks = <&videocc VIDEO_CC_VCODEC1_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC1_AXI_CLK>;
|
||||
clock-names = "core", "bus";
|
||||
power-domains = <&videocc VCODEC1_GDSC>;
|
||||
};
|
||||
video-core0 {
|
||||
compatible = "venus-decoder";
|
||||
clocks = <&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC0_AXI_CLK>;
|
||||
clock-names = "core", "bus";
|
||||
power-domains = <&videocc VCODEC0_GDSC>;
|
||||
};
|
||||
|
||||
video-core1 {
|
||||
compatible = "venus-encoder";
|
||||
clocks = <&videocc VIDEO_CC_VCODEC1_CORE_CLK>,
|
||||
<&videocc VIDEO_CC_VCODEC1_AXI_CLK>;
|
||||
clock-names = "core", "bus";
|
||||
power-domains = <&videocc VCODEC1_GDSC>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,sm8250-camss.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,sm8250-camss.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm CAMSS ISP
|
||||
|
||||
|
|
|
|||
|
|
@ -1,11 +1,10 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/qcom,sm8250-venus.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/qcom,sm8250-venus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Venus video encode and decode accelerators
|
||||
title: Qualcomm SM8250 Venus video encode and decode accelerators
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
||||
|
|
@ -14,16 +13,13 @@ description: |
|
|||
The Venus IP is a video encode and decode accelerator present
|
||||
on Qualcomm platforms
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,venus-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,sm8250-venus
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
minItems: 2
|
||||
maxItems: 3
|
||||
|
|
@ -47,9 +43,6 @@ properties:
|
|||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
memory-region:
|
||||
maxItems: 1
|
||||
|
||||
interconnects:
|
||||
maxItems: 2
|
||||
|
||||
|
|
@ -58,6 +51,10 @@ properties:
|
|||
- const: cpu-cfg
|
||||
- const: video-mem
|
||||
|
||||
operating-points-v2: true
|
||||
opp-table:
|
||||
type: object
|
||||
|
||||
resets:
|
||||
maxItems: 2
|
||||
|
||||
|
|
@ -90,78 +87,57 @@ properties:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
video-firmware:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
description: |
|
||||
Firmware subnode is needed when the platform does not
|
||||
have TrustZone.
|
||||
|
||||
properties:
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- iommus
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- power-domains
|
||||
- power-domain-names
|
||||
- clocks
|
||||
- clock-names
|
||||
- interconnects
|
||||
- interconnect-names
|
||||
- iommus
|
||||
- memory-region
|
||||
- resets
|
||||
- reset-names
|
||||
- video-decoder
|
||||
- video-encoder
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sm8250.h>
|
||||
#include <dt-bindings/interconnect/qcom,sm8250.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-sm8250.h>
|
||||
#include <dt-bindings/power/qcom-rpmpd.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,videocc-sm8250.h>
|
||||
#include <dt-bindings/interconnect/qcom,sm8250.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-sm8250.h>
|
||||
#include <dt-bindings/power/qcom-rpmpd.h>
|
||||
|
||||
venus: video-codec@aa00000 {
|
||||
compatible = "qcom,sm8250-venus";
|
||||
reg = <0x0aa00000 0xff000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&videocc MVS0C_GDSC>,
|
||||
<&videocc MVS0_GDSC>,
|
||||
<&rpmhpd SM8250_MX>;
|
||||
power-domain-names = "venus", "vcodec0", "mx";
|
||||
venus: video-codec@aa00000 {
|
||||
compatible = "qcom,sm8250-venus";
|
||||
reg = <0x0aa00000 0xff000>;
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&videocc MVS0C_GDSC>,
|
||||
<&videocc MVS0_GDSC>,
|
||||
<&rpmhpd SM8250_MX>;
|
||||
power-domain-names = "venus", "vcodec0", "mx";
|
||||
|
||||
clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0C_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_CLK>;
|
||||
clock-names = "iface", "core", "vcodec0_core";
|
||||
clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0C_CLK>,
|
||||
<&videocc VIDEO_CC_MVS0_CLK>;
|
||||
clock-names = "iface", "core", "vcodec0_core";
|
||||
|
||||
interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>,
|
||||
<&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI_CH0>;
|
||||
interconnect-names = "cpu-cfg", "video-mem";
|
||||
interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>,
|
||||
<&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI_CH0>;
|
||||
interconnect-names = "cpu-cfg", "video-mem";
|
||||
|
||||
iommus = <&apps_smmu 0x2100 0x0400>;
|
||||
memory-region = <&video_mem>;
|
||||
iommus = <&apps_smmu 0x2100 0x0400>;
|
||||
memory-region = <&video_mem>;
|
||||
|
||||
resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>,
|
||||
<&videocc VIDEO_CC_MVS0C_CLK_ARES>;
|
||||
reset-names = "bus", "core";
|
||||
resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>,
|
||||
<&videocc VIDEO_CC_MVS0C_CLK_ARES>;
|
||||
reset-names = "bus", "core";
|
||||
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
video-decoder {
|
||||
compatible = "venus-decoder";
|
||||
};
|
||||
|
||||
video-encoder {
|
||||
compatible = "venus-encoder";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,73 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/qcom,venus-common.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm SoC Venus Video Encode and Decode Accelerators Common Properties
|
||||
|
||||
maintainers:
|
||||
- Stanimir Varbanov <stanimir.k.varbanov@gmail.com>
|
||||
- Vikash Garodia <quic_vgarodia@quicinc.com>
|
||||
|
||||
description: |
|
||||
The Venus IP is a video encode and decode accelerator present
|
||||
on Qualcomm platforms
|
||||
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 3
|
||||
maxItems: 7
|
||||
|
||||
clock-names:
|
||||
minItems: 3
|
||||
maxItems: 7
|
||||
|
||||
firmware-name:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
iommus:
|
||||
minItems: 1
|
||||
maxItems: 20
|
||||
|
||||
memory-region:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
|
||||
power-domain-names:
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
|
||||
video-firmware:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
description: |
|
||||
Firmware subnode is needed when the platform does not
|
||||
have TrustZone.
|
||||
|
||||
properties:
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- iommus
|
||||
|
||||
required:
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- interrupts
|
||||
- memory-region
|
||||
- power-domains
|
||||
|
||||
additionalProperties: true
|
||||
|
|
@ -18,7 +18,7 @@ properties:
|
|||
description:
|
||||
Specifies the scancode/key mapping table defined in-kernel for
|
||||
the remote controller.
|
||||
$ref: '/schemas/types.yaml#/definitions/string'
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
enum:
|
||||
- rc-adstech-dvb-t-pci
|
||||
- rc-alink-dtu-m
|
||||
|
|
@ -39,6 +39,7 @@ properties:
|
|||
- rc-avertv-303
|
||||
- rc-azurewave-ad-tu700
|
||||
- rc-beelink-gs1
|
||||
- rc-beelink-mxiii
|
||||
- rc-behold
|
||||
- rc-behold-columbus
|
||||
- rc-budget-ci-old
|
||||
|
|
@ -55,6 +56,7 @@ properties:
|
|||
- rc-dm1105-nec
|
||||
- rc-dntv-live-dvb-t
|
||||
- rc-dntv-live-dvbt-pro
|
||||
- rc-dreambox
|
||||
- rc-dtt200u
|
||||
- rc-dvbsky
|
||||
- rc-dvico-mce
|
||||
|
|
|
|||
|
|
@ -31,6 +31,7 @@ properties:
|
|||
- renesas,r8a77980-csi2 # R-Car V3H
|
||||
- renesas,r8a77990-csi2 # R-Car E3
|
||||
- renesas,r8a779a0-csi2 # R-Car V3U
|
||||
- renesas,r8a779g0-csi2 # R-Car V4H
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -21,15 +21,22 @@ description: |
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- renesas,fcpv # FCP for VSP
|
||||
- renesas,fcpf # FCP for FDP
|
||||
oneOf:
|
||||
- enum:
|
||||
- renesas,fcpv # FCP for VSP
|
||||
- renesas,fcpf # FCP for FDP
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,r9a07g044-fcpvd # RZ/G2{L,LC}
|
||||
- renesas,r9a07g054-fcpvd # RZ/V2L
|
||||
- const: renesas,fcpv # Generic FCP for VSP fallback
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
clocks: true
|
||||
|
||||
clock-names: true
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
|
@ -49,6 +56,34 @@ required:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- renesas,r9a07g044-fcpvd
|
||||
- renesas,r9a07g054-fcpvd
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Main clock
|
||||
- description: Register access clock
|
||||
- description: Video clock
|
||||
clock-names:
|
||||
items:
|
||||
- const: aclk
|
||||
- const: pclk
|
||||
- const: vclk
|
||||
required:
|
||||
- clock-names
|
||||
else:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 1
|
||||
clock-names: false
|
||||
|
||||
examples:
|
||||
# R8A7795 (R-Car H3) FCP for VSP-D1
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@ properties:
|
|||
items:
|
||||
- enum:
|
||||
- renesas,r8a779a0-isp # V3U
|
||||
- renesas,r8a779g0-isp # V4H
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
|
|
|
|||
|
|
@ -53,6 +53,7 @@ properties:
|
|||
- renesas,vin-r8a77990 # R-Car E3
|
||||
- renesas,vin-r8a77995 # R-Car D3
|
||||
- renesas,vin-r8a779a0 # R-Car V3U
|
||||
- renesas,vin-r8a779g0 # R-Car V4H
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -16,10 +16,15 @@ description:
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- renesas,r9a07g044-vsp2 # RZ/G2L
|
||||
- renesas,vsp1 # R-Car Gen2 and RZ/G1
|
||||
- renesas,vsp2 # R-Car Gen3 and RZ/G2
|
||||
oneOf:
|
||||
- enum:
|
||||
- renesas,r9a07g044-vsp2 # RZ/G2L
|
||||
- renesas,vsp1 # R-Car Gen2 and RZ/G1
|
||||
- renesas,vsp2 # R-Car Gen3 and RZ/G2
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,r9a07g054-vsp2 # RZ/V2L
|
||||
- const: renesas,r9a07g044-vsp2 # RZ/G2L fallback
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/rockchip,rk3568-vepu.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/rockchip,rk3568-vepu.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Hantro G1 VPU encoders implemented on Rockchip SoCs
|
||||
|
||||
|
|
|
|||
|
|
@ -212,12 +212,19 @@ examples:
|
|||
compatible = "ovti,ov2685";
|
||||
reg = <0x3c>;
|
||||
|
||||
port {
|
||||
ucam_out: endpoint {
|
||||
remote-endpoint = <&mipi_in_ucam>;
|
||||
data-lanes = <1>;
|
||||
};
|
||||
};
|
||||
clocks = <&cru SCLK_TESTCLKOUT1>;
|
||||
clock-names = "xvclk";
|
||||
|
||||
avdd-supply = <&pp2800_cam>;
|
||||
dovdd-supply = <&pp1800>;
|
||||
dvdd-supply = <&pp1800>;
|
||||
|
||||
port {
|
||||
ucam_out: endpoint {
|
||||
remote-endpoint = <&mipi_in_ucam>;
|
||||
data-lanes = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/media/rockchip-vpu.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/media/rockchip-vpu.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Hantro G1 VPU codecs implemented on Rockchip SoCs
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,170 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/samsung,exynos4210-csis.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung S5P/Exynos SoC series MIPI CSI-2 receiver (MIPI CSIS)
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- samsung,s5pv210-csis
|
||||
- samsung,exynos4210-csis
|
||||
- samsung,exynos4212-csis
|
||||
- samsung,exynos5250-csis
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
bus-width:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [2, 4]
|
||||
description:
|
||||
Number of data lines supported.
|
||||
|
||||
clocks:
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: csis
|
||||
- const: sclk_csis
|
||||
|
||||
clock-frequency:
|
||||
default: 166000000
|
||||
description:
|
||||
The IP's main (system bus) clock frequency in Hz.
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
phys:
|
||||
maxItems: 1
|
||||
|
||||
phy-names:
|
||||
items:
|
||||
- const: csis
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
vddio-supply:
|
||||
description: MIPI CSIS I/O and PLL voltage supply (e.g. 1.8V).
|
||||
|
||||
vddcore-supply:
|
||||
description: MIPI CSIS Core voltage supply (e.g. 1.1V).
|
||||
|
||||
patternProperties:
|
||||
"^port@[34]$":
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
additionalProperties: false
|
||||
description:
|
||||
Camera input port.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
enum: [3, 4]
|
||||
|
||||
endpoint:
|
||||
$ref: video-interfaces.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
data-lanes:
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
|
||||
samsung,csis-hs-settle:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: Differential receiver (HS-RX) settle time.
|
||||
|
||||
samsung,csis-wclk:
|
||||
type: boolean
|
||||
description:
|
||||
CSI-2 wrapper clock selection. If this property is present external clock
|
||||
from CMU will be used, or the bus clock if it's not specified.
|
||||
|
||||
required:
|
||||
- data-lanes
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- bus-width
|
||||
- clocks
|
||||
- clock-names
|
||||
- interrupts
|
||||
- vddio-supply
|
||||
- vddcore-supply
|
||||
|
||||
anyOf:
|
||||
- required:
|
||||
- port@3
|
||||
- required:
|
||||
- port@4
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
required:
|
||||
- samsung,isp-wb
|
||||
then:
|
||||
required:
|
||||
- samsung,sysreg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/exynos4.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
csis@11890000 {
|
||||
compatible = "samsung,exynos4210-csis";
|
||||
reg = <0x11890000 0x4000>;
|
||||
clocks = <&clock CLK_CSIS1>,
|
||||
<&clock CLK_SCLK_CSIS1>;
|
||||
clock-names = "csis", "sclk_csis";
|
||||
assigned-clocks = <&clock CLK_MOUT_CSIS1>,
|
||||
<&clock CLK_SCLK_CSIS1>;
|
||||
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
|
||||
assigned-clock-rates = <0>, <176000000>;
|
||||
|
||||
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
bus-width = <2>;
|
||||
power-domains = <&pd_cam>;
|
||||
phys = <&mipi_phy 2>;
|
||||
phy-names = "csis";
|
||||
|
||||
vddcore-supply = <&ldo8_reg>;
|
||||
vddio-supply = <&ldo10_reg>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* Camera D (4) MIPI CSI-2 (CSIS1) */
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
|
||||
endpoint {
|
||||
remote-endpoint = <&is_s5k6a3_ep>;
|
||||
data-lanes = <1>;
|
||||
samsung,csis-hs-settle = <18>;
|
||||
samsung,csis-wclk;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,152 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/samsung,exynos4210-fimc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung S5P/Exynos SoC Fully Integrated Mobile Camera
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
|
||||
description:
|
||||
Each FIMC device should have an alias in the aliases node, in the form of
|
||||
fimc<n>, where <n> is an integer specifying the IP block instance.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- samsung,exynos4210-fimc
|
||||
- samsung,exynos4212-fimc
|
||||
- samsung,s5pv210-fimc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: fimc
|
||||
- const: sclk_fimc
|
||||
|
||||
clock-frequency:
|
||||
description:
|
||||
Maximum FIMC local clock (LCLK) frequency.
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
samsung,cam-if:
|
||||
type: boolean
|
||||
description:
|
||||
The FIMC IP block includes the camera input interface.
|
||||
|
||||
samsung,isp-wb:
|
||||
type: boolean
|
||||
description: |
|
||||
The FIMC IP block has the ISP writeback input.
|
||||
|
||||
samsung,lcd-wb:
|
||||
type: boolean
|
||||
description: |
|
||||
The FIMC IP block has the LCD writeback input.
|
||||
|
||||
samsung,mainscaler-ext:
|
||||
type: boolean
|
||||
description:
|
||||
FIMC IP supports extended image size and has CIEXTEN register.
|
||||
|
||||
samsung,min-pix-alignment:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
items:
|
||||
- description: Minimum supported image height alignment.
|
||||
- description: Horizontal image offset.
|
||||
description:
|
||||
The values are in pixels and default is <2 1>.
|
||||
|
||||
samsung,min-pix-sizes:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
maxItems: 2
|
||||
description: |
|
||||
An array specyfing minimum image size in pixels at the FIMC input and
|
||||
output DMA, in the first and second cell respectively. Default value
|
||||
is <16 16>.
|
||||
|
||||
samsung,pix-limits:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
maxItems: 4
|
||||
description: |
|
||||
An array of maximum supported image sizes in pixels, for details refer to
|
||||
Table 2-1 in the S5PV210 SoC User Manual. The meaning of each cell is as
|
||||
follows:
|
||||
0 - scaler input horizontal size
|
||||
1 - input horizontal size for the scaler bypassed
|
||||
2 - REAL_WIDTH without input rotation
|
||||
3 - REAL_HEIGHT with input rotation
|
||||
|
||||
samsung,rotators:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 0x11
|
||||
description: |
|
||||
A bitmask specifying whether this IP has the input and the output
|
||||
rotator. Bits 4 and 0 correspond to input and output rotator
|
||||
respectively. If a rotator is present its corresponding bit should be
|
||||
set.
|
||||
|
||||
samsung,sysreg:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
System Registers (SYSREG) node.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- samsung,pix-limits
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
required:
|
||||
- samsung,isp-wb
|
||||
then:
|
||||
required:
|
||||
- samsung,sysreg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/exynos4.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
fimc@11800000 {
|
||||
compatible = "samsung,exynos4212-fimc";
|
||||
reg = <0x11800000 0x1000>;
|
||||
clocks = <&clock CLK_FIMC0>,
|
||||
<&clock CLK_SCLK_FIMC0>;
|
||||
clock-names = "fimc", "sclk_fimc";
|
||||
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
|
||||
iommus = <&sysmmu_fimc0>;
|
||||
power-domains = <&pd_cam>;
|
||||
samsung,sysreg = <&sys_reg>;
|
||||
|
||||
samsung,pix-limits = <4224 8192 1920 4224>;
|
||||
samsung,mainscaler-ext;
|
||||
samsung,isp-wb;
|
||||
samsung,cam-if;
|
||||
|
||||
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
|
||||
<&clock CLK_SCLK_FIMC0>;
|
||||
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
|
||||
assigned-clock-rates = <0>, <176000000>;
|
||||
};
|
||||
|
|
@ -0,0 +1,220 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/samsung,exynos4212-fimc-is.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung Exynos4212/4412 SoC Imaging Subsystem (FIMC-IS)
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
|
||||
description:
|
||||
The FIMC-IS is a subsystem for processing image signal from an image sensor.
|
||||
The Exynos4x12 SoC series FIMC-IS V1.5 comprises of a dedicated ARM Cortex-A5
|
||||
processor, ISP, DRC and FD IP blocks and peripheral devices such as UART, I2C
|
||||
and SPI bus controllers, PWM and ADC.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- samsung,exynos4212-fimc-is
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
ranges: true
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 21
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: lite0
|
||||
- const: lite1
|
||||
- const: ppmuispx
|
||||
- const: ppmuispmx
|
||||
- const: isp
|
||||
- const: drc
|
||||
- const: fd
|
||||
- const: mcuisp
|
||||
- const: gicisp
|
||||
- const: mcuctl_isp
|
||||
- const: pwm_isp
|
||||
- const: ispdiv0
|
||||
- const: ispdiv1
|
||||
- const: mcuispdiv0
|
||||
- const: mcuispdiv1
|
||||
- const: mpll
|
||||
- const: aclk200
|
||||
- const: aclk400mcuisp
|
||||
- const: div_aclk200
|
||||
- const: div_aclk400mcuisp
|
||||
- const: uart
|
||||
|
||||
interrupts:
|
||||
maxItems: 2
|
||||
|
||||
iommus:
|
||||
maxItems: 4
|
||||
|
||||
iommu-names:
|
||||
items:
|
||||
- const: isp
|
||||
- const: drc
|
||||
- const: fd
|
||||
- const: mcuctl
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
patternProperties:
|
||||
"^pmu@[0-9a-f]+$":
|
||||
type: object
|
||||
additionalProperties: false
|
||||
description:
|
||||
Node representing the SoC's Power Management Unit (duplicated with the
|
||||
correct PMU node in the SoC).
|
||||
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
"^i2c-isp@[0-9a-f]+$":
|
||||
type: object
|
||||
$ref: /schemas/i2c/i2c-controller.yaml#
|
||||
unevaluatedProperties: false
|
||||
description:
|
||||
ISP I2C bus controller
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: samsung,exynos4212-i2c-isp
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: i2c_isp
|
||||
|
||||
pinctrl-0: true
|
||||
pinctrl-names:
|
||||
items:
|
||||
- const: default
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#address-cells'
|
||||
- clocks
|
||||
- clock-names
|
||||
- interrupts
|
||||
- ranges
|
||||
- '#size-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/exynos4.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
fimc-is@12000000 {
|
||||
compatible = "samsung,exynos4212-fimc-is";
|
||||
reg = <0x12000000 0x260000>;
|
||||
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&isp_clock CLK_ISP_FIMC_LITE0>,
|
||||
<&isp_clock CLK_ISP_FIMC_LITE1>,
|
||||
<&isp_clock CLK_ISP_PPMUISPX>,
|
||||
<&isp_clock CLK_ISP_PPMUISPMX>,
|
||||
<&isp_clock CLK_ISP_FIMC_ISP>,
|
||||
<&isp_clock CLK_ISP_FIMC_DRC>,
|
||||
<&isp_clock CLK_ISP_FIMC_FD>,
|
||||
<&isp_clock CLK_ISP_MCUISP>,
|
||||
<&isp_clock CLK_ISP_GICISP>,
|
||||
<&isp_clock CLK_ISP_MCUCTL_ISP>,
|
||||
<&isp_clock CLK_ISP_PWM_ISP>,
|
||||
<&isp_clock CLK_ISP_DIV_ISP0>,
|
||||
<&isp_clock CLK_ISP_DIV_ISP1>,
|
||||
<&isp_clock CLK_ISP_DIV_MCUISP0>,
|
||||
<&isp_clock CLK_ISP_DIV_MCUISP1>,
|
||||
<&clock CLK_MOUT_MPLL_USER_T>,
|
||||
<&clock CLK_ACLK200>,
|
||||
<&clock CLK_ACLK400_MCUISP>,
|
||||
<&clock CLK_DIV_ACLK200>,
|
||||
<&clock CLK_DIV_ACLK400_MCUISP>,
|
||||
<&clock CLK_UART_ISP_SCLK>;
|
||||
clock-names = "lite0", "lite1", "ppmuispx",
|
||||
"ppmuispmx", "isp",
|
||||
"drc", "fd", "mcuisp",
|
||||
"gicisp", "mcuctl_isp", "pwm_isp",
|
||||
"ispdiv0", "ispdiv1", "mcuispdiv0",
|
||||
"mcuispdiv1", "mpll", "aclk200",
|
||||
"aclk400mcuisp", "div_aclk200",
|
||||
"div_aclk400mcuisp", "uart";
|
||||
iommus = <&sysmmu_fimc_isp>, <&sysmmu_fimc_drc>,
|
||||
<&sysmmu_fimc_fd>, <&sysmmu_fimc_mcuctl>;
|
||||
iommu-names = "isp", "drc", "fd", "mcuctl";
|
||||
power-domains = <&pd_isp>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
pmu@10020000 {
|
||||
reg = <0x10020000 0x3000>;
|
||||
};
|
||||
|
||||
i2c-isp@12140000 {
|
||||
compatible = "samsung,exynos4212-i2c-isp";
|
||||
reg = <0x12140000 0x100>;
|
||||
clocks = <&isp_clock CLK_ISP_I2C1_ISP>;
|
||||
clock-names = "i2c_isp";
|
||||
pinctrl-0 = <&fimc_is_i2c1>;
|
||||
pinctrl-names = "default";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
image-sensor@10 {
|
||||
compatible = "samsung,s5k6a3";
|
||||
reg = <0x10>;
|
||||
svdda-supply = <&cam_io_reg>;
|
||||
svddio-supply = <&ldo19_reg>;
|
||||
afvdd-supply = <&ldo19_reg>;
|
||||
clock-frequency = <24000000>;
|
||||
clocks = <&camera 1>;
|
||||
clock-names = "extclk";
|
||||
gpios = <&gpm1 6 GPIO_ACTIVE_LOW>;
|
||||
|
||||
port {
|
||||
endpoint {
|
||||
remote-endpoint = <&csis1_ep>;
|
||||
data-lanes = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/samsung,exynos4212-fimc-lite.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung Exynos SoC series camera host interface (FIMC-LITE)
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
|
||||
description:
|
||||
Each FIMC device should have an alias in the aliases node, in the form of
|
||||
fimc-lite<n>, where <n> is an integer specifying the IP block instance.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- samsung,exynos4212-fimc-lite
|
||||
- samsung,exynos5250-fimc-lite
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: flite
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/exynos4.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
fimc-lite@12390000 {
|
||||
compatible = "samsung,exynos4212-fimc-lite";
|
||||
reg = <0x12390000 0x1000>;
|
||||
clocks = <&isp_clock CLK_ISP_FIMC_LITE0>;
|
||||
clock-names = "flite";
|
||||
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&pd_isp>;
|
||||
iommus = <&sysmmu_fimc_lite0>;
|
||||
};
|
||||
|
|
@ -0,0 +1,279 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/samsung,fimc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung S5P/Exynos SoC Camera Subsystem (FIMC)
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
|
||||
description: |
|
||||
The S5P/Exynos SoC Camera subsystem comprises of multiple sub-devices
|
||||
represented by separate device tree nodes. Currently this includes: Fully
|
||||
Integrated Mobile Camera (FIMC, in the S5P SoCs series known as CAMIF), MIPI
|
||||
CSIS, FIMC-LITE and FIMC-IS (ISP).
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: samsung,fimc
|
||||
|
||||
ranges: true
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
description: |
|
||||
The clock specifier cell stores an index of a clock: 0, 1 for
|
||||
CAM_A_CLKOUT, CAM_B_CLKOUT clocks respectively.
|
||||
|
||||
clocks:
|
||||
minItems: 2
|
||||
maxItems: 4
|
||||
|
||||
clock-names:
|
||||
minItems: 2
|
||||
items:
|
||||
- const: sclk_cam0
|
||||
- const: sclk_cam1
|
||||
- const: pxl_async0
|
||||
- const: pxl_async1
|
||||
|
||||
clock-output-names:
|
||||
maxItems: 2
|
||||
|
||||
parallel-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
description:
|
||||
Active parallel video input ports.
|
||||
|
||||
patternProperties:
|
||||
"^port@[01]$":
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
description:
|
||||
Camera A and camera B inputs.
|
||||
|
||||
properties:
|
||||
endpoint:
|
||||
$ref: /schemas/media/video-interfaces.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
pinctrl-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: default
|
||||
- const: idle
|
||||
- const: active_a
|
||||
- const: active_b
|
||||
|
||||
patternProperties:
|
||||
"^csis@[0-9a-f]+$":
|
||||
type: object
|
||||
$ref: samsung,exynos4210-csis.yaml#
|
||||
description: MIPI CSI-2 receiver.
|
||||
|
||||
"^fimc@[0-9a-f]+$":
|
||||
type: object
|
||||
$ref: samsung,exynos4210-fimc.yaml#
|
||||
description: Fully Integrated Mobile Camera.
|
||||
|
||||
"^fimc-is@[0-9a-f]+$":
|
||||
type: object
|
||||
$ref: samsung,exynos4212-fimc-is.yaml#
|
||||
description: Imaging Subsystem (FIMC-IS).
|
||||
|
||||
"^fimc-lite@[0-9a-f]+$":
|
||||
type: object
|
||||
$ref: samsung,exynos4212-fimc-lite.yaml#
|
||||
description: Camera host interface (FIMC-LITE).
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- '#address-cells'
|
||||
- '#clock-cells'
|
||||
- clocks
|
||||
- clock-names
|
||||
- clock-output-names
|
||||
- ranges
|
||||
- '#size-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/exynos4.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
camera@11800000 {
|
||||
compatible = "samsung,fimc";
|
||||
#clock-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x0 0x18000000>;
|
||||
|
||||
clocks = <&clock CLK_SCLK_CAM0>, <&clock CLK_SCLK_CAM1>,
|
||||
<&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
|
||||
clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
|
||||
clock-output-names = "cam_a_clkout", "cam_b_clkout";
|
||||
|
||||
assigned-clocks = <&clock CLK_MOUT_CAM0>,
|
||||
<&clock CLK_MOUT_CAM1>;
|
||||
assigned-clock-parents = <&clock CLK_XUSBXTI>,
|
||||
<&clock CLK_XUSBXTI>;
|
||||
|
||||
pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
fimc@11800000 {
|
||||
compatible = "samsung,exynos4212-fimc";
|
||||
reg = <0x11800000 0x1000>;
|
||||
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clock CLK_FIMC0>,
|
||||
<&clock CLK_SCLK_FIMC0>;
|
||||
clock-names = "fimc", "sclk_fimc";
|
||||
power-domains = <&pd_cam>;
|
||||
samsung,sysreg = <&sys_reg>;
|
||||
iommus = <&sysmmu_fimc0>;
|
||||
|
||||
samsung,pix-limits = <4224 8192 1920 4224>;
|
||||
samsung,mainscaler-ext;
|
||||
samsung,isp-wb;
|
||||
samsung,cam-if;
|
||||
};
|
||||
|
||||
/* ... FIMC 1-3 */
|
||||
|
||||
csis@11880000 {
|
||||
compatible = "samsung,exynos4210-csis";
|
||||
reg = <0x11880000 0x4000>;
|
||||
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clock CLK_CSIS0>,
|
||||
<&clock CLK_SCLK_CSIS0>;
|
||||
clock-names = "csis", "sclk_csis";
|
||||
assigned-clocks = <&clock CLK_MOUT_CSIS0>,
|
||||
<&clock CLK_SCLK_CSIS0>;
|
||||
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
|
||||
assigned-clock-rates = <0>, <176000000>;
|
||||
|
||||
bus-width = <4>;
|
||||
power-domains = <&pd_cam>;
|
||||
phys = <&mipi_phy 0>;
|
||||
phy-names = "csis";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vddcore-supply = <&ldo8_reg>;
|
||||
vddio-supply = <&ldo10_reg>;
|
||||
|
||||
/* Camera C (3) MIPI CSI-2 (CSIS0) */
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
endpoint {
|
||||
remote-endpoint = <&s5c73m3_ep>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
samsung,csis-hs-settle = <12>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* ... CSIS 1 */
|
||||
|
||||
fimc-lite@12390000 {
|
||||
compatible = "samsung,exynos4212-fimc-lite";
|
||||
reg = <0x12390000 0x1000>;
|
||||
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&pd_isp>;
|
||||
clocks = <&isp_clock CLK_ISP_FIMC_LITE0>;
|
||||
clock-names = "flite";
|
||||
iommus = <&sysmmu_fimc_lite0>;
|
||||
};
|
||||
|
||||
/* ... FIMC-LITE 1 */
|
||||
|
||||
fimc-is@12000000 {
|
||||
compatible = "samsung,exynos4212-fimc-is";
|
||||
reg = <0x12000000 0x260000>;
|
||||
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&isp_clock CLK_ISP_FIMC_LITE0>,
|
||||
<&isp_clock CLK_ISP_FIMC_LITE1>,
|
||||
<&isp_clock CLK_ISP_PPMUISPX>,
|
||||
<&isp_clock CLK_ISP_PPMUISPMX>,
|
||||
<&isp_clock CLK_ISP_FIMC_ISP>,
|
||||
<&isp_clock CLK_ISP_FIMC_DRC>,
|
||||
<&isp_clock CLK_ISP_FIMC_FD>,
|
||||
<&isp_clock CLK_ISP_MCUISP>,
|
||||
<&isp_clock CLK_ISP_GICISP>,
|
||||
<&isp_clock CLK_ISP_MCUCTL_ISP>,
|
||||
<&isp_clock CLK_ISP_PWM_ISP>,
|
||||
<&isp_clock CLK_ISP_DIV_ISP0>,
|
||||
<&isp_clock CLK_ISP_DIV_ISP1>,
|
||||
<&isp_clock CLK_ISP_DIV_MCUISP0>,
|
||||
<&isp_clock CLK_ISP_DIV_MCUISP1>,
|
||||
<&clock CLK_MOUT_MPLL_USER_T>,
|
||||
<&clock CLK_ACLK200>,
|
||||
<&clock CLK_ACLK400_MCUISP>,
|
||||
<&clock CLK_DIV_ACLK200>,
|
||||
<&clock CLK_DIV_ACLK400_MCUISP>,
|
||||
<&clock CLK_UART_ISP_SCLK>;
|
||||
clock-names = "lite0", "lite1", "ppmuispx",
|
||||
"ppmuispmx", "isp",
|
||||
"drc", "fd", "mcuisp",
|
||||
"gicisp", "mcuctl_isp", "pwm_isp",
|
||||
"ispdiv0", "ispdiv1", "mcuispdiv0",
|
||||
"mcuispdiv1", "mpll", "aclk200",
|
||||
"aclk400mcuisp", "div_aclk200",
|
||||
"div_aclk400mcuisp", "uart";
|
||||
iommus = <&sysmmu_fimc_isp>, <&sysmmu_fimc_drc>,
|
||||
<&sysmmu_fimc_fd>, <&sysmmu_fimc_mcuctl>;
|
||||
iommu-names = "isp", "drc", "fd", "mcuctl";
|
||||
power-domains = <&pd_isp>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
pmu@10020000 {
|
||||
reg = <0x10020000 0x3000>;
|
||||
};
|
||||
|
||||
i2c-isp@12140000 {
|
||||
compatible = "samsung,exynos4212-i2c-isp";
|
||||
reg = <0x12140000 0x100>;
|
||||
clocks = <&isp_clock CLK_ISP_I2C1_ISP>;
|
||||
clock-names = "i2c_isp";
|
||||
pinctrl-0 = <&fimc_is_i2c1>;
|
||||
pinctrl-names = "default";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
image-sensor@10 {
|
||||
compatible = "samsung,s5k6a3";
|
||||
reg = <0x10>;
|
||||
svdda-supply = <&cam_io_reg>;
|
||||
svddio-supply = <&ldo19_reg>;
|
||||
afvdd-supply = <&ldo19_reg>;
|
||||
clock-frequency = <24000000>;
|
||||
/* CAM_B_CLKOUT */
|
||||
clocks = <&camera 1>;
|
||||
clock-names = "extclk";
|
||||
gpios = <&gpm1 6 GPIO_ACTIVE_LOW>;
|
||||
|
||||
port {
|
||||
endpoint {
|
||||
remote-endpoint = <&csis1_ep>;
|
||||
data-lanes = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,165 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/samsung,s5c73m3.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung S5C73M3 8Mp camera ISP
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
|
||||
description:
|
||||
The S5C73M3 camera ISP supports MIPI CSI-2 and parallel (ITU-R BT.656)
|
||||
video data busses. The I2C bus is the main control bus and additionally the
|
||||
SPI bus is used, mostly for transferring the firmware to and from the
|
||||
device. Two slave device nodes corresponding to these control bus
|
||||
interfaces are required and should be placed under respective bus
|
||||
controller nodes.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: samsung,s5c73m3
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: cis_extclk
|
||||
|
||||
clock-frequency:
|
||||
default: 24000000
|
||||
description: cis_extclk clock frequency.
|
||||
|
||||
standby-gpios:
|
||||
maxItems: 1
|
||||
description: STANDBY pin.
|
||||
|
||||
vdda-supply:
|
||||
description: Analog power supply (1.2V).
|
||||
|
||||
vdd-af-supply:
|
||||
description: lens power supply (2.8V).
|
||||
|
||||
vddio-cis-supply:
|
||||
description: CIS I/O power supply (1.2V to 1.8V).
|
||||
|
||||
vddio-host-supply:
|
||||
description: Host I/O power supply (1.8V to 2.8V).
|
||||
|
||||
vdd-int-supply:
|
||||
description: Digital power supply (1.2V).
|
||||
|
||||
vdd-reg-supply:
|
||||
description: Regulator input power supply (2.8V).
|
||||
|
||||
xshutdown-gpios:
|
||||
maxItems: 1
|
||||
description: XSHUTDOWN pin.
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
endpoint:
|
||||
$ref: /schemas/media/video-interfaces.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
data-lanes:
|
||||
items:
|
||||
- const: 1
|
||||
- const: 2
|
||||
- const: 3
|
||||
- const: 4
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
- if:
|
||||
required:
|
||||
- spi-max-frequency
|
||||
then:
|
||||
properties:
|
||||
# The SPI node is simplified firmware-transfer interface only
|
||||
clocks: false
|
||||
clock-names: false
|
||||
standby-gpios: false
|
||||
vdda-supply: false
|
||||
vdd-af-supply: false
|
||||
vddio-cis-supply: false
|
||||
vddio-host-supply: false
|
||||
vdd-int-supply: false
|
||||
vdd-reg-supply: false
|
||||
xshutdown-gpios: false
|
||||
port: false
|
||||
else:
|
||||
required:
|
||||
- clocks
|
||||
- clock-names
|
||||
- standby-gpios
|
||||
- vdda-supply
|
||||
- vdd-af-supply
|
||||
- vddio-cis-supply
|
||||
- vddio-host-supply
|
||||
- vdd-int-supply
|
||||
- vdd-reg-supply
|
||||
- xshutdown-gpios
|
||||
- port
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
image-sensor@3c {
|
||||
compatible = "samsung,s5c73m3";
|
||||
reg = <0x3c>;
|
||||
clock-frequency = <24000000>;
|
||||
clocks = <&camera 0>;
|
||||
clock-names = "cis_extclk";
|
||||
standby-gpios = <&gpm0 6 GPIO_ACTIVE_LOW>;
|
||||
vdda-supply = <&cam_vdda_reg>;
|
||||
vdd-af-supply = <&cam_af_reg>;
|
||||
vddio-cis-supply = <&ldo9_reg>;
|
||||
vddio-host-supply = <&ldo18_reg>;
|
||||
vdd-int-supply = <&buck9_reg>;
|
||||
vdd-reg-supply = <&cam_io_reg>;
|
||||
xshutdown-gpios = <&gpf1 3 GPIO_ACTIVE_LOW>; /* ISP_RESET */
|
||||
|
||||
port {
|
||||
s5c73m3_ep: endpoint {
|
||||
remote-endpoint = <&csis0_ep>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
image-sensor@0 {
|
||||
compatible = "samsung,s5c73m3";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <50000000>;
|
||||
controller-data {
|
||||
samsung,spi-feedback-delay = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,209 +0,0 @@
|
|||
Samsung S5P/Exynos SoC Camera Subsystem (FIMC)
|
||||
----------------------------------------------
|
||||
|
||||
The S5P/Exynos SoC Camera subsystem comprises of multiple sub-devices
|
||||
represented by separate device tree nodes. Currently this includes: FIMC (in
|
||||
the S5P SoCs series known as CAMIF), MIPI CSIS, FIMC-LITE and FIMC-IS (ISP).
|
||||
|
||||
The sub-subdevices are defined as child nodes of the common 'camera' node which
|
||||
also includes common properties of the whole subsystem not really specific to
|
||||
any single sub-device, like common camera port pins or the CAMCLK clock outputs
|
||||
for external image sensors attached to an SoC.
|
||||
|
||||
Common 'camera' node
|
||||
--------------------
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: must be "samsung,fimc", "simple-bus"
|
||||
- clocks: list of clock specifiers, corresponding to entries in
|
||||
the clock-names property;
|
||||
- clock-names : must contain "sclk_cam0", "sclk_cam1", "pxl_async0",
|
||||
"pxl_async1" entries, matching entries in the clocks property.
|
||||
|
||||
- #clock-cells: from the common clock bindings (../clock/clock-bindings.txt),
|
||||
must be 1. A clock provider is associated with the 'camera' node and it should
|
||||
be referenced by external sensors that use clocks provided by the SoC on
|
||||
CAM_*_CLKOUT pins. The clock specifier cell stores an index of a clock.
|
||||
The indices are 0, 1 for CAM_A_CLKOUT, CAM_B_CLKOUT clocks respectively.
|
||||
|
||||
- clock-output-names: from the common clock bindings, should contain names of
|
||||
clocks registered by the camera subsystem corresponding to CAM_A_CLKOUT,
|
||||
CAM_B_CLKOUT output clocks respectively.
|
||||
|
||||
The pinctrl bindings defined in ../pinctrl/pinctrl-bindings.txt must be used
|
||||
to define a required pinctrl state named "default" and optional pinctrl states:
|
||||
"idle", "active-a", active-b". These optional states can be used to switch the
|
||||
camera port pinmux at runtime. The "idle" state should configure both the camera
|
||||
ports A and B into high impedance state, especially the CAMCLK clock output
|
||||
should be inactive. For the "active-a" state the camera port A must be activated
|
||||
and the port B deactivated and for the state "active-b" it should be the other
|
||||
way around.
|
||||
|
||||
The 'camera' node must include at least one 'fimc' child node.
|
||||
|
||||
|
||||
'fimc' device nodes
|
||||
-------------------
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: "samsung,s5pv210-fimc" for S5PV210, "samsung,exynos4210-fimc"
|
||||
for Exynos4210 and "samsung,exynos4212-fimc" for Exynos4x12 SoCs;
|
||||
- reg: physical base address and length of the registers set for the device;
|
||||
- interrupts: should contain FIMC interrupt;
|
||||
- clocks: list of clock specifiers, must contain an entry for each required
|
||||
entry in clock-names;
|
||||
- clock-names: must contain "fimc", "sclk_fimc" entries.
|
||||
- samsung,pix-limits: an array of maximum supported image sizes in pixels, for
|
||||
details refer to Table 2-1 in the S5PV210 SoC User Manual; The meaning of
|
||||
each cell is as follows:
|
||||
0 - scaler input horizontal size,
|
||||
1 - input horizontal size for the scaler bypassed,
|
||||
2 - REAL_WIDTH without input rotation,
|
||||
3 - REAL_HEIGHT with input rotation,
|
||||
- samsung,sysreg: a phandle to the SYSREG node.
|
||||
|
||||
Each FIMC device should have an alias in the aliases node, in the form of
|
||||
fimc<n>, where <n> is an integer specifying the IP block instance.
|
||||
|
||||
Optional properties:
|
||||
|
||||
- clock-frequency: maximum FIMC local clock (LCLK) frequency;
|
||||
- samsung,min-pix-sizes: an array specyfing minimum image size in pixels at
|
||||
the FIMC input and output DMA, in the first and second cell respectively.
|
||||
Default value when this property is not present is <16 16>;
|
||||
- samsung,min-pix-alignment: minimum supported image height alignment (first
|
||||
cell) and the horizontal image offset (second cell). The values are in pixels
|
||||
and default to <2 1> when this property is not present;
|
||||
- samsung,mainscaler-ext: a boolean property indicating whether the FIMC IP
|
||||
supports extended image size and has CIEXTEN register;
|
||||
- samsung,rotators: a bitmask specifying whether this IP has the input and
|
||||
the output rotator. Bits 4 and 0 correspond to input and output rotator
|
||||
respectively. If a rotator is present its corresponding bit should be set.
|
||||
Default value when this property is not specified is 0x11.
|
||||
- samsung,cam-if: a bolean property indicating whether the IP block includes
|
||||
the camera input interface.
|
||||
- samsung,isp-wb: this property must be present if the IP block has the ISP
|
||||
writeback input.
|
||||
- samsung,lcd-wb: this property must be present if the IP block has the LCD
|
||||
writeback input.
|
||||
|
||||
|
||||
'parallel-ports' node
|
||||
---------------------
|
||||
|
||||
This node should contain child 'port' nodes specifying active parallel video
|
||||
input ports. It includes camera A and camera B inputs. 'reg' property in the
|
||||
port nodes specifies data input - 1, 2 indicates input A, B respectively.
|
||||
|
||||
Optional properties
|
||||
|
||||
- samsung,camclk-out (deprecated) : specifies clock output for remote sensor,
|
||||
0 - CAM_A_CLKOUT, 1 - CAM_B_CLKOUT;
|
||||
|
||||
Image sensor nodes
|
||||
------------------
|
||||
|
||||
The sensor device nodes should be added to their control bus controller (e.g.
|
||||
I2C0) nodes and linked to a port node in the csis or the parallel-ports node,
|
||||
using the common video interfaces bindings, defined in video-interfaces.txt.
|
||||
|
||||
Example:
|
||||
|
||||
aliases {
|
||||
fimc0 = &fimc_0;
|
||||
};
|
||||
|
||||
/* Parallel bus IF sensor */
|
||||
i2c_0: i2c@13860000 {
|
||||
s5k6aa: sensor@3c {
|
||||
compatible = "samsung,s5k6aafx";
|
||||
reg = <0x3c>;
|
||||
vddio-supply = <...>;
|
||||
|
||||
clock-frequency = <24000000>;
|
||||
clocks = <&camera 1>;
|
||||
clock-names = "mclk";
|
||||
|
||||
port {
|
||||
s5k6aa_ep: endpoint {
|
||||
remote-endpoint = <&fimc0_ep>;
|
||||
bus-width = <8>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <1>;
|
||||
pclk-sample = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* MIPI CSI-2 bus IF sensor */
|
||||
s5c73m3: sensor@1a {
|
||||
compatible = "samsung,s5c73m3";
|
||||
reg = <0x1a>;
|
||||
vddio-supply = <...>;
|
||||
|
||||
clock-frequency = <24000000>;
|
||||
clocks = <&camera 0>;
|
||||
clock-names = "mclk";
|
||||
|
||||
port {
|
||||
s5c73m3_1: endpoint {
|
||||
data-lanes = <1 2 3 4>;
|
||||
remote-endpoint = <&csis0_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
camera {
|
||||
compatible = "samsung,fimc", "simple-bus";
|
||||
clocks = <&clock 132>, <&clock 133>, <&clock 351>,
|
||||
<&clock 352>;
|
||||
clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0",
|
||||
"pxl_async1";
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "cam_a_clkout", "cam_b_clkout";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cam_port_a_clk_active>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/* parallel camera ports */
|
||||
parallel-ports {
|
||||
/* camera A input */
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
fimc0_ep: endpoint {
|
||||
remote-endpoint = <&s5k6aa_ep>;
|
||||
bus-width = <8>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <1>;
|
||||
pclk-sample = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fimc_0: fimc@11800000 {
|
||||
compatible = "samsung,exynos4210-fimc";
|
||||
reg = <0x11800000 0x1000>;
|
||||
interrupts = <0 85 0>;
|
||||
};
|
||||
|
||||
csis_0: csis@11880000 {
|
||||
compatible = "samsung,exynos4210-csis";
|
||||
reg = <0x11880000 0x1000>;
|
||||
interrupts = <0 78 0>;
|
||||
/* camera C input */
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
csis0_ep: endpoint {
|
||||
remote-endpoint = <&s5c73m3_ep>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
samsung,csis-hs-settle = <12>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
The MIPI-CSIS device binding is defined in samsung-mipi-csis.txt.
|
||||
|
|
@ -1,81 +0,0 @@
|
|||
Samsung S5P/Exynos SoC series MIPI CSI-2 receiver (MIPI CSIS)
|
||||
-------------------------------------------------------------
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "samsung,s5pv210-csis" for S5PV210 (S5PC110),
|
||||
"samsung,exynos4210-csis" for Exynos4210 (S5PC210),
|
||||
"samsung,exynos4212-csis" for Exynos4212/Exynos4412,
|
||||
"samsung,exynos5250-csis" for Exynos5250;
|
||||
- reg : offset and length of the register set for the device;
|
||||
- interrupts : should contain MIPI CSIS interrupt; the format of the
|
||||
interrupt specifier depends on the interrupt controller;
|
||||
- bus-width : maximum number of data lanes supported (SoC specific);
|
||||
- vddio-supply : MIPI CSIS I/O and PLL voltage supply (e.g. 1.8V);
|
||||
- vddcore-supply : MIPI CSIS Core voltage supply (e.g. 1.1V);
|
||||
- clocks : list of clock specifiers, corresponding to entries in
|
||||
clock-names property;
|
||||
- clock-names : must contain "csis", "sclk_csis" entries, matching entries
|
||||
in the clocks property.
|
||||
|
||||
Optional properties:
|
||||
|
||||
- clock-frequency : The IP's main (system bus) clock frequency in Hz, default
|
||||
value when this property is not specified is 166 MHz;
|
||||
- samsung,csis-wclk : CSI-2 wrapper clock selection. If this property is present
|
||||
external clock from CMU will be used, or the bus clock if
|
||||
if it's not specified.
|
||||
|
||||
The device node should contain one 'port' child node with one child 'endpoint'
|
||||
node, according to the bindings defined in Documentation/devicetree/bindings/
|
||||
media/video-interfaces.txt. The following are properties specific to those nodes.
|
||||
|
||||
port node
|
||||
---------
|
||||
|
||||
- reg : (required) must be 3 for camera C input (CSIS0) or 4 for
|
||||
camera D input (CSIS1);
|
||||
|
||||
endpoint node
|
||||
-------------
|
||||
|
||||
- data-lanes : (required) an array specifying active physical MIPI-CSI2
|
||||
data input lanes and their mapping to logical lanes; the
|
||||
array's content is unused, only its length is meaningful;
|
||||
|
||||
- samsung,csis-hs-settle : (optional) differential receiver (HS-RX) settle time;
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
reg0: regulator@0 {
|
||||
};
|
||||
|
||||
reg1: regulator@1 {
|
||||
};
|
||||
|
||||
/* SoC properties */
|
||||
|
||||
csis_0: csis@11880000 {
|
||||
compatible = "samsung,exynos4210-csis";
|
||||
reg = <0x11880000 0x1000>;
|
||||
interrupts = <0 78 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
/* Board properties */
|
||||
|
||||
csis_0: csis@11880000 {
|
||||
clock-frequency = <166000000>;
|
||||
vddio-supply = <®0>;
|
||||
vddcore-supply = <®1>;
|
||||
port {
|
||||
reg = <3>; /* 3 - CSIS0, 4 - CSIS1 */
|
||||
csis0_ep: endpoint {
|
||||
remote-endpoint = <...>;
|
||||
data-lanes = <1>, <2>;
|
||||
samsung,csis-hs-settle = <12>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,97 +0,0 @@
|
|||
Samsung S5C73M3 8Mp camera ISP
|
||||
------------------------------
|
||||
|
||||
The S5C73M3 camera ISP supports MIPI CSI-2 and parallel (ITU-R BT.656) video
|
||||
data busses. The I2C bus is the main control bus and additionally the SPI bus
|
||||
is used, mostly for transferring the firmware to and from the device. Two
|
||||
slave device nodes corresponding to these control bus interfaces are required
|
||||
and should be placed under respective bus controller nodes.
|
||||
|
||||
I2C slave device node
|
||||
---------------------
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "samsung,s5c73m3";
|
||||
- reg : I2C slave address of the sensor;
|
||||
- vdd-int-supply : digital power supply (1.2V);
|
||||
- vdda-supply : analog power supply (1.2V);
|
||||
- vdd-reg-supply : regulator input power supply (2.8V);
|
||||
- vddio-host-supply : host I/O power supply (1.8V to 2.8V);
|
||||
- vddio-cis-supply : CIS I/O power supply (1.2V to 1.8V);
|
||||
- vdd-af-supply : lens power supply (2.8V);
|
||||
- xshutdown-gpios : specifier of GPIO connected to the XSHUTDOWN pin;
|
||||
- standby-gpios : specifier of GPIO connected to the STANDBY pin;
|
||||
- clocks : should contain list of phandle and clock specifier pairs
|
||||
according to common clock bindings for the clocks described
|
||||
in the clock-names property;
|
||||
- clock-names : should contain "cis_extclk" entry for the CIS_EXTCLK clock;
|
||||
|
||||
Optional properties:
|
||||
|
||||
- clock-frequency : the frequency at which the "cis_extclk" clock should be
|
||||
configured to operate, in Hz; if this property is not
|
||||
specified default 24 MHz value will be used.
|
||||
|
||||
The common video interfaces bindings (see video-interfaces.txt) should be used
|
||||
to specify link from the S5C73M3 to an external image data receiver. The S5C73M3
|
||||
device node should contain one 'port' child node with an 'endpoint' subnode for
|
||||
this purpose. The data link from a raw image sensor to the S5C73M3 can be
|
||||
similarly specified, but it is optional since the S5C73M3 ISP and a raw image
|
||||
sensor are usually inseparable and form a hybrid module.
|
||||
|
||||
Following properties are valid for the endpoint node(s):
|
||||
|
||||
endpoint subnode
|
||||
----------------
|
||||
|
||||
- data-lanes : (optional) specifies MIPI CSI-2 data lanes as covered in
|
||||
video-interfaces.txt. This sensor doesn't support data lane remapping
|
||||
and physical lane indexes in subsequent elements of the array should
|
||||
be only consecutive ascending values.
|
||||
|
||||
SPI device node
|
||||
---------------
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "samsung,s5c73m3";
|
||||
|
||||
For more details see description of the SPI busses bindings
|
||||
(../spi/spi-bus.txt) and bindings of a specific bus controller.
|
||||
|
||||
Example:
|
||||
|
||||
i2c@138a000000 {
|
||||
...
|
||||
s5c73m3@3c {
|
||||
compatible = "samsung,s5c73m3";
|
||||
reg = <0x3c>;
|
||||
vdd-int-supply = <&buck9_reg>;
|
||||
vdda-supply = <&ldo17_reg>;
|
||||
vdd-reg-supply = <&cam_io_reg>;
|
||||
vddio-host-supply = <&ldo18_reg>;
|
||||
vddio-cis-supply = <&ldo9_reg>;
|
||||
vdd-af-supply = <&cam_af_reg>;
|
||||
clock-frequency = <24000000>;
|
||||
clocks = <&clk 0>;
|
||||
clock-names = "cis_extclk";
|
||||
xshutdown-gpios = <&gpf1 3 1>;
|
||||
standby-gpios = <&gpm0 1 1>;
|
||||
port {
|
||||
s5c73m3_ep: endpoint {
|
||||
remote-endpoint = <&csis0_ep>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
spi@1392000 {
|
||||
...
|
||||
s5c73m3_spi: s5c73m3@0 {
|
||||
compatible = "samsung,s5c73m3";
|
||||
reg = <0>;
|
||||
...
|
||||
};
|
||||
};
|
||||
|
|
@ -1,58 +0,0 @@
|
|||
Samsung S5K5BAF UXGA 1/5" 2M CMOS Image Sensor with embedded SoC ISP
|
||||
--------------------------------------------------------------------
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "samsung,s5k5baf";
|
||||
- reg : I2C slave address of the sensor;
|
||||
- vdda-supply : analog power supply 2.8V (2.6V to 3.0V);
|
||||
- vddreg-supply : regulator input power supply 1.8V (1.7V to 1.9V)
|
||||
or 2.8V (2.6V to 3.0);
|
||||
- vddio-supply : I/O power supply 1.8V (1.65V to 1.95V)
|
||||
or 2.8V (2.5V to 3.1V);
|
||||
- stbyn-gpios : GPIO connected to STDBYN pin;
|
||||
- rstn-gpios : GPIO connected to RSTN pin;
|
||||
- clocks : list of phandle and clock specifier pairs
|
||||
according to common clock bindings for the
|
||||
clocks described in clock-names;
|
||||
- clock-names : should include "mclk" for the sensor's master clock;
|
||||
|
||||
Optional properties:
|
||||
|
||||
- clock-frequency : the frequency at which the "mclk" clock should be
|
||||
configured to operate, in Hz; if this property is not
|
||||
specified default 24 MHz value will be used.
|
||||
|
||||
The device node should contain one 'port' child node with one child 'endpoint'
|
||||
node, according to the bindings defined in Documentation/devicetree/bindings/
|
||||
media/video-interfaces.txt. The following are properties specific to those
|
||||
nodes.
|
||||
|
||||
endpoint node
|
||||
-------------
|
||||
|
||||
- data-lanes : (optional) specifies MIPI CSI-2 data lanes as covered in
|
||||
video-interfaces.txt. If present it should be <1> - the device
|
||||
supports only one data lane without re-mapping.
|
||||
|
||||
Example:
|
||||
|
||||
s5k5bafx@2d {
|
||||
compatible = "samsung,s5k5baf";
|
||||
reg = <0x2d>;
|
||||
vdda-supply = <&cam_io_en_reg>;
|
||||
vddreg-supply = <&vt_core_15v_reg>;
|
||||
vddio-supply = <&vtcam_reg>;
|
||||
stbyn-gpios = <&gpl2 0 1>;
|
||||
rstn-gpios = <&gpl2 1 1>;
|
||||
clock-names = "mclk";
|
||||
clocks = <&clock_cam 0>;
|
||||
clock-frequency = <24000000>;
|
||||
|
||||
port {
|
||||
s5k5bafx_ep: endpoint {
|
||||
remote-endpoint = <&csis1_ep>;
|
||||
data-lanes = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,33 +0,0 @@
|
|||
Samsung S5K6A3(YX) raw image sensor
|
||||
---------------------------------
|
||||
|
||||
S5K6A3(YX) is a raw image sensor with MIPI CSI-2 and CCP2 image data interfaces
|
||||
and CCI (I2C compatible) control bus.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "samsung,s5k6a3";
|
||||
- reg : I2C slave address of the sensor;
|
||||
- svdda-supply : core voltage supply;
|
||||
- svddio-supply : I/O voltage supply;
|
||||
- afvdd-supply : AF (actuator) voltage supply;
|
||||
- gpios : specifier of a GPIO connected to the RESET pin;
|
||||
- clocks : should contain list of phandle and clock specifier pairs
|
||||
according to common clock bindings for the clocks described
|
||||
in the clock-names property;
|
||||
- clock-names : should contain "extclk" entry for the sensor's EXTCLK clock;
|
||||
|
||||
Optional properties:
|
||||
|
||||
- clock-frequency : the frequency at which the "extclk" clock should be
|
||||
configured to operate, in Hz; if this property is not
|
||||
specified default 24 MHz value will be used.
|
||||
|
||||
The common video interfaces bindings (see video-interfaces.txt) should be
|
||||
used to specify link to the image data receiver. The S5K6A3(YX) device
|
||||
node should contain one 'port' child node with an 'endpoint' subnode.
|
||||
|
||||
Following properties are valid for the endpoint node:
|
||||
|
||||
- data-lanes : (optional) specifies MIPI CSI-2 data lanes as covered in
|
||||
video-interfaces.txt. The sensor supports only one data lane.
|
||||
|
|
@ -1,26 +0,0 @@
|
|||
* Silicon Labs FM Radio receiver
|
||||
|
||||
The Silicon Labs Si470x is family of FM radio receivers with receive power scan
|
||||
supporting 76-108 MHz, programmable through an I2C interface.
|
||||
Some of them includes an RDS encoder.
|
||||
|
||||
Required Properties:
|
||||
- compatible: Should contain "silabs,si470x"
|
||||
- reg: the I2C address of the device
|
||||
|
||||
Optional Properties:
|
||||
- interrupts : The interrupt number
|
||||
- reset-gpios: GPIO specifier for the chips reset line
|
||||
|
||||
Example:
|
||||
|
||||
&i2c2 {
|
||||
si470x@63 {
|
||||
compatible = "silabs,si470x";
|
||||
reg = <0x63>;
|
||||
|
||||
interrupt-parent = <&gpj2>;
|
||||
interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
|
||||
reset-gpios = <&gpj2 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,48 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/silabs,si470x.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Silicon Labs Si470x FM Radio Receiver
|
||||
|
||||
maintainers:
|
||||
- Hans Verkuil <hverkuil@xs4all.nl>
|
||||
- Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: silabs,si470x
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
fmradio@10 {
|
||||
compatible = "silabs,si470x";
|
||||
reg = <0x10>;
|
||||
interrupt-parent = <&gpj2>;
|
||||
interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
|
||||
reset-gpios = <&gpj2 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,53 +0,0 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/st,stm32-cec.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: STMicroelectronics STM32 CEC
|
||||
|
||||
maintainers:
|
||||
- Yannick Fertre <yannick.fertre@foss.st.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: st,stm32-cec
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Module Clock
|
||||
- description: Bus Clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: cec
|
||||
- const: hdmi-cec
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/stm32mp1-clks.h>
|
||||
cec: cec@40006c00 {
|
||||
compatible = "st,stm32-cec";
|
||||
reg = <0x40006c00 0x400>;
|
||||
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&rcc CEC_K>, <&clk_lse>;
|
||||
clock-names = "cec", "hdmi-cec";
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -47,7 +47,7 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
ti,camerrx-control:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
items:
|
||||
- items:
|
||||
- description: phandle to device control module
|
||||
|
|
|
|||
|
|
@ -56,6 +56,28 @@ analogue data is never read from the pixel matrix that are outside the
|
|||
configured selection rectangle that designates crop. The difference has an
|
||||
effect in device timing and likely also in power consumption.
|
||||
|
||||
CCS static data
|
||||
---------------
|
||||
|
||||
The MIPI CCS driver supports CCS static data for all compliant devices,
|
||||
including not just those compliant with CCS 1.1 but also CCS 1.0 and SMIA(++).
|
||||
For CCS the file names are formed as
|
||||
|
||||
ccs/ccs-sensor-vvvv-mmmm-rrrr.fw (sensor) and
|
||||
ccs/ccs-module-vvvv-mmmm-rrrr.fw (module).
|
||||
|
||||
For SMIA++ compliant devices the corresponding file names are
|
||||
|
||||
ccs/smiapp-sensor-vv-mmmm-rr.fw (sensor) and
|
||||
ccs/smiapp-module-vv-mmmm-rrrr.fw (module).
|
||||
|
||||
For SMIA (non-++) compliant devices the static data file name is
|
||||
|
||||
ccs/smia-sensor-vv-mmmm-rr.fw (sensor).
|
||||
|
||||
vvvv or vv denotes MIPI and SMIA manufacturer IDs respectively, mmmm model ID
|
||||
and rrrr or rr revision number.
|
||||
|
||||
Register definition generator
|
||||
-----------------------------
|
||||
|
||||
|
|
|
|||
|
|
@ -67,6 +67,7 @@ ioctls must be supported by all video overlay devices.
|
|||
Setup
|
||||
=====
|
||||
|
||||
*Note: support for this has been removed.*
|
||||
Before overlay can commence applications must program the driver with
|
||||
frame buffer parameters, namely the address and size of the frame buffer
|
||||
and the image format, for example RGB 5:6:5. The
|
||||
|
|
@ -92,11 +93,13 @@ A driver may support any (or none) of five clipping/blending methods:
|
|||
1. Chroma-keying displays the overlaid image only where pixels in the
|
||||
primary graphics surface assume a certain color.
|
||||
|
||||
2. A bitmap can be specified where each bit corresponds to a pixel in
|
||||
2. *Note: support for this has been removed.*
|
||||
A bitmap can be specified where each bit corresponds to a pixel in
|
||||
the overlaid image. When the bit is set, the corresponding video
|
||||
pixel is displayed, otherwise a pixel of the graphics surface.
|
||||
|
||||
3. A list of clipping rectangles can be specified. In these regions *no*
|
||||
3. *Note: support for this has been removed.*
|
||||
A list of clipping rectangles can be specified. In these regions *no*
|
||||
video is displayed, so the graphics surface can be seen here.
|
||||
|
||||
4. The framebuffer has an alpha channel that can be used to clip or
|
||||
|
|
@ -185,6 +188,7 @@ struct v4l2_window
|
|||
be 0xRRGGBB on a little endian, 0xBBGGRR on a big endian host.
|
||||
|
||||
``struct v4l2_clip * clips``
|
||||
*Note: support for this has been removed.*
|
||||
When chroma-keying has *not* been negotiated and
|
||||
:ref:`VIDIOC_G_FBUF <VIDIOC_G_FBUF>` indicated this capability,
|
||||
applications can set this field to point to an array of clipping
|
||||
|
|
@ -201,6 +205,7 @@ struct v4l2_window
|
|||
are undefined.
|
||||
|
||||
``__u32 clipcount``
|
||||
*Note: support for this has been removed.*
|
||||
When the application set the ``clips`` field, this field must
|
||||
contain the number of clipping rectangles in the list. When clip
|
||||
lists are not supported the driver ignores this field, its contents
|
||||
|
|
@ -208,6 +213,7 @@ struct v4l2_window
|
|||
supported but no clipping is desired this field must be set to zero.
|
||||
|
||||
``void * bitmap``
|
||||
*Note: support for this has been removed.*
|
||||
When chroma-keying has *not* been negotiated and
|
||||
:ref:`VIDIOC_G_FBUF <VIDIOC_G_FBUF>` indicated this capability,
|
||||
applications can set this field to point to a clipping bit mask.
|
||||
|
|
|
|||
|
|
@ -88,6 +88,11 @@ Compressed Formats
|
|||
- ``V4L2_PIX_FMT_H263``
|
||||
- 'H263'
|
||||
- H263 video elementary stream.
|
||||
* .. _V4L2-PIX-FMT-SPK:
|
||||
|
||||
- ``V4L2_PIX_FMT_SPK``
|
||||
- 'SPK0'
|
||||
- Sorenson Spark is an implementation of H.263 for use in Flash Video and Adobe Flash files
|
||||
* .. _V4L2-PIX-FMT-MPEG1:
|
||||
|
||||
- ``V4L2_PIX_FMT_MPEG1``
|
||||
|
|
@ -232,6 +237,26 @@ Compressed Formats
|
|||
Metadata associated with the frame to decode is required to be passed
|
||||
through the ``V4L2_CID_STATELESS_FWHT_PARAMS`` control.
|
||||
See the :ref:`associated Codec Control ID <codec-stateless-fwht>`.
|
||||
* .. _V4L2-PIX-FMT-RV30:
|
||||
|
||||
- ``V4L2_PIX_FMT_RV30``
|
||||
- 'RV30'
|
||||
- RealVideo, or also spelled as Real Video, is a suite of
|
||||
proprietary video compression formats developed by
|
||||
RealNetworks - the specific format changes with the version.
|
||||
RealVideo codecs are identified by four-character codes.
|
||||
RV30 corresponds to RealVideo 8, suspected to be based
|
||||
largely on an early draft of H.264
|
||||
* .. _V4L2-PIX-FMT-RV40:
|
||||
|
||||
- ``V4L2_PIX_FMT_RV40``
|
||||
- 'RV40'
|
||||
- RV40 represents RealVideo 9 and RealVideo 10.
|
||||
RealVideo 9, suspected to be based on H.264.
|
||||
RealVideo 10, aka RV9 EHQ, This refers to an improved encoder
|
||||
for the RV9 format that is fully backwards compatible with
|
||||
RV9 players - the format and decoder did not change, only
|
||||
the encoder did. As a result, it uses the same FourCC.
|
||||
|
||||
.. raw:: latex
|
||||
|
||||
|
|
|
|||
|
|
@ -257,6 +257,34 @@ the second byte and Y'\ :sub:`7-0` in the third byte.
|
|||
- The padding bits contain undefined values that must be ignored by all
|
||||
applications and drivers.
|
||||
|
||||
The next table lists the packed YUV 4:4:4 formats with 12 bits per component.
|
||||
Expand the bits per component to 16 bits, data in the high bits, zeros in the low bits,
|
||||
arranged in little endian order, storing 1 pixel in 6 bytes.
|
||||
|
||||
.. flat-table:: Packed YUV 4:4:4 Image Formats (12bpc)
|
||||
:header-rows: 1
|
||||
:stub-columns: 0
|
||||
|
||||
* - Identifier
|
||||
- Code
|
||||
- Byte 1-0
|
||||
- Byte 3-2
|
||||
- Byte 5-4
|
||||
- Byte 7-6
|
||||
- Byte 9-8
|
||||
- Byte 11-10
|
||||
|
||||
* .. _V4L2-PIX-FMT-YUV48-12:
|
||||
|
||||
- ``V4L2_PIX_FMT_YUV48_12``
|
||||
- 'Y312'
|
||||
|
||||
- Y'\ :sub:`0`
|
||||
- Cb\ :sub:`0`
|
||||
- Cr\ :sub:`0`
|
||||
- Y'\ :sub:`1`
|
||||
- Cb\ :sub:`1`
|
||||
- Cr\ :sub:`1`
|
||||
|
||||
4:2:2 Subsampling
|
||||
=================
|
||||
|
|
|
|||
|
|
@ -953,6 +953,48 @@ number of bits for each component.
|
|||
|
||||
\endgroup
|
||||
|
||||
12 Bits Per Component
|
||||
==============================
|
||||
|
||||
These formats store an RGB triplet in six or eight bytes, with 12 bits per component.
|
||||
Expand the bits per component to 16 bits, data in the high bits, zeros in the low bits,
|
||||
arranged in little endian order.
|
||||
|
||||
.. raw:: latex
|
||||
|
||||
\small
|
||||
|
||||
.. flat-table:: RGB Formats With 12 Bits Per Component
|
||||
:header-rows: 1
|
||||
|
||||
* - Identifier
|
||||
- Code
|
||||
- Byte 1-0
|
||||
- Byte 3-2
|
||||
- Byte 5-4
|
||||
- Byte 7-6
|
||||
* .. _V4L2-PIX-FMT-BGR48-12:
|
||||
|
||||
- ``V4L2_PIX_FMT_BGR48_12``
|
||||
- 'B312'
|
||||
|
||||
- B\ :sub:`15-4`
|
||||
- G\ :sub:`15-4`
|
||||
- R\ :sub:`15-4`
|
||||
-
|
||||
* .. _V4L2-PIX-FMT-ABGR64-12:
|
||||
|
||||
- ``V4L2_PIX_FMT_ABGR64_12``
|
||||
- 'B412'
|
||||
|
||||
- B\ :sub:`15-4`
|
||||
- G\ :sub:`15-4`
|
||||
- R\ :sub:`15-4`
|
||||
- A\ :sub:`15-4`
|
||||
|
||||
.. raw:: latex
|
||||
|
||||
\normalsize
|
||||
|
||||
Deprecated RGB Formats
|
||||
======================
|
||||
|
|
|
|||
|
|
@ -103,6 +103,17 @@ are often referred to as greyscale formats.
|
|||
- ...
|
||||
- ...
|
||||
|
||||
* .. _V4L2-PIX-FMT-Y012:
|
||||
|
||||
- ``V4L2_PIX_FMT_Y012``
|
||||
- 'Y012'
|
||||
|
||||
- Y'\ :sub:`0`\ [3:0] `0000`
|
||||
- Y'\ :sub:`0`\ [11:4]
|
||||
- ...
|
||||
- ...
|
||||
- ...
|
||||
|
||||
* .. _V4L2-PIX-FMT-Y14:
|
||||
|
||||
- ``V4L2_PIX_FMT_Y14``
|
||||
|
|
@ -146,3 +157,7 @@ are often referred to as greyscale formats.
|
|||
than 16 bits. For example, 10 bits per pixel uses values in the range 0 to
|
||||
1023. For the IPU3_Y10 format 25 pixels are packed into 32 bytes, which
|
||||
leaves the 6 most significant bits of the last byte padded with 0.
|
||||
|
||||
For Y012 and Y12 formats, Y012 places its data in the 12 high bits, with
|
||||
padding zeros in the 4 low bits, in contrast to the Y12 format, which has
|
||||
its padding located in the most significant bits of the 16 bit word.
|
||||
|
|
|
|||
|
|
@ -123,6 +123,20 @@ All components are stored with the same number of bits per component.
|
|||
- Cb, Cr
|
||||
- Yes
|
||||
- 4x4 tiles
|
||||
* - V4L2_PIX_FMT_P012
|
||||
- 'P012'
|
||||
- 12
|
||||
- 4:2:0
|
||||
- Cb, Cr
|
||||
- Yes
|
||||
- Linear
|
||||
* - V4L2_PIX_FMT_P012M
|
||||
- 'PM12'
|
||||
- 12
|
||||
- 4:2:0
|
||||
- Cb, Cr
|
||||
- No
|
||||
- Linear
|
||||
* - V4L2_PIX_FMT_NV16
|
||||
- 'NV16'
|
||||
- 8
|
||||
|
|
@ -586,6 +600,86 @@ Data in the 10 high bits, zeros in the 6 low bits, arranged in little endian ord
|
|||
- Cb\ :sub:`11`
|
||||
- Cr\ :sub:`11`
|
||||
|
||||
.. _V4L2-PIX-FMT-P012:
|
||||
.. _V4L2-PIX-FMT-P012M:
|
||||
|
||||
P012 and P012M
|
||||
--------------
|
||||
|
||||
P012 is like NV12 with 12 bits per component, expanded to 16 bits.
|
||||
Data in the 12 high bits, zeros in the 4 low bits, arranged in little endian order.
|
||||
|
||||
.. flat-table:: Sample 4x4 P012 Image
|
||||
:header-rows: 0
|
||||
:stub-columns: 0
|
||||
|
||||
* - start + 0:
|
||||
- Y'\ :sub:`00`
|
||||
- Y'\ :sub:`01`
|
||||
- Y'\ :sub:`02`
|
||||
- Y'\ :sub:`03`
|
||||
* - start + 8:
|
||||
- Y'\ :sub:`10`
|
||||
- Y'\ :sub:`11`
|
||||
- Y'\ :sub:`12`
|
||||
- Y'\ :sub:`13`
|
||||
* - start + 16:
|
||||
- Y'\ :sub:`20`
|
||||
- Y'\ :sub:`21`
|
||||
- Y'\ :sub:`22`
|
||||
- Y'\ :sub:`23`
|
||||
* - start + 24:
|
||||
- Y'\ :sub:`30`
|
||||
- Y'\ :sub:`31`
|
||||
- Y'\ :sub:`32`
|
||||
- Y'\ :sub:`33`
|
||||
* - start + 32:
|
||||
- Cb\ :sub:`00`
|
||||
- Cr\ :sub:`00`
|
||||
- Cb\ :sub:`01`
|
||||
- Cr\ :sub:`01`
|
||||
* - start + 40:
|
||||
- Cb\ :sub:`10`
|
||||
- Cr\ :sub:`10`
|
||||
- Cb\ :sub:`11`
|
||||
- Cr\ :sub:`11`
|
||||
|
||||
.. flat-table:: Sample 4x4 P012M Image
|
||||
:header-rows: 0
|
||||
:stub-columns: 0
|
||||
|
||||
* - start0 + 0:
|
||||
- Y'\ :sub:`00`
|
||||
- Y'\ :sub:`01`
|
||||
- Y'\ :sub:`02`
|
||||
- Y'\ :sub:`03`
|
||||
* - start0 + 8:
|
||||
- Y'\ :sub:`10`
|
||||
- Y'\ :sub:`11`
|
||||
- Y'\ :sub:`12`
|
||||
- Y'\ :sub:`13`
|
||||
* - start0 + 16:
|
||||
- Y'\ :sub:`20`
|
||||
- Y'\ :sub:`21`
|
||||
- Y'\ :sub:`22`
|
||||
- Y'\ :sub:`23`
|
||||
* - start0 + 24:
|
||||
- Y'\ :sub:`30`
|
||||
- Y'\ :sub:`31`
|
||||
- Y'\ :sub:`32`
|
||||
- Y'\ :sub:`33`
|
||||
* -
|
||||
* - start1 + 0:
|
||||
- Cb\ :sub:`00`
|
||||
- Cr\ :sub:`00`
|
||||
- Cb\ :sub:`01`
|
||||
- Cr\ :sub:`01`
|
||||
* - start1 + 8:
|
||||
- Cb\ :sub:`10`
|
||||
- Cr\ :sub:`10`
|
||||
- Cb\ :sub:`11`
|
||||
- Cr\ :sub:`11`
|
||||
|
||||
|
||||
Fully Planar YUV Formats
|
||||
========================
|
||||
|
|
|
|||
|
|
@ -72,6 +72,7 @@ Function Reference
|
|||
vidioc-subdev-g-frame-interval
|
||||
vidioc-subdev-g-routing
|
||||
vidioc-subdev-g-selection
|
||||
vidioc-subdev-g-client-cap
|
||||
vidioc-subdev-querycap
|
||||
vidioc-subscribe-event
|
||||
func-mmap
|
||||
|
|
|
|||
|
|
@ -185,6 +185,16 @@ still cause this situation.
|
|||
- ``p_u32``
|
||||
- A pointer to a matrix control of unsigned 32-bit values. Valid if
|
||||
this control is of type ``V4L2_CTRL_TYPE_U32``.
|
||||
* - __u32 *
|
||||
- ``p_s32``
|
||||
- A pointer to a matrix control of signed 32-bit values. Valid if
|
||||
this control is of type ``V4L2_CTRL_TYPE_INTEGER`` and
|
||||
``V4L2_CTRL_FLAG_HAS_PAYLOAD`` is set.
|
||||
* - __u32 *
|
||||
- ``p_s64``
|
||||
- A pointer to a matrix control of signed 64-bit values. Valid if
|
||||
this control is of type ``V4L2_CTRL_TYPE_INTEGER64`` and
|
||||
``V4L2_CTRL_FLAG_HAS_PAYLOAD`` is set.
|
||||
* - struct :c:type:`v4l2_area` *
|
||||
- ``p_area``
|
||||
- A pointer to a struct :c:type:`v4l2_area`. Valid if this control is
|
||||
|
|
|
|||
|
|
@ -49,6 +49,9 @@ of a graphics card. A non-destructive overlay blends video images into a
|
|||
VGA signal or graphics into a video signal. *Video Output Overlays* are
|
||||
always non-destructive.
|
||||
|
||||
Destructive overlay support has been removed: with modern GPUs and CPUs
|
||||
this is no longer needed, and it was always a very dangerous feature.
|
||||
|
||||
To get the current parameters applications call the :ref:`VIDIOC_G_FBUF <VIDIOC_G_FBUF>`
|
||||
ioctl with a pointer to a struct :c:type:`v4l2_framebuffer`
|
||||
structure. The driver fills all fields of the structure or returns an
|
||||
|
|
@ -63,18 +66,12 @@ this structure, the driver prepares for the overlay and returns the
|
|||
framebuffer parameters as :ref:`VIDIOC_G_FBUF <VIDIOC_G_FBUF>` does, or it returns an error
|
||||
code.
|
||||
|
||||
To set the parameters for a *non-destructive Video Overlay*,
|
||||
To set the parameters for a *Video Capture Overlay*
|
||||
applications must initialize the ``flags`` field, the ``fmt``
|
||||
substructure, and call :ref:`VIDIOC_S_FBUF <VIDIOC_G_FBUF>`. Again the driver prepares for
|
||||
the overlay and returns the framebuffer parameters as :ref:`VIDIOC_G_FBUF <VIDIOC_G_FBUF>`
|
||||
does, or it returns an error code.
|
||||
|
||||
For a *destructive Video Overlay* applications must additionally provide
|
||||
a ``base`` address. Setting up a DMA to a random memory location can
|
||||
jeopardize the system security, its stability or even damage the
|
||||
hardware, therefore only the superuser can set the parameters for a
|
||||
destructive video overlay.
|
||||
|
||||
.. tabularcolumns:: |p{3.5cm}|p{3.5cm}|p{3.5cm}|p{6.6cm}|
|
||||
|
||||
.. c:type:: v4l2_framebuffer
|
||||
|
|
@ -100,17 +97,14 @@ destructive video overlay.
|
|||
- ``base``
|
||||
-
|
||||
- Physical base address of the framebuffer, that is the address of
|
||||
the pixel in the top left corner of the framebuffer. [#f1]_
|
||||
* -
|
||||
-
|
||||
-
|
||||
- This field is irrelevant to *non-destructive Video Overlays*. For
|
||||
*destructive Video Overlays* applications must provide a base
|
||||
address. The driver may accept only base addresses which are a
|
||||
multiple of two, four or eight bytes. For *Video Output Overlays*
|
||||
the driver must return a valid base address, so applications can
|
||||
the pixel in the top left corner of the framebuffer.
|
||||
For :ref:`VIDIOC_S_FBUF <VIDIOC_G_FBUF>` this field is no longer supported
|
||||
and the kernel will always set this to NULL.
|
||||
For *Video Output Overlays*
|
||||
the driver will return a valid base address, so applications can
|
||||
find the corresponding Linux framebuffer device (see
|
||||
:ref:`osd`).
|
||||
:ref:`osd`). For *Video Capture Overlays* this field will always be
|
||||
NULL.
|
||||
* - struct
|
||||
- ``fmt``
|
||||
-
|
||||
|
|
@ -136,8 +130,7 @@ destructive video overlay.
|
|||
* -
|
||||
-
|
||||
-
|
||||
- For *destructive Video Overlays* applications must initialize this
|
||||
field. For *Video Output Overlays* the driver must return a valid
|
||||
- For *Video Output Overlays* the driver must return a valid
|
||||
format.
|
||||
* -
|
||||
-
|
||||
|
|
@ -165,13 +158,6 @@ destructive video overlay.
|
|||
|
||||
This field is irrelevant to *non-destructive Video Overlays*.
|
||||
|
||||
For *destructive Video Overlays* both applications and drivers can
|
||||
set this field to request padding bytes at the end of each line.
|
||||
Drivers however may ignore the requested value, returning
|
||||
``width`` times bytes-per-pixel or a larger value required by the
|
||||
hardware. That implies applications can just set this field to
|
||||
zero to get a reasonable default.
|
||||
|
||||
For *Video Output Overlays* the driver must return a valid value.
|
||||
|
||||
Video hardware may access padding bytes, therefore they must
|
||||
|
|
@ -190,9 +176,8 @@ destructive video overlay.
|
|||
* -
|
||||
- __u32
|
||||
- ``sizeimage``
|
||||
- This field is irrelevant to *non-destructive Video Overlays*. For
|
||||
*destructive Video Overlays* applications must initialize this
|
||||
field. For *Video Output Overlays* the driver must return a valid
|
||||
- This field is irrelevant to *non-destructive Video Overlays*.
|
||||
For *Video Output Overlays* the driver must return a valid
|
||||
format.
|
||||
|
||||
Together with ``base`` it defines the framebuffer memory
|
||||
|
|
@ -232,9 +217,11 @@ destructive video overlay.
|
|||
* - ``V4L2_FBUF_CAP_LIST_CLIPPING``
|
||||
- 0x0004
|
||||
- The device supports clipping using a list of clip rectangles.
|
||||
Note that this is no longer supported.
|
||||
* - ``V4L2_FBUF_CAP_BITMAP_CLIPPING``
|
||||
- 0x0008
|
||||
- The device supports clipping using a bit mask.
|
||||
Note that this is no longer supported.
|
||||
* - ``V4L2_FBUF_CAP_LOCAL_ALPHA``
|
||||
- 0x0010
|
||||
- The device supports clipping/blending using the alpha channel of
|
||||
|
|
@ -342,10 +329,3 @@ EPERM
|
|||
|
||||
EINVAL
|
||||
The :ref:`VIDIOC_S_FBUF <VIDIOC_G_FBUF>` parameters are unsuitable.
|
||||
|
||||
.. [#f1]
|
||||
A physical base address may not suit all platforms. GK notes in
|
||||
theory we should pass something like PCI device + memory region +
|
||||
offset instead. If you encounter problems please discuss on the
|
||||
linux-media mailing list:
|
||||
`https://linuxtv.org/lists.php <https://linuxtv.org/lists.php>`__.
|
||||
|
|
|
|||
|
|
@ -31,18 +31,30 @@ Arguments
|
|||
Description
|
||||
===========
|
||||
|
||||
This ioctl allows applications to enumerate all frame sizes supported by
|
||||
a sub-device on the given pad for the given media bus format. Supported
|
||||
formats can be retrieved with the
|
||||
This ioctl allows applications to access the enumeration of frame sizes
|
||||
supported by a sub-device on the specified pad
|
||||
for the specified media bus format.
|
||||
Supported formats can be retrieved with the
|
||||
:ref:`VIDIOC_SUBDEV_ENUM_MBUS_CODE`
|
||||
ioctl.
|
||||
|
||||
To enumerate frame sizes applications initialize the ``pad``, ``which``
|
||||
, ``code`` and ``index`` fields of the struct
|
||||
:c:type:`v4l2_subdev_mbus_code_enum` and
|
||||
call the :ref:`VIDIOC_SUBDEV_ENUM_FRAME_SIZE` ioctl with a pointer to the
|
||||
structure. Drivers fill the minimum and maximum frame sizes or return an
|
||||
EINVAL error code if one of the input parameters is invalid.
|
||||
The enumerations are defined by the driver, and indexed using the ``index`` field
|
||||
of the struct :c:type:`v4l2_subdev_frame_size_enum`.
|
||||
Each pair of ``pad`` and ``code`` correspond to a separate enumeration.
|
||||
Each enumeration starts with the ``index`` of 0, and
|
||||
the lowest invalid index marks the end of the enumeration.
|
||||
|
||||
Therefore, to enumerate frame sizes allowed on the specified pad
|
||||
and using the specified mbus format, initialize the
|
||||
``pad``, ``which``, and ``code`` fields to desired values,
|
||||
and set ``index`` to 0.
|
||||
Then call the :ref:`VIDIOC_SUBDEV_ENUM_FRAME_SIZE` ioctl with a pointer to the
|
||||
structure.
|
||||
|
||||
A successful call will return with minimum and maximum frame sizes filled in.
|
||||
Repeat with increasing ``index`` until ``EINVAL`` is received.
|
||||
``EINVAL`` means that either no more entries are available in the enumeration,
|
||||
or that an input parameter was invalid.
|
||||
|
||||
Sub-devices that only support discrete frame sizes (such as most
|
||||
sensors) will return one or more frame sizes with identical minimum and
|
||||
|
|
@ -72,26 +84,28 @@ information about try formats.
|
|||
|
||||
* - __u32
|
||||
- ``index``
|
||||
- Number of the format in the enumeration, set by the application.
|
||||
- Index of the frame size in the enumeration belonging to the given pad
|
||||
and format. Filled in by the application.
|
||||
* - __u32
|
||||
- ``pad``
|
||||
- Pad number as reported by the media controller API.
|
||||
Filled in by the application.
|
||||
* - __u32
|
||||
- ``code``
|
||||
- The media bus format code, as defined in
|
||||
:ref:`v4l2-mbus-format`.
|
||||
:ref:`v4l2-mbus-format`. Filled in by the application.
|
||||
* - __u32
|
||||
- ``min_width``
|
||||
- Minimum frame width, in pixels.
|
||||
- Minimum frame width, in pixels. Filled in by the driver.
|
||||
* - __u32
|
||||
- ``max_width``
|
||||
- Maximum frame width, in pixels.
|
||||
- Maximum frame width, in pixels. Filled in by the driver.
|
||||
* - __u32
|
||||
- ``min_height``
|
||||
- Minimum frame height, in pixels.
|
||||
- Minimum frame height, in pixels. Filled in by the driver.
|
||||
* - __u32
|
||||
- ``max_height``
|
||||
- Maximum frame height, in pixels.
|
||||
- Maximum frame height, in pixels. Filled in by the driver.
|
||||
* - __u32
|
||||
- ``which``
|
||||
- Frame sizes to be enumerated, from enum
|
||||
|
|
|
|||
|
|
@ -31,15 +31,28 @@ Arguments
|
|||
Description
|
||||
===========
|
||||
|
||||
To enumerate media bus formats available at a given sub-device pad
|
||||
applications initialize the ``pad``, ``which`` and ``index`` fields of
|
||||
struct
|
||||
:c:type:`v4l2_subdev_mbus_code_enum` and
|
||||
call the :ref:`VIDIOC_SUBDEV_ENUM_MBUS_CODE` ioctl with a pointer to this
|
||||
structure. Drivers fill the rest of the structure or return an ``EINVAL``
|
||||
error code if either the ``pad`` or ``index`` are invalid. All media bus
|
||||
formats are enumerable by beginning at index zero and incrementing by
|
||||
one until ``EINVAL`` is returned.
|
||||
This call is used by the application to access the enumeration
|
||||
of media bus formats for the selected pad.
|
||||
|
||||
The enumerations are defined by the driver, and indexed using the ``index`` field
|
||||
of struct :c:type:`v4l2_subdev_mbus_code_enum`.
|
||||
Each enumeration starts with the ``index`` of 0, and
|
||||
the lowest invalid index marks the end of enumeration.
|
||||
|
||||
Therefore, to enumerate media bus formats available at a given sub-device pad,
|
||||
initialize the ``pad``, and ``which`` fields to desired values,
|
||||
and set ``index`` to 0.
|
||||
Then call the :ref:`VIDIOC_SUBDEV_ENUM_MBUS_CODE` ioctl
|
||||
with a pointer to this structure.
|
||||
|
||||
A successful call will return with the ``code`` field filled in
|
||||
with a mbus code value.
|
||||
Repeat with increasing ``index`` until ``EINVAL`` is received.
|
||||
``EINVAL`` means that either ``pad`` is invalid,
|
||||
or that there are no more codes available at this pad.
|
||||
|
||||
The driver must not return the same value of ``code`` for different indices
|
||||
at the same pad.
|
||||
|
||||
Available media bus formats may depend on the current 'try' formats at
|
||||
other pads of the sub-device, as well as on the current active links.
|
||||
|
|
@ -57,14 +70,16 @@ information about the try formats.
|
|||
|
||||
* - __u32
|
||||
- ``pad``
|
||||
- Pad number as reported by the media controller API.
|
||||
- Pad number as reported by the media controller API. Filled in by the
|
||||
application.
|
||||
* - __u32
|
||||
- ``index``
|
||||
- Number of the format in the enumeration, set by the application.
|
||||
- Index of the mbus code in the enumeration belonging to the given pad.
|
||||
Filled in by the application.
|
||||
* - __u32
|
||||
- ``code``
|
||||
- The media bus format code, as defined in
|
||||
:ref:`v4l2-mbus-format`.
|
||||
:ref:`v4l2-mbus-format`. Filled in by the driver.
|
||||
* - __u32
|
||||
- ``which``
|
||||
- Media bus format codes to be enumerated, from enum
|
||||
|
|
|
|||
|
|
@ -0,0 +1,83 @@
|
|||
.. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
|
||||
.. c:namespace:: V4L
|
||||
|
||||
.. _VIDIOC_SUBDEV_G_CLIENT_CAP:
|
||||
|
||||
************************************************************
|
||||
ioctl VIDIOC_SUBDEV_G_CLIENT_CAP, VIDIOC_SUBDEV_S_CLIENT_CAP
|
||||
************************************************************
|
||||
|
||||
Name
|
||||
====
|
||||
|
||||
VIDIOC_SUBDEV_G_CLIENT_CAP - VIDIOC_SUBDEV_S_CLIENT_CAP - Get or set client
|
||||
capabilities.
|
||||
|
||||
Synopsis
|
||||
========
|
||||
|
||||
.. c:macro:: VIDIOC_SUBDEV_G_CLIENT_CAP
|
||||
|
||||
``int ioctl(int fd, VIDIOC_SUBDEV_G_CLIENT_CAP, struct v4l2_subdev_client_capability *argp)``
|
||||
|
||||
.. c:macro:: VIDIOC_SUBDEV_S_CLIENT_CAP
|
||||
|
||||
``int ioctl(int fd, VIDIOC_SUBDEV_S_CLIENT_CAP, struct v4l2_subdev_client_capability *argp)``
|
||||
|
||||
Arguments
|
||||
=========
|
||||
|
||||
``fd``
|
||||
File descriptor returned by :ref:`open() <func-open>`.
|
||||
|
||||
``argp``
|
||||
Pointer to struct :c:type:`v4l2_subdev_client_capability`.
|
||||
|
||||
Description
|
||||
===========
|
||||
|
||||
These ioctls are used to get and set the client (the application using the
|
||||
subdevice ioctls) capabilities. The client capabilities are stored in the file
|
||||
handle of the opened subdev device node, and the client must set the
|
||||
capabilities for each opened subdev separately.
|
||||
|
||||
By default no client capabilities are set when a subdev device node is opened.
|
||||
|
||||
The purpose of the client capabilities are to inform the kernel of the behavior
|
||||
of the client, mainly related to maintaining compatibility with different
|
||||
kernel and userspace versions.
|
||||
|
||||
The ``VIDIOC_SUBDEV_G_CLIENT_CAP`` ioctl returns the current client capabilities
|
||||
associated with the file handle ``fd``.
|
||||
|
||||
The ``VIDIOC_SUBDEV_S_CLIENT_CAP`` ioctl sets client capabilities for the file
|
||||
handle ``fd``. The new capabilities fully replace the current capabilities, the
|
||||
ioctl can therefore also be used to remove capabilities that have previously
|
||||
been set.
|
||||
|
||||
``VIDIOC_SUBDEV_S_CLIENT_CAP`` modifies the struct
|
||||
:c:type:`v4l2_subdev_client_capability` to reflect the capabilities that have
|
||||
been accepted. A common case for the kernel not accepting a capability is that
|
||||
the kernel is older than the headers the userspace uses, and thus the capability
|
||||
is unknown to the kernel.
|
||||
|
||||
.. flat-table:: Client Capabilities
|
||||
:header-rows: 1
|
||||
|
||||
* - Capability
|
||||
- Description
|
||||
* - ``V4L2_SUBDEV_CLIENT_CAP_STREAMS``
|
||||
- The client is aware of streams. Setting this flag enables the use
|
||||
of 'stream' fields (referring to the stream number) with various
|
||||
ioctls. If this is not set (which is the default), the 'stream' fields
|
||||
will be forced to 0 by the kernel.
|
||||
|
||||
Return Value
|
||||
============
|
||||
|
||||
On success 0 is returned, on error -1 and the ``errno`` variable is set
|
||||
appropriately. The generic error codes are described at the
|
||||
:ref:`Generic Error Codes <gen-errors>` chapter.
|
||||
|
||||
ENOIOCTLCMD
|
||||
The kernel does not support this ioctl.
|
||||
48
MAINTAINERS
48
MAINTAINERS
|
|
@ -1227,12 +1227,6 @@ F: Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml
|
|||
F: drivers/iio/addac/ad74413r.c
|
||||
F: include/dt-bindings/iio/addac/adi,ad74413r.h
|
||||
|
||||
ANALOG DEVICES INC AD9389B DRIVER
|
||||
M: Hans Verkuil <hverkuil-cisco@xs4all.nl>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/media/i2c/ad9389b*
|
||||
|
||||
ANALOG DEVICES INC ADA4250 DRIVER
|
||||
M: Antoniu Miclaus <antoniu.miclaus@analog.com>
|
||||
L: linux-iio@vger.kernel.org
|
||||
|
|
@ -8441,14 +8435,6 @@ L: platform-driver-x86@vger.kernel.org
|
|||
S: Maintained
|
||||
F: drivers/platform/x86/fujitsu-laptop.c
|
||||
|
||||
FUJITSU M-5MO LS CAMERA ISP DRIVER
|
||||
M: Kyungmin Park <kyungmin.park@samsung.com>
|
||||
M: Heungjun Kim <riverful.kim@samsung.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/media/i2c/m5mols/
|
||||
F: include/media/i2c/m5mols.h
|
||||
|
||||
FUJITSU TABLET EXTRAS
|
||||
M: Robert Gerlach <khnz@gmx.de>
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
|
|
@ -14206,14 +14192,6 @@ L: linux-mtd@lists.infradead.org
|
|||
S: Maintained
|
||||
F: drivers/mtd/devices/docg3*
|
||||
|
||||
MT9M032 APTINA SENSOR DRIVER
|
||||
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
F: drivers/media/i2c/mt9m032.c
|
||||
F: include/media/i2c/mt9m032.h
|
||||
|
||||
MT9P031 APTINA CAMERA SENSOR
|
||||
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
|
|
@ -14223,14 +14201,6 @@ F: Documentation/devicetree/bindings/media/i2c/aptina,mt9p031.yaml
|
|||
F: drivers/media/i2c/mt9p031.c
|
||||
F: include/media/i2c/mt9p031.h
|
||||
|
||||
MT9T001 APTINA CAMERA SENSOR
|
||||
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
F: drivers/media/i2c/mt9t001.c
|
||||
F: include/media/i2c/mt9t001.h
|
||||
|
||||
MT9T112 APTINA CAMERA SENSOR
|
||||
M: Jacopo Mondi <jacopo@jmondi.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
|
|
@ -14983,6 +14953,13 @@ F: Documentation/devicetree/bindings/clock/imx*
|
|||
F: drivers/clk/imx/
|
||||
F: include/dt-bindings/clock/imx*
|
||||
|
||||
NXP i.MX 8M ISI DRIVER
|
||||
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
|
||||
F: drivers/media/platform/nxp/imx8-isi/
|
||||
|
||||
NXP i.MX 8MQ DCSS DRIVER
|
||||
M: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
|
||||
R: Lucas Stach <l.stach@pengutronix.de>
|
||||
|
|
@ -15410,6 +15387,7 @@ M: Shunqian Zheng <zhengsq@rock-chips.com>
|
|||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
F: Documentation/devicetree/bindings/media/i2c/ovti,ov2685.yaml
|
||||
F: drivers/media/i2c/ov2685.c
|
||||
|
||||
OMNIVISION OV2740 SENSOR DRIVER
|
||||
|
|
@ -15501,7 +15479,7 @@ F: Documentation/devicetree/bindings/media/i2c/ov7740.txt
|
|||
F: drivers/media/i2c/ov7740.c
|
||||
|
||||
OMNIVISION OV8856 SENSOR DRIVER
|
||||
M: Dongchun Zhu <dongchun.zhu@mediatek.com>
|
||||
M: Sakari Ailus <sakari.ailus@linux.intel.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
|
|
@ -17260,6 +17238,7 @@ F: drivers/net/wwan/qcom_bam_dmux.c
|
|||
QUALCOMM CAMERA SUBSYSTEM DRIVER
|
||||
M: Robert Foss <rfoss@kernel.org>
|
||||
M: Todor Tomov <todor.too@gmail.com>
|
||||
M: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/admin-guide/media/qcom_camss.rst
|
||||
|
|
@ -18536,6 +18515,7 @@ M: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
|||
M: Andrzej Hajda <andrzej.hajda@intel.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/media/samsung,s5c73m3.yaml
|
||||
F: drivers/media/i2c/s5c73m3/*
|
||||
|
||||
SAMSUNG S5K5BAF CAMERA DRIVER
|
||||
|
|
@ -18560,6 +18540,11 @@ M: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
|||
L: linux-media@vger.kernel.org
|
||||
S: Supported
|
||||
Q: https://patchwork.linuxtv.org/project/linux-media/list/
|
||||
F: Documentation/devicetree/bindings/media/samsung,exynos4210-csis.yaml
|
||||
F: Documentation/devicetree/bindings/media/samsung,exynos4210-fimc.yaml
|
||||
F: Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml
|
||||
F: Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-lite.yaml
|
||||
F: Documentation/devicetree/bindings/media/samsung,fimc.yaml
|
||||
F: drivers/media/platform/samsung/exynos4-is/
|
||||
|
||||
SAMSUNG SOC CLOCK DRIVERS
|
||||
|
|
@ -19038,6 +19023,7 @@ L: linux-media@vger.kernel.org
|
|||
S: Odd Fixes
|
||||
W: https://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
F: Documentation/devicetree/bindings/media/silabs,si470x.yaml
|
||||
F: drivers/media/radio/si470x/radio-si470x-i2c.c
|
||||
|
||||
SI470X FM RADIO RECEIVER USB DRIVER
|
||||
|
|
|
|||
|
|
@ -1052,6 +1052,7 @@ void cec_received_msg_ts(struct cec_adapter *adap,
|
|||
u8 cmd = msg->msg[1];
|
||||
bool is_reply = false;
|
||||
bool valid_la = true;
|
||||
bool monitor_valid_la = true;
|
||||
u8 min_len = 0;
|
||||
|
||||
if (WARN_ON(!msg->len || msg->len > CEC_MAX_MSG_SIZE))
|
||||
|
|
@ -1093,8 +1094,10 @@ void cec_received_msg_ts(struct cec_adapter *adap,
|
|||
adap->last_initiator = 0xff;
|
||||
|
||||
/* Check if this message was for us (directed or broadcast). */
|
||||
if (!cec_msg_is_broadcast(msg))
|
||||
if (!cec_msg_is_broadcast(msg)) {
|
||||
valid_la = cec_has_log_addr(adap, msg_dest);
|
||||
monitor_valid_la = valid_la;
|
||||
}
|
||||
|
||||
/*
|
||||
* Check if the length is not too short or if the message is a
|
||||
|
|
@ -1227,7 +1230,7 @@ void cec_received_msg_ts(struct cec_adapter *adap,
|
|||
mutex_unlock(&adap->lock);
|
||||
|
||||
/* Pass the message on to any monitoring filehandles */
|
||||
cec_queue_msg_monitor(adap, msg, valid_la);
|
||||
cec_queue_msg_monitor(adap, msg, monitor_valid_la);
|
||||
|
||||
/* We're done if it is not for us or a poll message */
|
||||
if (!valid_la || msg->len <= 1)
|
||||
|
|
|
|||
|
|
@ -269,13 +269,12 @@ del_adap:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int cec_gpio_remove(struct platform_device *pdev)
|
||||
static void cec_gpio_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct cec_gpio *cec = platform_get_drvdata(pdev);
|
||||
|
||||
cec_notifier_cec_adap_unregister(cec->notifier, cec->adap);
|
||||
cec_unregister_adapter(cec->adap);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id cec_gpio_match[] = {
|
||||
|
|
@ -288,7 +287,7 @@ MODULE_DEVICE_TABLE(of, cec_gpio_match);
|
|||
|
||||
static struct platform_driver cec_gpio_pdrv = {
|
||||
.probe = cec_gpio_probe,
|
||||
.remove = cec_gpio_remove,
|
||||
.remove_new = cec_gpio_remove,
|
||||
.driver = {
|
||||
.name = "cec-gpio",
|
||||
.of_match_table = cec_gpio_match,
|
||||
|
|
|
|||
|
|
@ -225,6 +225,12 @@ static const struct cec_dmi_match cec_dmi_match_table[] = {
|
|||
{ "Google", "Kinox", "0000:00:02.0", "Port B" },
|
||||
/* Google Kuldax */
|
||||
{ "Google", "Kuldax", "0000:00:02.0", "Port B" },
|
||||
/* Google Aurash */
|
||||
{ "Google", "Aurash", "0000:00:02.0", "Port B" },
|
||||
/* Google Gladios */
|
||||
{ "Google", "Gladios", "0000:00:02.0", "Port B" },
|
||||
/* Google Lisbon */
|
||||
{ "Google", "Lisbon", "0000:00:02.0", "Port B" },
|
||||
};
|
||||
|
||||
static struct device *cros_ec_cec_find_hdmi_dev(struct device *dev,
|
||||
|
|
@ -326,31 +332,31 @@ out_probe_adapter:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int cros_ec_cec_remove(struct platform_device *pdev)
|
||||
static void cros_ec_cec_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct cros_ec_cec *cros_ec_cec = platform_get_drvdata(pdev);
|
||||
struct device *dev = &pdev->dev;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* blocking_notifier_chain_unregister() only fails if the notifier isn't
|
||||
* in the list. We know it was added to it by .probe(), so there should
|
||||
* be no need for error checking. Be cautious and still check.
|
||||
*/
|
||||
ret = blocking_notifier_chain_unregister(
|
||||
&cros_ec_cec->cros_ec->event_notifier,
|
||||
&cros_ec_cec->notifier);
|
||||
|
||||
if (ret) {
|
||||
if (ret)
|
||||
dev_err(dev, "failed to unregister notifier\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
cec_notifier_cec_adap_unregister(cros_ec_cec->notify,
|
||||
cros_ec_cec->adap);
|
||||
cec_unregister_adapter(cros_ec_cec->adap);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver cros_ec_cec_driver = {
|
||||
.probe = cros_ec_cec_probe,
|
||||
.remove = cros_ec_cec_remove,
|
||||
.remove_new = cros_ec_cec_remove,
|
||||
.driver = {
|
||||
.name = DRV_NAME,
|
||||
.pm = &cros_ec_cec_pm_ops,
|
||||
|
|
|
|||
|
|
@ -744,7 +744,7 @@ out_probe_adapter:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int meson_ao_cec_g12a_remove(struct platform_device *pdev)
|
||||
static void meson_ao_cec_g12a_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct meson_ao_cec_g12a_device *ao_cec = platform_get_drvdata(pdev);
|
||||
|
||||
|
|
@ -753,8 +753,6 @@ static int meson_ao_cec_g12a_remove(struct platform_device *pdev)
|
|||
cec_notifier_cec_adap_unregister(ao_cec->notify, ao_cec->adap);
|
||||
|
||||
cec_unregister_adapter(ao_cec->adap);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct meson_ao_cec_g12a_data ao_cec_g12a_data = {
|
||||
|
|
@ -780,7 +778,7 @@ MODULE_DEVICE_TABLE(of, meson_ao_cec_g12a_of_match);
|
|||
|
||||
static struct platform_driver meson_ao_cec_g12a_driver = {
|
||||
.probe = meson_ao_cec_g12a_probe,
|
||||
.remove = meson_ao_cec_g12a_remove,
|
||||
.remove_new = meson_ao_cec_g12a_remove,
|
||||
.driver = {
|
||||
.name = "meson-ao-cec-g12a",
|
||||
.of_match_table = of_match_ptr(meson_ao_cec_g12a_of_match),
|
||||
|
|
|
|||
|
|
@ -696,7 +696,7 @@ out_probe_adapter:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int meson_ao_cec_remove(struct platform_device *pdev)
|
||||
static void meson_ao_cec_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct meson_ao_cec_device *ao_cec = platform_get_drvdata(pdev);
|
||||
|
||||
|
|
@ -704,8 +704,6 @@ static int meson_ao_cec_remove(struct platform_device *pdev)
|
|||
|
||||
cec_notifier_cec_adap_unregister(ao_cec->notify, ao_cec->adap);
|
||||
cec_unregister_adapter(ao_cec->adap);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id meson_ao_cec_of_match[] = {
|
||||
|
|
@ -716,7 +714,7 @@ MODULE_DEVICE_TABLE(of, meson_ao_cec_of_match);
|
|||
|
||||
static struct platform_driver meson_ao_cec_driver = {
|
||||
.probe = meson_ao_cec_probe,
|
||||
.remove = meson_ao_cec_remove,
|
||||
.remove_new = meson_ao_cec_remove,
|
||||
.driver = {
|
||||
.name = "meson-ao-cec",
|
||||
.of_match_table = of_match_ptr(meson_ao_cec_of_match),
|
||||
|
|
|
|||
|
|
@ -249,14 +249,13 @@ err_delete_adapter:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int s5p_cec_remove(struct platform_device *pdev)
|
||||
static void s5p_cec_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct s5p_cec_dev *cec = platform_get_drvdata(pdev);
|
||||
|
||||
cec_notifier_cec_adap_unregister(cec->notifier, cec->adap);
|
||||
cec_unregister_adapter(cec->adap);
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __maybe_unused s5p_cec_runtime_suspend(struct device *dev)
|
||||
|
|
@ -295,7 +294,7 @@ MODULE_DEVICE_TABLE(of, s5p_cec_match);
|
|||
|
||||
static struct platform_driver s5p_cec_pdrv = {
|
||||
.probe = s5p_cec_probe,
|
||||
.remove = s5p_cec_remove,
|
||||
.remove_new = s5p_cec_remove,
|
||||
.driver = {
|
||||
.name = CEC_NAME,
|
||||
.of_match_table = s5p_cec_match,
|
||||
|
|
|
|||
|
|
@ -668,7 +668,7 @@ err:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int secocec_remove(struct platform_device *pdev)
|
||||
static void secocec_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct secocec_data *secocec = platform_get_drvdata(pdev);
|
||||
u16 val;
|
||||
|
|
@ -686,8 +686,6 @@ static int secocec_remove(struct platform_device *pdev)
|
|||
release_region(BRA_SMB_BASE_ADDR, 7);
|
||||
|
||||
dev_dbg(&pdev->dev, "CEC device removed\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
|
|
@ -780,7 +778,7 @@ static struct platform_driver secocec_driver = {
|
|||
.pm = SECOCEC_PM_OPS,
|
||||
},
|
||||
.probe = secocec_probe,
|
||||
.remove = secocec_remove,
|
||||
.remove_new = secocec_remove,
|
||||
};
|
||||
|
||||
module_platform_driver(secocec_driver);
|
||||
|
|
|
|||
|
|
@ -364,14 +364,12 @@ err_delete_adapter:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int stih_cec_remove(struct platform_device *pdev)
|
||||
static void stih_cec_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct stih_cec *cec = platform_get_drvdata(pdev);
|
||||
|
||||
cec_notifier_cec_adap_unregister(cec->notifier, cec->adap);
|
||||
cec_unregister_adapter(cec->adap);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id stih_cec_match[] = {
|
||||
|
|
@ -384,7 +382,7 @@ MODULE_DEVICE_TABLE(of, stih_cec_match);
|
|||
|
||||
static struct platform_driver stih_cec_pdrv = {
|
||||
.probe = stih_cec_probe,
|
||||
.remove = stih_cec_remove,
|
||||
.remove_new = stih_cec_remove,
|
||||
.driver = {
|
||||
.name = CEC_NAME,
|
||||
.of_match_table = stih_cec_match,
|
||||
|
|
|
|||
|
|
@ -344,7 +344,7 @@ err_unprepare_cec_clk:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int stm32_cec_remove(struct platform_device *pdev)
|
||||
static void stm32_cec_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct stm32_cec *cec = platform_get_drvdata(pdev);
|
||||
|
||||
|
|
@ -352,8 +352,6 @@ static int stm32_cec_remove(struct platform_device *pdev)
|
|||
clk_unprepare(cec->clk_hdmi_cec);
|
||||
|
||||
cec_unregister_adapter(cec->adap);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id stm32_cec_of_match[] = {
|
||||
|
|
@ -364,7 +362,7 @@ MODULE_DEVICE_TABLE(of, stm32_cec_of_match);
|
|||
|
||||
static struct platform_driver stm32_cec_driver = {
|
||||
.probe = stm32_cec_probe,
|
||||
.remove = stm32_cec_remove,
|
||||
.remove_new = stm32_cec_remove,
|
||||
.driver = {
|
||||
.name = CEC_NAME,
|
||||
.of_match_table = stm32_cec_of_match,
|
||||
|
|
|
|||
|
|
@ -421,7 +421,7 @@ err_clk:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int tegra_cec_remove(struct platform_device *pdev)
|
||||
static void tegra_cec_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct tegra_cec *cec = platform_get_drvdata(pdev);
|
||||
|
||||
|
|
@ -429,8 +429,6 @@ static int tegra_cec_remove(struct platform_device *pdev)
|
|||
|
||||
cec_notifier_cec_adap_unregister(cec->notifier, cec->adap);
|
||||
cec_unregister_adapter(cec->adap);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
|
@ -467,7 +465,7 @@ static struct platform_driver tegra_cec_driver = {
|
|||
.of_match_table = of_match_ptr(tegra_cec_of_match),
|
||||
},
|
||||
.probe = tegra_cec_probe,
|
||||
.remove = tegra_cec_remove,
|
||||
.remove_new = tegra_cec_remove,
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
.suspend = tegra_cec_suspend,
|
||||
|
|
|
|||
|
|
@ -1,29 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
*/
|
||||
struct btcx_riscmem {
|
||||
unsigned int size;
|
||||
__le32 *cpu;
|
||||
__le32 *jmp;
|
||||
dma_addr_t dma;
|
||||
};
|
||||
|
||||
struct btcx_skiplist {
|
||||
int start;
|
||||
int end;
|
||||
};
|
||||
|
||||
int btcx_riscmem_alloc(struct pci_dev *pci,
|
||||
struct btcx_riscmem *risc,
|
||||
unsigned int size);
|
||||
void btcx_riscmem_free(struct pci_dev *pci,
|
||||
struct btcx_riscmem *risc);
|
||||
|
||||
int btcx_screen_clips(int swidth, int sheight, struct v4l2_rect *win,
|
||||
struct v4l2_clip *clips, unsigned int n);
|
||||
int btcx_align(struct v4l2_rect *win, struct v4l2_clip *clips,
|
||||
unsigned int n, int mask);
|
||||
void btcx_sort_clips(struct v4l2_clip *clips, unsigned int nclips);
|
||||
void btcx_calc_skips(int line, int width, int *maxy,
|
||||
struct btcx_skiplist *skips, unsigned int *nskips,
|
||||
const struct v4l2_clip *clips, unsigned int nclips);
|
||||
|
|
@ -6,5 +6,5 @@ config VIDEO_SAA7146
|
|||
config VIDEO_SAA7146_VV
|
||||
tristate
|
||||
depends on VIDEO_DEV
|
||||
select VIDEOBUF_DMA_SG
|
||||
select VIDEOBUF2_DMA_SG
|
||||
select VIDEO_SAA7146
|
||||
|
|
|
|||
|
|
@ -37,7 +37,8 @@ void saa7146_setgpio(struct saa7146_dev *dev, int port, u32 data)
|
|||
{
|
||||
u32 value = 0;
|
||||
|
||||
BUG_ON(port > 3);
|
||||
if (WARN_ON(port > 3))
|
||||
return;
|
||||
|
||||
value = saa7146_read(dev, GPIO_CTRL);
|
||||
value &= ~(0xff << (8*port));
|
||||
|
|
@ -148,7 +149,8 @@ static struct scatterlist* vmalloc_to_sg(unsigned char *virt, int nr_pages)
|
|||
pg = vmalloc_to_page(virt);
|
||||
if (NULL == pg)
|
||||
goto err;
|
||||
BUG_ON(PageHighMem(pg));
|
||||
if (WARN_ON(PageHighMem(pg)))
|
||||
return NULL;
|
||||
sg_set_page(&sglist[i], pg, PAGE_SIZE, 0);
|
||||
}
|
||||
return sglist;
|
||||
|
|
@ -233,46 +235,32 @@ int saa7146_pgtable_alloc(struct pci_dev *pci, struct saa7146_pgtable *pt)
|
|||
}
|
||||
|
||||
int saa7146_pgtable_build_single(struct pci_dev *pci, struct saa7146_pgtable *pt,
|
||||
struct scatterlist *list, int sglen )
|
||||
struct scatterlist *list, int sglen)
|
||||
{
|
||||
struct sg_dma_page_iter dma_iter;
|
||||
__le32 *ptr, fill;
|
||||
int nr_pages = 0;
|
||||
int i,p;
|
||||
int i;
|
||||
|
||||
BUG_ON(0 == sglen);
|
||||
BUG_ON(list->offset > PAGE_SIZE);
|
||||
if (WARN_ON(!sglen) ||
|
||||
WARN_ON(list->offset > PAGE_SIZE))
|
||||
return -EIO;
|
||||
|
||||
/* if we have a user buffer, the first page may not be
|
||||
aligned to a page boundary. */
|
||||
pt->offset = list->offset;
|
||||
|
||||
ptr = pt->cpu;
|
||||
for (i = 0; i < sglen; i++, list++) {
|
||||
/*
|
||||
pr_debug("i:%d, adr:0x%08x, len:%d, offset:%d\n",
|
||||
i, sg_dma_address(list), sg_dma_len(list),
|
||||
list->offset);
|
||||
*/
|
||||
for (p = 0; p * 4096 < sg_dma_len(list); p++, ptr++) {
|
||||
*ptr = cpu_to_le32(sg_dma_address(list) + p * 4096);
|
||||
nr_pages++;
|
||||
}
|
||||
for_each_sg_dma_page(list, &dma_iter, sglen, 0) {
|
||||
*ptr++ = cpu_to_le32(sg_page_iter_dma_address(&dma_iter));
|
||||
nr_pages++;
|
||||
}
|
||||
|
||||
|
||||
/* safety; fill the page table up with the last valid page */
|
||||
fill = *(ptr-1);
|
||||
for(i=nr_pages;i<1024;i++) {
|
||||
for (i = nr_pages; i < 1024; i++)
|
||||
*ptr++ = fill;
|
||||
}
|
||||
|
||||
/*
|
||||
ptr = pt->cpu;
|
||||
pr_debug("offset: %d\n", pt->offset);
|
||||
for(i=0;i<5;i++) {
|
||||
pr_debug("ptr1 %d: 0x%08x\n", i, ptr[i]);
|
||||
}
|
||||
*/
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -7,12 +7,11 @@
|
|||
/****************************************************************************/
|
||||
/* resource management functions, shamelessly stolen from saa7134 driver */
|
||||
|
||||
int saa7146_res_get(struct saa7146_fh *fh, unsigned int bit)
|
||||
int saa7146_res_get(struct saa7146_dev *dev, unsigned int bit)
|
||||
{
|
||||
struct saa7146_dev *dev = fh->dev;
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
|
||||
if (fh->resources & bit) {
|
||||
if (vv->resources & bit) {
|
||||
DEB_D("already allocated! want: 0x%02x, cur:0x%02x\n",
|
||||
bit, vv->resources);
|
||||
/* have it already allocated */
|
||||
|
|
@ -27,41 +26,22 @@ int saa7146_res_get(struct saa7146_fh *fh, unsigned int bit)
|
|||
return 0;
|
||||
}
|
||||
/* it's free, grab it */
|
||||
fh->resources |= bit;
|
||||
vv->resources |= bit;
|
||||
DEB_D("res: get 0x%02x, cur:0x%02x\n", bit, vv->resources);
|
||||
return 1;
|
||||
}
|
||||
|
||||
void saa7146_res_free(struct saa7146_fh *fh, unsigned int bits)
|
||||
void saa7146_res_free(struct saa7146_dev *dev, unsigned int bits)
|
||||
{
|
||||
struct saa7146_dev *dev = fh->dev;
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
|
||||
BUG_ON((fh->resources & bits) != bits);
|
||||
WARN_ON((vv->resources & bits) != bits);
|
||||
|
||||
fh->resources &= ~bits;
|
||||
vv->resources &= ~bits;
|
||||
DEB_D("res: put 0x%02x, cur:0x%02x\n", bits, vv->resources);
|
||||
}
|
||||
|
||||
|
||||
/********************************************************************************/
|
||||
/* common dma functions */
|
||||
|
||||
void saa7146_dma_free(struct saa7146_dev *dev,struct videobuf_queue *q,
|
||||
struct saa7146_buf *buf)
|
||||
{
|
||||
struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
|
||||
DEB_EE("dev:%p, buf:%p\n", dev, buf);
|
||||
|
||||
videobuf_waiton(q, &buf->vb, 0, 0);
|
||||
videobuf_dma_unmap(q->dev, dma);
|
||||
videobuf_dma_free(dma);
|
||||
buf->vb.state = VIDEOBUF_NEEDS_INIT;
|
||||
}
|
||||
|
||||
|
||||
/********************************************************************************/
|
||||
/* common buffer functions */
|
||||
|
||||
|
|
@ -72,15 +52,15 @@ int saa7146_buffer_queue(struct saa7146_dev *dev,
|
|||
assert_spin_locked(&dev->slock);
|
||||
DEB_EE("dev:%p, dmaq:%p, buf:%p\n", dev, q, buf);
|
||||
|
||||
BUG_ON(!q);
|
||||
if (WARN_ON(!q))
|
||||
return -EIO;
|
||||
|
||||
if (NULL == q->curr) {
|
||||
q->curr = buf;
|
||||
DEB_D("immediately activating buffer %p\n", buf);
|
||||
buf->activate(dev,buf,NULL);
|
||||
} else {
|
||||
list_add_tail(&buf->vb.queue,&q->queue);
|
||||
buf->vb.state = VIDEOBUF_QUEUED;
|
||||
list_add_tail(&buf->list, &q->queue);
|
||||
DEB_D("adding buffer %p to queue. (active buffer present)\n",
|
||||
buf);
|
||||
}
|
||||
|
|
@ -91,21 +71,31 @@ void saa7146_buffer_finish(struct saa7146_dev *dev,
|
|||
struct saa7146_dmaqueue *q,
|
||||
int state)
|
||||
{
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
struct saa7146_buf *buf = q->curr;
|
||||
|
||||
assert_spin_locked(&dev->slock);
|
||||
DEB_EE("dev:%p, dmaq:%p, state:%d\n", dev, q, state);
|
||||
DEB_EE("q->curr:%p\n", q->curr);
|
||||
|
||||
/* finish current buffer */
|
||||
if (NULL == q->curr) {
|
||||
if (!buf) {
|
||||
DEB_D("aiii. no current buffer\n");
|
||||
return;
|
||||
}
|
||||
|
||||
q->curr->vb.state = state;
|
||||
q->curr->vb.ts = ktime_get_ns();
|
||||
wake_up(&q->curr->vb.done);
|
||||
|
||||
q->curr = NULL;
|
||||
buf->vb.vb2_buf.timestamp = ktime_get_ns();
|
||||
if (vv->video_fmt.field == V4L2_FIELD_ALTERNATE)
|
||||
buf->vb.field = vv->last_field;
|
||||
else if (vv->video_fmt.field == V4L2_FIELD_ANY)
|
||||
buf->vb.field = (vv->video_fmt.height > vv->standard->v_max_out / 2)
|
||||
? V4L2_FIELD_INTERLACED
|
||||
: V4L2_FIELD_BOTTOM;
|
||||
else
|
||||
buf->vb.field = vv->video_fmt.field;
|
||||
buf->vb.sequence = vv->seqnr++;
|
||||
vb2_buffer_done(&buf->vb.vb2_buf, state);
|
||||
}
|
||||
|
||||
void saa7146_buffer_next(struct saa7146_dev *dev,
|
||||
|
|
@ -113,17 +103,18 @@ void saa7146_buffer_next(struct saa7146_dev *dev,
|
|||
{
|
||||
struct saa7146_buf *buf,*next = NULL;
|
||||
|
||||
BUG_ON(!q);
|
||||
if (WARN_ON(!q))
|
||||
return;
|
||||
|
||||
DEB_INT("dev:%p, dmaq:%p, vbi:%d\n", dev, q, vbi);
|
||||
|
||||
assert_spin_locked(&dev->slock);
|
||||
if (!list_empty(&q->queue)) {
|
||||
/* activate next one from queue */
|
||||
buf = list_entry(q->queue.next,struct saa7146_buf,vb.queue);
|
||||
list_del(&buf->vb.queue);
|
||||
buf = list_entry(q->queue.next, struct saa7146_buf, list);
|
||||
list_del(&buf->list);
|
||||
if (!list_empty(&q->queue))
|
||||
next = list_entry(q->queue.next,struct saa7146_buf, vb.queue);
|
||||
next = list_entry(q->queue.next, struct saa7146_buf, list);
|
||||
q->curr = buf;
|
||||
DEB_INT("next buffer: buf:%p, prev:%p, next:%p\n",
|
||||
buf, q->queue.prev, q->queue.next);
|
||||
|
|
@ -171,7 +162,7 @@ void saa7146_buffer_timeout(struct timer_list *t)
|
|||
spin_lock_irqsave(&dev->slock,flags);
|
||||
if (q->curr) {
|
||||
DEB_D("timeout on %p\n", q->curr);
|
||||
saa7146_buffer_finish(dev,q,VIDEOBUF_ERROR);
|
||||
saa7146_buffer_finish(dev, q, VB2_BUF_STATE_ERROR);
|
||||
}
|
||||
|
||||
/* we don't restart the transfer here like other drivers do. when
|
||||
|
|
@ -180,256 +171,39 @@ void saa7146_buffer_timeout(struct timer_list *t)
|
|||
we mess up our capture logic. if a timeout occurs on another buffer,
|
||||
then something is seriously broken before, so no need to buffer the
|
||||
next capture IMHO... */
|
||||
/*
|
||||
saa7146_buffer_next(dev,q);
|
||||
*/
|
||||
|
||||
saa7146_buffer_next(dev, q, 0);
|
||||
|
||||
spin_unlock_irqrestore(&dev->slock,flags);
|
||||
}
|
||||
|
||||
/********************************************************************************/
|
||||
/* file operations */
|
||||
|
||||
static int fops_open(struct file *file)
|
||||
{
|
||||
struct video_device *vdev = video_devdata(file);
|
||||
struct saa7146_dev *dev = video_drvdata(file);
|
||||
struct saa7146_fh *fh = NULL;
|
||||
int result = 0;
|
||||
|
||||
DEB_EE("file:%p, dev:%s\n", file, video_device_node_name(vdev));
|
||||
|
||||
if (mutex_lock_interruptible(vdev->lock))
|
||||
return -ERESTARTSYS;
|
||||
|
||||
DEB_D("using: %p\n", dev);
|
||||
|
||||
/* check if an extension is registered */
|
||||
if( NULL == dev->ext ) {
|
||||
DEB_S("no extension registered for this device\n");
|
||||
result = -ENODEV;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* allocate per open data */
|
||||
fh = kzalloc(sizeof(*fh),GFP_KERNEL);
|
||||
if (NULL == fh) {
|
||||
DEB_S("cannot allocate memory for per open data\n");
|
||||
result = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
|
||||
v4l2_fh_init(&fh->fh, vdev);
|
||||
|
||||
file->private_data = &fh->fh;
|
||||
fh->dev = dev;
|
||||
|
||||
if (vdev->vfl_type == VFL_TYPE_VBI) {
|
||||
DEB_S("initializing vbi...\n");
|
||||
if (dev->ext_vv_data->capabilities & V4L2_CAP_VBI_CAPTURE)
|
||||
result = saa7146_vbi_uops.open(dev,file);
|
||||
if (dev->ext_vv_data->vbi_fops.open)
|
||||
dev->ext_vv_data->vbi_fops.open(file);
|
||||
} else {
|
||||
DEB_S("initializing video...\n");
|
||||
result = saa7146_video_uops.open(dev,file);
|
||||
}
|
||||
|
||||
if (0 != result) {
|
||||
goto out;
|
||||
}
|
||||
|
||||
if( 0 == try_module_get(dev->ext->module)) {
|
||||
result = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
result = 0;
|
||||
v4l2_fh_add(&fh->fh);
|
||||
out:
|
||||
if (fh && result != 0) {
|
||||
kfree(fh);
|
||||
file->private_data = NULL;
|
||||
}
|
||||
mutex_unlock(vdev->lock);
|
||||
return result;
|
||||
}
|
||||
|
||||
static int fops_release(struct file *file)
|
||||
{
|
||||
struct video_device *vdev = video_devdata(file);
|
||||
struct saa7146_fh *fh = file->private_data;
|
||||
struct saa7146_dev *dev = fh->dev;
|
||||
|
||||
DEB_EE("file:%p\n", file);
|
||||
|
||||
mutex_lock(vdev->lock);
|
||||
|
||||
if (vdev->vfl_type == VFL_TYPE_VBI) {
|
||||
if (dev->ext_vv_data->capabilities & V4L2_CAP_VBI_CAPTURE)
|
||||
saa7146_vbi_uops.release(dev,file);
|
||||
if (dev->ext_vv_data->vbi_fops.release)
|
||||
dev->ext_vv_data->vbi_fops.release(file);
|
||||
} else {
|
||||
saa7146_video_uops.release(dev,file);
|
||||
}
|
||||
|
||||
v4l2_fh_del(&fh->fh);
|
||||
v4l2_fh_exit(&fh->fh);
|
||||
module_put(dev->ext->module);
|
||||
file->private_data = NULL;
|
||||
kfree(fh);
|
||||
|
||||
mutex_unlock(vdev->lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int fops_mmap(struct file *file, struct vm_area_struct * vma)
|
||||
{
|
||||
struct video_device *vdev = video_devdata(file);
|
||||
struct saa7146_fh *fh = file->private_data;
|
||||
struct videobuf_queue *q;
|
||||
int res;
|
||||
|
||||
switch (vdev->vfl_type) {
|
||||
case VFL_TYPE_VIDEO: {
|
||||
DEB_EE("V4L2_BUF_TYPE_VIDEO_CAPTURE: file:%p, vma:%p\n",
|
||||
file, vma);
|
||||
q = &fh->video_q;
|
||||
break;
|
||||
}
|
||||
case VFL_TYPE_VBI: {
|
||||
DEB_EE("V4L2_BUF_TYPE_VBI_CAPTURE: file:%p, vma:%p\n",
|
||||
file, vma);
|
||||
if (fh->dev->ext_vv_data->capabilities & V4L2_CAP_SLICED_VBI_OUTPUT)
|
||||
return -ENODEV;
|
||||
q = &fh->vbi_q;
|
||||
break;
|
||||
}
|
||||
default:
|
||||
BUG();
|
||||
}
|
||||
|
||||
if (mutex_lock_interruptible(vdev->lock))
|
||||
return -ERESTARTSYS;
|
||||
res = videobuf_mmap_mapper(q, vma);
|
||||
mutex_unlock(vdev->lock);
|
||||
return res;
|
||||
}
|
||||
|
||||
static __poll_t __fops_poll(struct file *file, struct poll_table_struct *wait)
|
||||
{
|
||||
struct video_device *vdev = video_devdata(file);
|
||||
struct saa7146_fh *fh = file->private_data;
|
||||
struct videobuf_buffer *buf = NULL;
|
||||
struct videobuf_queue *q;
|
||||
__poll_t res = v4l2_ctrl_poll(file, wait);
|
||||
|
||||
DEB_EE("file:%p, poll:%p\n", file, wait);
|
||||
|
||||
if (vdev->vfl_type == VFL_TYPE_VBI) {
|
||||
if (fh->dev->ext_vv_data->capabilities & V4L2_CAP_SLICED_VBI_OUTPUT)
|
||||
return res | EPOLLOUT | EPOLLWRNORM;
|
||||
if( 0 == fh->vbi_q.streaming )
|
||||
return res | videobuf_poll_stream(file, &fh->vbi_q, wait);
|
||||
q = &fh->vbi_q;
|
||||
} else {
|
||||
DEB_D("using video queue\n");
|
||||
q = &fh->video_q;
|
||||
}
|
||||
|
||||
if (!list_empty(&q->stream))
|
||||
buf = list_entry(q->stream.next, struct videobuf_buffer, stream);
|
||||
|
||||
if (!buf) {
|
||||
DEB_D("buf == NULL!\n");
|
||||
return res | EPOLLERR;
|
||||
}
|
||||
|
||||
poll_wait(file, &buf->done, wait);
|
||||
if (buf->state == VIDEOBUF_DONE || buf->state == VIDEOBUF_ERROR) {
|
||||
DEB_D("poll succeeded!\n");
|
||||
return res | EPOLLIN | EPOLLRDNORM;
|
||||
}
|
||||
|
||||
DEB_D("nothing to poll for, buf->state:%d\n", buf->state);
|
||||
return res;
|
||||
}
|
||||
|
||||
static __poll_t fops_poll(struct file *file, struct poll_table_struct *wait)
|
||||
{
|
||||
struct video_device *vdev = video_devdata(file);
|
||||
__poll_t res;
|
||||
|
||||
mutex_lock(vdev->lock);
|
||||
res = __fops_poll(file, wait);
|
||||
mutex_unlock(vdev->lock);
|
||||
return res;
|
||||
}
|
||||
|
||||
static ssize_t fops_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
|
||||
{
|
||||
struct video_device *vdev = video_devdata(file);
|
||||
struct saa7146_fh *fh = file->private_data;
|
||||
int ret;
|
||||
|
||||
switch (vdev->vfl_type) {
|
||||
case VFL_TYPE_VIDEO:
|
||||
/*
|
||||
DEB_EE("V4L2_BUF_TYPE_VIDEO_CAPTURE: file:%p, data:%p, count:%lun",
|
||||
file, data, (unsigned long)count);
|
||||
*/
|
||||
return saa7146_video_uops.read(file,data,count,ppos);
|
||||
case VFL_TYPE_VBI:
|
||||
/*
|
||||
DEB_EE("V4L2_BUF_TYPE_VBI_CAPTURE: file:%p, data:%p, count:%lu\n",
|
||||
file, data, (unsigned long)count);
|
||||
*/
|
||||
if (fh->dev->ext_vv_data->capabilities & V4L2_CAP_VBI_CAPTURE) {
|
||||
if (mutex_lock_interruptible(vdev->lock))
|
||||
return -ERESTARTSYS;
|
||||
ret = saa7146_vbi_uops.read(file, data, count, ppos);
|
||||
mutex_unlock(vdev->lock);
|
||||
return ret;
|
||||
}
|
||||
return -EINVAL;
|
||||
default:
|
||||
BUG();
|
||||
}
|
||||
}
|
||||
|
||||
static ssize_t fops_write(struct file *file, const char __user *data, size_t count, loff_t *ppos)
|
||||
{
|
||||
struct video_device *vdev = video_devdata(file);
|
||||
struct saa7146_fh *fh = file->private_data;
|
||||
struct saa7146_dev *dev = video_drvdata(file);
|
||||
int ret;
|
||||
|
||||
switch (vdev->vfl_type) {
|
||||
case VFL_TYPE_VIDEO:
|
||||
if (vdev->vfl_type != VFL_TYPE_VBI || !dev->ext_vv_data->vbi_fops.write)
|
||||
return -EINVAL;
|
||||
case VFL_TYPE_VBI:
|
||||
if (fh->dev->ext_vv_data->vbi_fops.write) {
|
||||
if (mutex_lock_interruptible(vdev->lock))
|
||||
return -ERESTARTSYS;
|
||||
ret = fh->dev->ext_vv_data->vbi_fops.write(file, data, count, ppos);
|
||||
mutex_unlock(vdev->lock);
|
||||
return ret;
|
||||
}
|
||||
return -EINVAL;
|
||||
default:
|
||||
BUG();
|
||||
}
|
||||
if (mutex_lock_interruptible(vdev->lock))
|
||||
return -ERESTARTSYS;
|
||||
ret = dev->ext_vv_data->vbi_fops.write(file, data, count, ppos);
|
||||
mutex_unlock(vdev->lock);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct v4l2_file_operations video_fops =
|
||||
{
|
||||
.owner = THIS_MODULE,
|
||||
.open = fops_open,
|
||||
.release = fops_release,
|
||||
.read = fops_read,
|
||||
.open = v4l2_fh_open,
|
||||
.release = vb2_fop_release,
|
||||
.read = vb2_fop_read,
|
||||
.write = fops_write,
|
||||
.poll = fops_poll,
|
||||
.mmap = fops_mmap,
|
||||
.poll = vb2_fop_poll,
|
||||
.mmap = vb2_fop_mmap,
|
||||
.unlocked_ioctl = video_ioctl2,
|
||||
};
|
||||
|
||||
|
|
@ -516,33 +290,15 @@ int saa7146_vv_init(struct saa7146_dev* dev, struct saa7146_ext_vv *ext_vv)
|
|||
configuration data) */
|
||||
dev->ext_vv_data = ext_vv;
|
||||
|
||||
vv->d_clipping.cpu_addr =
|
||||
dma_alloc_coherent(&dev->pci->dev, SAA7146_CLIPPING_MEM,
|
||||
&vv->d_clipping.dma_handle, GFP_KERNEL);
|
||||
if( NULL == vv->d_clipping.cpu_addr ) {
|
||||
ERR("out of memory. aborting.\n");
|
||||
kfree(vv);
|
||||
v4l2_ctrl_handler_free(hdl);
|
||||
v4l2_device_unregister(&dev->v4l2_dev);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
saa7146_video_uops.init(dev,vv);
|
||||
if (dev->ext_vv_data->capabilities & V4L2_CAP_VBI_CAPTURE)
|
||||
saa7146_vbi_uops.init(dev,vv);
|
||||
|
||||
vv->ov_fb.fmt.width = vv->standard->h_max_out;
|
||||
vv->ov_fb.fmt.height = vv->standard->v_max_out;
|
||||
vv->ov_fb.fmt.pixelformat = V4L2_PIX_FMT_RGB565;
|
||||
vv->ov_fb.fmt.bytesperline = 2 * vv->ov_fb.fmt.width;
|
||||
vv->ov_fb.fmt.sizeimage = vv->ov_fb.fmt.bytesperline * vv->ov_fb.fmt.height;
|
||||
vv->ov_fb.fmt.colorspace = V4L2_COLORSPACE_SRGB;
|
||||
|
||||
fmt = &vv->video_fmt;
|
||||
fmt->width = 384;
|
||||
fmt->height = 288;
|
||||
fmt->pixelformat = V4L2_PIX_FMT_BGR24;
|
||||
fmt->field = V4L2_FIELD_ANY;
|
||||
fmt->field = V4L2_FIELD_INTERLACED;
|
||||
fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
|
||||
fmt->bytesperline = 3 * fmt->width;
|
||||
fmt->sizeimage = fmt->bytesperline * fmt->height;
|
||||
|
|
@ -561,8 +317,6 @@ int saa7146_vv_init(struct saa7146_dev* dev, struct saa7146_ext_vv *ext_vv)
|
|||
|
||||
timer_setup(&vv->vbi_read_timeout, NULL, 0);
|
||||
|
||||
vv->ov_fb.capability = V4L2_FBUF_CAP_LIST_CLIPPING;
|
||||
vv->ov_fb.flags = V4L2_FBUF_FLAG_PRIMARY;
|
||||
dev->vv_data = vv;
|
||||
dev->vv_callback = &vv_callback;
|
||||
|
||||
|
|
@ -577,8 +331,6 @@ int saa7146_vv_release(struct saa7146_dev* dev)
|
|||
DEB_EE("dev:%p\n", dev);
|
||||
|
||||
v4l2_device_unregister(&dev->v4l2_dev);
|
||||
dma_free_coherent(&dev->pci->dev, SAA7146_CLIPPING_MEM,
|
||||
vv->d_clipping.cpu_addr, vv->d_clipping.dma_handle);
|
||||
v4l2_ctrl_handler_free(&dev->ctrl_handler);
|
||||
kfree(vv);
|
||||
dev->vv_data = NULL;
|
||||
|
|
@ -591,16 +343,20 @@ EXPORT_SYMBOL_GPL(saa7146_vv_release);
|
|||
int saa7146_register_device(struct video_device *vfd, struct saa7146_dev *dev,
|
||||
char *name, int type)
|
||||
{
|
||||
struct vb2_queue *q;
|
||||
int err;
|
||||
int i;
|
||||
|
||||
DEB_EE("dev:%p, name:'%s', type:%d\n", dev, name, type);
|
||||
|
||||
vfd->fops = &video_fops;
|
||||
if (type == VFL_TYPE_VIDEO)
|
||||
if (type == VFL_TYPE_VIDEO) {
|
||||
vfd->ioctl_ops = &dev->ext_vv_data->vid_ops;
|
||||
else
|
||||
q = &dev->vv_data->video_dmaq.q;
|
||||
} else {
|
||||
vfd->ioctl_ops = &dev->ext_vv_data->vbi_ops;
|
||||
q = &dev->vv_data->vbi_dmaq.q;
|
||||
}
|
||||
vfd->release = video_device_release_empty;
|
||||
vfd->lock = &dev->v4l2_lock;
|
||||
vfd->v4l2_dev = &dev->v4l2_dev;
|
||||
|
|
@ -608,15 +364,36 @@ int saa7146_register_device(struct video_device *vfd, struct saa7146_dev *dev,
|
|||
for (i = 0; i < dev->ext_vv_data->num_stds; i++)
|
||||
vfd->tvnorms |= dev->ext_vv_data->stds[i].id;
|
||||
strscpy(vfd->name, name, sizeof(vfd->name));
|
||||
vfd->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OVERLAY |
|
||||
vfd->device_caps = V4L2_CAP_VIDEO_CAPTURE |
|
||||
V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
|
||||
vfd->device_caps |= dev->ext_vv_data->capabilities;
|
||||
if (type == VFL_TYPE_VIDEO)
|
||||
if (type == VFL_TYPE_VIDEO) {
|
||||
vfd->device_caps &=
|
||||
~(V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_OUTPUT);
|
||||
else
|
||||
vfd->device_caps &=
|
||||
~(V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OVERLAY | V4L2_CAP_AUDIO);
|
||||
} else if (vfd->device_caps & V4L2_CAP_SLICED_VBI_OUTPUT) {
|
||||
vfd->vfl_dir = VFL_DIR_TX;
|
||||
vfd->device_caps &= ~(V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
|
||||
V4L2_CAP_AUDIO | V4L2_CAP_TUNER);
|
||||
} else {
|
||||
vfd->device_caps &= ~V4L2_CAP_VIDEO_CAPTURE;
|
||||
}
|
||||
|
||||
q->type = type == VFL_TYPE_VIDEO ? V4L2_BUF_TYPE_VIDEO_CAPTURE : V4L2_BUF_TYPE_VBI_CAPTURE;
|
||||
q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
|
||||
q->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF;
|
||||
q->ops = type == VFL_TYPE_VIDEO ? &video_qops : &vbi_qops;
|
||||
q->mem_ops = &vb2_dma_sg_memops;
|
||||
q->drv_priv = dev;
|
||||
q->gfp_flags = __GFP_DMA32;
|
||||
q->buf_struct_size = sizeof(struct saa7146_buf);
|
||||
q->lock = &dev->v4l2_lock;
|
||||
q->min_buffers_needed = 2;
|
||||
q->dev = &dev->pci->dev;
|
||||
err = vb2_queue_init(q);
|
||||
if (err)
|
||||
return err;
|
||||
vfd->queue = q;
|
||||
|
||||
video_set_drvdata(vfd, dev);
|
||||
|
||||
err = video_register_device(vfd, type, -1);
|
||||
|
|
|
|||
|
|
@ -306,221 +306,6 @@ static int calculate_v_scale_registers(struct saa7146_dev *dev, enum v4l2_field
|
|||
}
|
||||
|
||||
/* simple bubble-sort algorithm with duplicate elimination */
|
||||
static int sort_and_eliminate(u32* values, int* count)
|
||||
{
|
||||
int low = 0, high = 0, top = 0;
|
||||
int cur = 0, next = 0;
|
||||
|
||||
/* sanity checks */
|
||||
if( (0 > *count) || (NULL == values) ) {
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* bubble sort the first @count items of the array @values */
|
||||
for( top = *count; top > 0; top--) {
|
||||
for( low = 0, high = 1; high < top; low++, high++) {
|
||||
if( values[low] > values[high] )
|
||||
swap(values[low], values[high]);
|
||||
}
|
||||
}
|
||||
|
||||
/* remove duplicate items */
|
||||
for( cur = 0, next = 1; next < *count; next++) {
|
||||
if( values[cur] != values[next])
|
||||
values[++cur] = values[next];
|
||||
}
|
||||
|
||||
*count = cur + 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void calculate_clipping_registers_rect(struct saa7146_dev *dev, struct saa7146_fh *fh,
|
||||
struct saa7146_video_dma *vdma2, u32* clip_format, u32* arbtr_ctrl, enum v4l2_field field)
|
||||
{
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
__le32 *clipping = vv->d_clipping.cpu_addr;
|
||||
|
||||
int width = vv->ov.win.w.width;
|
||||
int height = vv->ov.win.w.height;
|
||||
int clipcount = vv->ov.nclips;
|
||||
|
||||
u32 line_list[32];
|
||||
u32 pixel_list[32];
|
||||
int numdwords = 0;
|
||||
|
||||
int i = 0, j = 0;
|
||||
int cnt_line = 0, cnt_pixel = 0;
|
||||
|
||||
int x[32], y[32], w[32], h[32];
|
||||
|
||||
/* clear out memory */
|
||||
memset(&line_list[0], 0x00, sizeof(u32)*32);
|
||||
memset(&pixel_list[0], 0x00, sizeof(u32)*32);
|
||||
memset(clipping, 0x00, SAA7146_CLIPPING_MEM);
|
||||
|
||||
/* fill the line and pixel-lists */
|
||||
for(i = 0; i < clipcount; i++) {
|
||||
int l = 0, r = 0, t = 0, b = 0;
|
||||
|
||||
x[i] = vv->ov.clips[i].c.left;
|
||||
y[i] = vv->ov.clips[i].c.top;
|
||||
w[i] = vv->ov.clips[i].c.width;
|
||||
h[i] = vv->ov.clips[i].c.height;
|
||||
|
||||
if( w[i] < 0) {
|
||||
x[i] += w[i]; w[i] = -w[i];
|
||||
}
|
||||
if( h[i] < 0) {
|
||||
y[i] += h[i]; h[i] = -h[i];
|
||||
}
|
||||
if( x[i] < 0) {
|
||||
w[i] += x[i]; x[i] = 0;
|
||||
}
|
||||
if( y[i] < 0) {
|
||||
h[i] += y[i]; y[i] = 0;
|
||||
}
|
||||
if( 0 != vv->vflip ) {
|
||||
y[i] = height - y[i] - h[i];
|
||||
}
|
||||
|
||||
l = x[i];
|
||||
r = x[i]+w[i];
|
||||
t = y[i];
|
||||
b = y[i]+h[i];
|
||||
|
||||
/* insert left/right coordinates */
|
||||
pixel_list[ 2*i ] = min_t(int, l, width);
|
||||
pixel_list[(2*i)+1] = min_t(int, r, width);
|
||||
/* insert top/bottom coordinates */
|
||||
line_list[ 2*i ] = min_t(int, t, height);
|
||||
line_list[(2*i)+1] = min_t(int, b, height);
|
||||
}
|
||||
|
||||
/* sort and eliminate lists */
|
||||
cnt_line = cnt_pixel = 2*clipcount;
|
||||
sort_and_eliminate( &pixel_list[0], &cnt_pixel );
|
||||
sort_and_eliminate( &line_list[0], &cnt_line );
|
||||
|
||||
/* calculate the number of used u32s */
|
||||
numdwords = max_t(int, (cnt_line+1), (cnt_pixel+1))*2;
|
||||
numdwords = max_t(int, 4, numdwords);
|
||||
numdwords = min_t(int, 64, numdwords);
|
||||
|
||||
/* fill up cliptable */
|
||||
for(i = 0; i < cnt_pixel; i++) {
|
||||
clipping[2*i] |= cpu_to_le32(pixel_list[i] << 16);
|
||||
}
|
||||
for(i = 0; i < cnt_line; i++) {
|
||||
clipping[(2*i)+1] |= cpu_to_le32(line_list[i] << 16);
|
||||
}
|
||||
|
||||
/* fill up cliptable with the display infos */
|
||||
for(j = 0; j < clipcount; j++) {
|
||||
|
||||
for(i = 0; i < cnt_pixel; i++) {
|
||||
|
||||
if( x[j] < 0)
|
||||
x[j] = 0;
|
||||
|
||||
if( pixel_list[i] < (x[j] + w[j])) {
|
||||
|
||||
if ( pixel_list[i] >= x[j] ) {
|
||||
clipping[2*i] |= cpu_to_le32(1 << j);
|
||||
}
|
||||
}
|
||||
}
|
||||
for(i = 0; i < cnt_line; i++) {
|
||||
|
||||
if( y[j] < 0)
|
||||
y[j] = 0;
|
||||
|
||||
if( line_list[i] < (y[j] + h[j]) ) {
|
||||
|
||||
if( line_list[i] >= y[j] ) {
|
||||
clipping[(2*i)+1] |= cpu_to_le32(1 << j);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* adjust arbitration control register */
|
||||
*arbtr_ctrl &= 0xffff00ff;
|
||||
*arbtr_ctrl |= 0x00001c00;
|
||||
|
||||
vdma2->base_even = vv->d_clipping.dma_handle;
|
||||
vdma2->base_odd = vv->d_clipping.dma_handle;
|
||||
vdma2->prot_addr = vv->d_clipping.dma_handle+((sizeof(u32))*(numdwords));
|
||||
vdma2->base_page = 0x04;
|
||||
vdma2->pitch = 0x00;
|
||||
vdma2->num_line_byte = (0 << 16 | (sizeof(u32))*(numdwords-1) );
|
||||
|
||||
/* set clipping-mode. this depends on the field(s) used */
|
||||
*clip_format &= 0xfffffff7;
|
||||
if (V4L2_FIELD_HAS_BOTH(field)) {
|
||||
*clip_format |= 0x00000008;
|
||||
} else {
|
||||
*clip_format |= 0x00000000;
|
||||
}
|
||||
}
|
||||
|
||||
/* disable clipping */
|
||||
static void saa7146_disable_clipping(struct saa7146_dev *dev)
|
||||
{
|
||||
u32 clip_format = saa7146_read(dev, CLIP_FORMAT_CTRL);
|
||||
|
||||
/* mask out relevant bits (=lower word)*/
|
||||
clip_format &= MASK_W1;
|
||||
|
||||
/* upload clipping-registers*/
|
||||
saa7146_write(dev, CLIP_FORMAT_CTRL,clip_format);
|
||||
saa7146_write(dev, MC2, (MASK_05 | MASK_21));
|
||||
|
||||
/* disable video dma2 */
|
||||
saa7146_write(dev, MC1, MASK_21);
|
||||
}
|
||||
|
||||
static void saa7146_set_clipping_rect(struct saa7146_fh *fh)
|
||||
{
|
||||
struct saa7146_dev *dev = fh->dev;
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
enum v4l2_field field = vv->ov.win.field;
|
||||
struct saa7146_video_dma vdma2;
|
||||
u32 clip_format;
|
||||
u32 arbtr_ctrl;
|
||||
|
||||
/* check clipcount, disable clipping if clipcount == 0*/
|
||||
if (vv->ov.nclips == 0) {
|
||||
saa7146_disable_clipping(dev);
|
||||
return;
|
||||
}
|
||||
|
||||
clip_format = saa7146_read(dev, CLIP_FORMAT_CTRL);
|
||||
arbtr_ctrl = saa7146_read(dev, PCI_BT_V1);
|
||||
|
||||
calculate_clipping_registers_rect(dev, fh, &vdma2, &clip_format, &arbtr_ctrl, field);
|
||||
|
||||
/* set clipping format */
|
||||
clip_format &= 0xffff0008;
|
||||
clip_format |= (SAA7146_CLIPPING_RECT << 4);
|
||||
|
||||
/* prepare video dma2 */
|
||||
saa7146_write(dev, BASE_EVEN2, vdma2.base_even);
|
||||
saa7146_write(dev, BASE_ODD2, vdma2.base_odd);
|
||||
saa7146_write(dev, PROT_ADDR2, vdma2.prot_addr);
|
||||
saa7146_write(dev, BASE_PAGE2, vdma2.base_page);
|
||||
saa7146_write(dev, PITCH2, vdma2.pitch);
|
||||
saa7146_write(dev, NUM_LINE_BYTE2, vdma2.num_line_byte);
|
||||
|
||||
/* prepare the rest */
|
||||
saa7146_write(dev, CLIP_FORMAT_CTRL,clip_format);
|
||||
saa7146_write(dev, PCI_BT_V1, arbtr_ctrl);
|
||||
|
||||
/* upload clip_control-register, clipping-registers, enable video dma2 */
|
||||
saa7146_write(dev, MC2, (MASK_05 | MASK_21 | MASK_03 | MASK_19));
|
||||
saa7146_write(dev, MC1, (MASK_05 | MASK_21));
|
||||
}
|
||||
|
||||
static void saa7146_set_window(struct saa7146_dev *dev, int width, int height, enum v4l2_field field)
|
||||
{
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
|
|
@ -556,62 +341,6 @@ static void saa7146_set_window(struct saa7146_dev *dev, int width, int height, e
|
|||
saa7146_write(dev, MC2, (MASK_05 | MASK_06 | MASK_21 | MASK_22) );
|
||||
}
|
||||
|
||||
/* calculate the new memory offsets for a desired position */
|
||||
static void saa7146_set_position(struct saa7146_dev *dev, int w_x, int w_y, int w_height, enum v4l2_field field, u32 pixelformat)
|
||||
{
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
struct saa7146_format *sfmt = saa7146_format_by_fourcc(dev, pixelformat);
|
||||
|
||||
int b_depth = vv->ov_fmt->depth;
|
||||
int b_bpl = vv->ov_fb.fmt.bytesperline;
|
||||
/* The unsigned long cast is to remove a 64-bit compile warning since
|
||||
it looks like a 64-bit address is cast to a 32-bit value, even
|
||||
though the base pointer is really a 32-bit physical address that
|
||||
goes into a 32-bit DMA register.
|
||||
FIXME: might not work on some 64-bit platforms, but see the FIXME
|
||||
in struct v4l2_framebuffer (videodev2.h) for that.
|
||||
*/
|
||||
u32 base = (u32)(unsigned long)vv->ov_fb.base;
|
||||
|
||||
struct saa7146_video_dma vdma1;
|
||||
|
||||
/* calculate memory offsets for picture, look if we shall top-down-flip */
|
||||
vdma1.pitch = 2*b_bpl;
|
||||
if ( 0 == vv->vflip ) {
|
||||
vdma1.base_even = base + (w_y * (vdma1.pitch/2)) + (w_x * (b_depth / 8));
|
||||
vdma1.base_odd = vdma1.base_even + (vdma1.pitch / 2);
|
||||
vdma1.prot_addr = vdma1.base_even + (w_height * (vdma1.pitch / 2));
|
||||
}
|
||||
else {
|
||||
vdma1.base_even = base + ((w_y+w_height) * (vdma1.pitch/2)) + (w_x * (b_depth / 8));
|
||||
vdma1.base_odd = vdma1.base_even - (vdma1.pitch / 2);
|
||||
vdma1.prot_addr = vdma1.base_odd - (w_height * (vdma1.pitch / 2));
|
||||
}
|
||||
|
||||
if (V4L2_FIELD_HAS_BOTH(field)) {
|
||||
} else if (field == V4L2_FIELD_ALTERNATE) {
|
||||
/* fixme */
|
||||
vdma1.base_odd = vdma1.prot_addr;
|
||||
vdma1.pitch /= 2;
|
||||
} else if (field == V4L2_FIELD_TOP) {
|
||||
vdma1.base_odd = vdma1.prot_addr;
|
||||
vdma1.pitch /= 2;
|
||||
} else if (field == V4L2_FIELD_BOTTOM) {
|
||||
vdma1.base_odd = vdma1.base_even;
|
||||
vdma1.base_even = vdma1.prot_addr;
|
||||
vdma1.pitch /= 2;
|
||||
}
|
||||
|
||||
if ( 0 != vv->vflip ) {
|
||||
vdma1.pitch *= -1;
|
||||
}
|
||||
|
||||
vdma1.base_page = sfmt->swap;
|
||||
vdma1.num_line_byte = (vv->standard->v_field<<16)+vv->standard->h_pixels;
|
||||
|
||||
saa7146_write_out_dma(dev, 1, &vdma1);
|
||||
}
|
||||
|
||||
static void saa7146_set_output_format(struct saa7146_dev *dev, unsigned long palette)
|
||||
{
|
||||
u32 clip_format = saa7146_read(dev, CLIP_FORMAT_CTRL);
|
||||
|
|
@ -645,30 +374,6 @@ void saa7146_set_hps_source_and_sync(struct saa7146_dev *dev, int source, int sy
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(saa7146_set_hps_source_and_sync);
|
||||
|
||||
int saa7146_enable_overlay(struct saa7146_fh *fh)
|
||||
{
|
||||
struct saa7146_dev *dev = fh->dev;
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
|
||||
saa7146_set_window(dev, vv->ov.win.w.width, vv->ov.win.w.height, vv->ov.win.field);
|
||||
saa7146_set_position(dev, vv->ov.win.w.left, vv->ov.win.w.top, vv->ov.win.w.height, vv->ov.win.field, vv->ov_fmt->pixelformat);
|
||||
saa7146_set_output_format(dev, vv->ov_fmt->trans);
|
||||
saa7146_set_clipping_rect(fh);
|
||||
|
||||
/* enable video dma1 */
|
||||
saa7146_write(dev, MC1, (MASK_06 | MASK_22));
|
||||
return 0;
|
||||
}
|
||||
|
||||
void saa7146_disable_overlay(struct saa7146_fh *fh)
|
||||
{
|
||||
struct saa7146_dev *dev = fh->dev;
|
||||
|
||||
/* disable clipping + video dma1 */
|
||||
saa7146_disable_clipping(dev);
|
||||
saa7146_write(dev, MC1, MASK_22);
|
||||
}
|
||||
|
||||
void saa7146_write_out_dma(struct saa7146_dev* dev, int which, struct saa7146_video_dma* vdma)
|
||||
{
|
||||
int where = 0;
|
||||
|
|
@ -702,14 +407,14 @@ void saa7146_write_out_dma(struct saa7146_dev* dev, int which, struct saa7146_vi
|
|||
static int calculate_video_dma_grab_packed(struct saa7146_dev* dev, struct saa7146_buf *buf)
|
||||
{
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
struct v4l2_pix_format *pix = &vv->video_fmt;
|
||||
struct saa7146_video_dma vdma1;
|
||||
struct saa7146_format *sfmt = saa7146_format_by_fourcc(dev, pix->pixelformat);
|
||||
|
||||
struct saa7146_format *sfmt = saa7146_format_by_fourcc(dev,buf->fmt->pixelformat);
|
||||
|
||||
int width = buf->fmt->width;
|
||||
int height = buf->fmt->height;
|
||||
int bytesperline = buf->fmt->bytesperline;
|
||||
enum v4l2_field field = buf->fmt->field;
|
||||
int width = pix->width;
|
||||
int height = pix->height;
|
||||
int bytesperline = pix->bytesperline;
|
||||
enum v4l2_field field = pix->field;
|
||||
|
||||
int depth = sfmt->depth;
|
||||
|
||||
|
|
@ -764,8 +469,9 @@ static int calculate_video_dma_grab_packed(struct saa7146_dev* dev, struct saa71
|
|||
|
||||
static int calc_planar_422(struct saa7146_vv *vv, struct saa7146_buf *buf, struct saa7146_video_dma *vdma2, struct saa7146_video_dma *vdma3)
|
||||
{
|
||||
int height = buf->fmt->height;
|
||||
int width = buf->fmt->width;
|
||||
struct v4l2_pix_format *pix = &vv->video_fmt;
|
||||
int height = pix->height;
|
||||
int width = pix->width;
|
||||
|
||||
vdma2->pitch = width;
|
||||
vdma3->pitch = width;
|
||||
|
|
@ -795,8 +501,9 @@ static int calc_planar_422(struct saa7146_vv *vv, struct saa7146_buf *buf, struc
|
|||
|
||||
static int calc_planar_420(struct saa7146_vv *vv, struct saa7146_buf *buf, struct saa7146_video_dma *vdma2, struct saa7146_video_dma *vdma3)
|
||||
{
|
||||
int height = buf->fmt->height;
|
||||
int width = buf->fmt->width;
|
||||
struct v4l2_pix_format *pix = &vv->video_fmt;
|
||||
int height = pix->height;
|
||||
int width = pix->width;
|
||||
|
||||
vdma2->pitch = width/2;
|
||||
vdma3->pitch = width/2;
|
||||
|
|
@ -825,19 +532,20 @@ static int calc_planar_420(struct saa7146_vv *vv, struct saa7146_buf *buf, struc
|
|||
static int calculate_video_dma_grab_planar(struct saa7146_dev* dev, struct saa7146_buf *buf)
|
||||
{
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
struct v4l2_pix_format *pix = &vv->video_fmt;
|
||||
struct saa7146_video_dma vdma1;
|
||||
struct saa7146_video_dma vdma2;
|
||||
struct saa7146_video_dma vdma3;
|
||||
struct saa7146_format *sfmt = saa7146_format_by_fourcc(dev, pix->pixelformat);
|
||||
|
||||
struct saa7146_format *sfmt = saa7146_format_by_fourcc(dev,buf->fmt->pixelformat);
|
||||
int width = pix->width;
|
||||
int height = pix->height;
|
||||
enum v4l2_field field = pix->field;
|
||||
|
||||
int width = buf->fmt->width;
|
||||
int height = buf->fmt->height;
|
||||
enum v4l2_field field = buf->fmt->field;
|
||||
|
||||
BUG_ON(0 == buf->pt[0].dma);
|
||||
BUG_ON(0 == buf->pt[1].dma);
|
||||
BUG_ON(0 == buf->pt[2].dma);
|
||||
if (WARN_ON(!buf->pt[0].dma) ||
|
||||
WARN_ON(!buf->pt[1].dma) ||
|
||||
WARN_ON(!buf->pt[2].dma))
|
||||
return -1;
|
||||
|
||||
DEB_CAP("[size=%dx%d,fields=%s]\n",
|
||||
width, height, v4l2_field_names[field]);
|
||||
|
|
@ -994,10 +702,27 @@ static void program_capture_engine(struct saa7146_dev *dev, int planar)
|
|||
WRITE_RPS0(CMD_STOP);
|
||||
}
|
||||
|
||||
/* disable clipping */
|
||||
static void saa7146_disable_clipping(struct saa7146_dev *dev)
|
||||
{
|
||||
u32 clip_format = saa7146_read(dev, CLIP_FORMAT_CTRL);
|
||||
|
||||
/* mask out relevant bits (=lower word)*/
|
||||
clip_format &= MASK_W1;
|
||||
|
||||
/* upload clipping-registers*/
|
||||
saa7146_write(dev, CLIP_FORMAT_CTRL, clip_format);
|
||||
saa7146_write(dev, MC2, (MASK_05 | MASK_21));
|
||||
|
||||
/* disable video dma2 */
|
||||
saa7146_write(dev, MC1, MASK_21);
|
||||
}
|
||||
|
||||
void saa7146_set_capture(struct saa7146_dev *dev, struct saa7146_buf *buf, struct saa7146_buf *next)
|
||||
{
|
||||
struct saa7146_format *sfmt = saa7146_format_by_fourcc(dev,buf->fmt->pixelformat);
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
struct v4l2_pix_format *pix = &vv->video_fmt;
|
||||
struct saa7146_format *sfmt = saa7146_format_by_fourcc(dev, pix->pixelformat);
|
||||
u32 vdma1_prot_addr;
|
||||
|
||||
DEB_CAP("buf:%p, next:%p\n", buf, next);
|
||||
|
|
@ -1009,7 +734,7 @@ void saa7146_set_capture(struct saa7146_dev *dev, struct saa7146_buf *buf, struc
|
|||
saa7146_write(dev, MC2, MASK_27 );
|
||||
}
|
||||
|
||||
saa7146_set_window(dev, buf->fmt->width, buf->fmt->height, buf->fmt->field);
|
||||
saa7146_set_window(dev, pix->width, pix->height, pix->field);
|
||||
saa7146_set_output_format(dev, sfmt->trans);
|
||||
saa7146_disable_clipping(dev);
|
||||
|
||||
|
|
|
|||
|
|
@ -207,7 +207,6 @@ static int buffer_activate(struct saa7146_dev *dev,
|
|||
struct saa7146_buf *next)
|
||||
{
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
buf->vb.state = VIDEOBUF_ACTIVE;
|
||||
|
||||
DEB_VBI("dev:%p, buf:%p, next:%p\n", dev, buf, next);
|
||||
saa7146_set_vbi_capture(dev,buf,next);
|
||||
|
|
@ -216,114 +215,101 @@ static int buffer_activate(struct saa7146_dev *dev,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,enum v4l2_field field)
|
||||
{
|
||||
struct file *file = q->priv_data;
|
||||
struct saa7146_fh *fh = file->private_data;
|
||||
struct saa7146_dev *dev = fh->dev;
|
||||
struct saa7146_buf *buf = (struct saa7146_buf *)vb;
|
||||
|
||||
int err = 0;
|
||||
int lines, llength, size;
|
||||
|
||||
lines = 16 * 2 ; /* 2 fields */
|
||||
llength = vbi_pixel_to_capture;
|
||||
size = lines * llength;
|
||||
|
||||
DEB_VBI("vb:%p\n", vb);
|
||||
|
||||
if (0 != buf->vb.baddr && buf->vb.bsize < size) {
|
||||
DEB_VBI("size mismatch\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (buf->vb.size != size)
|
||||
saa7146_dma_free(dev,q,buf);
|
||||
|
||||
if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
|
||||
struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
|
||||
|
||||
buf->vb.width = llength;
|
||||
buf->vb.height = lines;
|
||||
buf->vb.size = size;
|
||||
buf->vb.field = field; // FIXME: check this
|
||||
|
||||
saa7146_pgtable_free(dev->pci, &buf->pt[2]);
|
||||
saa7146_pgtable_alloc(dev->pci, &buf->pt[2]);
|
||||
|
||||
err = videobuf_iolock(q,&buf->vb, NULL);
|
||||
if (err)
|
||||
goto oops;
|
||||
err = saa7146_pgtable_build_single(dev->pci, &buf->pt[2],
|
||||
dma->sglist, dma->sglen);
|
||||
if (0 != err)
|
||||
return err;
|
||||
}
|
||||
buf->vb.state = VIDEOBUF_PREPARED;
|
||||
buf->activate = buffer_activate;
|
||||
|
||||
return 0;
|
||||
|
||||
oops:
|
||||
DEB_VBI("error out\n");
|
||||
saa7146_dma_free(dev,q,buf);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
|
||||
{
|
||||
int llength,lines;
|
||||
|
||||
lines = 16 * 2 ; /* 2 fields */
|
||||
llength = vbi_pixel_to_capture;
|
||||
|
||||
*size = lines * llength;
|
||||
*count = 2;
|
||||
|
||||
DEB_VBI("count:%d, size:%d\n", *count, *size);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
|
||||
{
|
||||
struct file *file = q->priv_data;
|
||||
struct saa7146_fh *fh = file->private_data;
|
||||
struct saa7146_dev *dev = fh->dev;
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
struct saa7146_buf *buf = (struct saa7146_buf *)vb;
|
||||
|
||||
DEB_VBI("vb:%p\n", vb);
|
||||
saa7146_buffer_queue(dev, &vv->vbi_dmaq, buf);
|
||||
}
|
||||
|
||||
static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
|
||||
{
|
||||
struct file *file = q->priv_data;
|
||||
struct saa7146_fh *fh = file->private_data;
|
||||
struct saa7146_dev *dev = fh->dev;
|
||||
struct saa7146_buf *buf = (struct saa7146_buf *)vb;
|
||||
|
||||
DEB_VBI("vb:%p\n", vb);
|
||||
saa7146_dma_free(dev,q,buf);
|
||||
}
|
||||
|
||||
static const struct videobuf_queue_ops vbi_qops = {
|
||||
.buf_setup = buffer_setup,
|
||||
.buf_prepare = buffer_prepare,
|
||||
.buf_queue = buffer_queue,
|
||||
.buf_release = buffer_release,
|
||||
};
|
||||
|
||||
/* ------------------------------------------------------------------ */
|
||||
|
||||
static void vbi_stop(struct saa7146_fh *fh, struct file *file)
|
||||
static int queue_setup(struct vb2_queue *q,
|
||||
unsigned int *num_buffers, unsigned int *num_planes,
|
||||
unsigned int sizes[], struct device *alloc_devs[])
|
||||
{
|
||||
unsigned int size = 16 * 2 * vbi_pixel_to_capture;
|
||||
|
||||
if (*num_planes)
|
||||
return sizes[0] < size ? -EINVAL : 0;
|
||||
*num_planes = 1;
|
||||
sizes[0] = size;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void buf_queue(struct vb2_buffer *vb)
|
||||
{
|
||||
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
|
||||
struct vb2_queue *vq = vb->vb2_queue;
|
||||
struct saa7146_dev *dev = vb2_get_drv_priv(vq);
|
||||
struct saa7146_buf *buf = container_of(vbuf, struct saa7146_buf, vb);
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&dev->slock, flags);
|
||||
|
||||
saa7146_buffer_queue(dev, &dev->vv_data->vbi_dmaq, buf);
|
||||
spin_unlock_irqrestore(&dev->slock, flags);
|
||||
}
|
||||
|
||||
static int buf_init(struct vb2_buffer *vb)
|
||||
{
|
||||
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
|
||||
struct saa7146_buf *buf = container_of(vbuf, struct saa7146_buf, vb);
|
||||
struct sg_table *sgt = vb2_dma_sg_plane_desc(&buf->vb.vb2_buf, 0);
|
||||
struct scatterlist *list = sgt->sgl;
|
||||
int length = sgt->nents;
|
||||
struct vb2_queue *vq = vb->vb2_queue;
|
||||
struct saa7146_dev *dev = vb2_get_drv_priv(vq);
|
||||
int ret;
|
||||
|
||||
buf->activate = buffer_activate;
|
||||
|
||||
saa7146_pgtable_alloc(dev->pci, &buf->pt[2]);
|
||||
|
||||
ret = saa7146_pgtable_build_single(dev->pci, &buf->pt[2],
|
||||
list, length);
|
||||
if (ret)
|
||||
saa7146_pgtable_free(dev->pci, &buf->pt[2]);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int buf_prepare(struct vb2_buffer *vb)
|
||||
{
|
||||
unsigned int size = 16 * 2 * vbi_pixel_to_capture;
|
||||
|
||||
if (vb2_plane_size(vb, 0) < size)
|
||||
return -EINVAL;
|
||||
vb2_set_plane_payload(vb, 0, size);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void buf_cleanup(struct vb2_buffer *vb)
|
||||
{
|
||||
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
|
||||
struct saa7146_buf *buf = container_of(vbuf, struct saa7146_buf, vb);
|
||||
struct vb2_queue *vq = vb->vb2_queue;
|
||||
struct saa7146_dev *dev = vb2_get_drv_priv(vq);
|
||||
|
||||
saa7146_pgtable_free(dev->pci, &buf->pt[2]);
|
||||
}
|
||||
|
||||
static void return_buffers(struct vb2_queue *q, int state)
|
||||
{
|
||||
struct saa7146_dev *dev = vb2_get_drv_priv(q);
|
||||
struct saa7146_dmaqueue *dq = &dev->vv_data->vbi_dmaq;
|
||||
struct saa7146_buf *buf;
|
||||
|
||||
if (dq->curr) {
|
||||
buf = dq->curr;
|
||||
dq->curr = NULL;
|
||||
vb2_buffer_done(&buf->vb.vb2_buf, state);
|
||||
}
|
||||
while (!list_empty(&dq->queue)) {
|
||||
buf = list_entry(dq->queue.next, struct saa7146_buf, list);
|
||||
list_del(&buf->list);
|
||||
vb2_buffer_done(&buf->vb.vb2_buf, state);
|
||||
}
|
||||
}
|
||||
|
||||
static void vbi_stop(struct saa7146_dev *dev)
|
||||
{
|
||||
struct saa7146_dev *dev = fh->dev;
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
unsigned long flags;
|
||||
DEB_VBI("dev:%p, fh:%p\n", dev, fh);
|
||||
DEB_VBI("dev:%p\n", dev);
|
||||
|
||||
spin_lock_irqsave(&dev->slock,flags);
|
||||
|
||||
|
|
@ -336,13 +322,6 @@ static void vbi_stop(struct saa7146_fh *fh, struct file *file)
|
|||
/* shut down dma 3 transfers */
|
||||
saa7146_write(dev, MC1, MASK_20);
|
||||
|
||||
if (vv->vbi_dmaq.curr)
|
||||
saa7146_buffer_finish(dev, &vv->vbi_dmaq, VIDEOBUF_DONE);
|
||||
|
||||
videobuf_queue_cancel(&fh->vbi_q);
|
||||
|
||||
vv->vbi_streaming = NULL;
|
||||
|
||||
del_timer(&vv->vbi_dmaq.timeout);
|
||||
del_timer(&vv->vbi_read_timeout);
|
||||
|
||||
|
|
@ -352,38 +331,22 @@ static void vbi_stop(struct saa7146_fh *fh, struct file *file)
|
|||
static void vbi_read_timeout(struct timer_list *t)
|
||||
{
|
||||
struct saa7146_vv *vv = from_timer(vv, t, vbi_read_timeout);
|
||||
struct file *file = vv->vbi_read_timeout_file;
|
||||
struct saa7146_fh *fh = file->private_data;
|
||||
struct saa7146_dev *dev = fh->dev;
|
||||
struct saa7146_dev *dev = vv->vbi_dmaq.dev;
|
||||
|
||||
DEB_VBI("dev:%p, fh:%p\n", dev, fh);
|
||||
|
||||
vbi_stop(fh, file);
|
||||
}
|
||||
|
||||
static void vbi_init(struct saa7146_dev *dev, struct saa7146_vv *vv)
|
||||
{
|
||||
DEB_VBI("dev:%p\n", dev);
|
||||
|
||||
INIT_LIST_HEAD(&vv->vbi_dmaq.queue);
|
||||
|
||||
timer_setup(&vv->vbi_dmaq.timeout, saa7146_buffer_timeout, 0);
|
||||
vv->vbi_dmaq.dev = dev;
|
||||
|
||||
init_waitqueue_head(&vv->vbi_wq);
|
||||
vbi_stop(dev);
|
||||
}
|
||||
|
||||
static int vbi_open(struct saa7146_dev *dev, struct file *file)
|
||||
static int vbi_begin(struct saa7146_dev *dev)
|
||||
{
|
||||
struct saa7146_fh *fh = file->private_data;
|
||||
struct saa7146_vv *vv = fh->dev->vv_data;
|
||||
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
u32 arbtr_ctrl = saa7146_read(dev, PCI_BT_V1);
|
||||
int ret = 0;
|
||||
|
||||
DEB_VBI("dev:%p, fh:%p\n", dev, fh);
|
||||
DEB_VBI("dev:%p\n", dev);
|
||||
|
||||
ret = saa7146_res_get(fh, RESOURCE_DMA3_BRS);
|
||||
ret = saa7146_res_get(dev, RESOURCE_DMA3_BRS);
|
||||
if (0 == ret) {
|
||||
DEB_S("cannot get vbi RESOURCE_DMA3_BRS resource\n");
|
||||
return -EBUSY;
|
||||
|
|
@ -395,15 +358,7 @@ static int vbi_open(struct saa7146_dev *dev, struct file *file)
|
|||
saa7146_write(dev, PCI_BT_V1, arbtr_ctrl);
|
||||
saa7146_write(dev, MC2, (MASK_04|MASK_20));
|
||||
|
||||
videobuf_queue_sg_init(&fh->vbi_q, &vbi_qops,
|
||||
&dev->pci->dev, &dev->slock,
|
||||
V4L2_BUF_TYPE_VBI_CAPTURE,
|
||||
V4L2_FIELD_SEQ_TB, // FIXME: does this really work?
|
||||
sizeof(struct saa7146_buf),
|
||||
file, &dev->v4l2_lock);
|
||||
|
||||
vv->vbi_read_timeout.function = vbi_read_timeout;
|
||||
vv->vbi_read_timeout_file = file;
|
||||
|
||||
/* initialize the brs */
|
||||
if ( 0 != (SAA7146_USE_PORT_B_FOR_VBI & dev->ext_vv_data->flags)) {
|
||||
|
|
@ -422,16 +377,52 @@ static int vbi_open(struct saa7146_dev *dev, struct file *file)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void vbi_close(struct saa7146_dev *dev, struct file *file)
|
||||
static int start_streaming(struct vb2_queue *q, unsigned int count)
|
||||
{
|
||||
struct saa7146_fh *fh = file->private_data;
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
DEB_VBI("dev:%p, fh:%p\n", dev, fh);
|
||||
struct saa7146_dev *dev = vb2_get_drv_priv(q);
|
||||
int ret;
|
||||
|
||||
if( fh == vv->vbi_streaming ) {
|
||||
vbi_stop(fh, file);
|
||||
}
|
||||
saa7146_res_free(fh, RESOURCE_DMA3_BRS);
|
||||
if (!vb2_is_streaming(&dev->vv_data->vbi_dmaq.q))
|
||||
dev->vv_data->seqnr = 0;
|
||||
ret = vbi_begin(dev);
|
||||
if (ret)
|
||||
return_buffers(q, VB2_BUF_STATE_QUEUED);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void stop_streaming(struct vb2_queue *q)
|
||||
{
|
||||
struct saa7146_dev *dev = vb2_get_drv_priv(q);
|
||||
|
||||
vbi_stop(dev);
|
||||
return_buffers(q, VB2_BUF_STATE_ERROR);
|
||||
saa7146_res_free(dev, RESOURCE_DMA3_BRS);
|
||||
}
|
||||
|
||||
const struct vb2_ops vbi_qops = {
|
||||
.queue_setup = queue_setup,
|
||||
.buf_queue = buf_queue,
|
||||
.buf_init = buf_init,
|
||||
.buf_prepare = buf_prepare,
|
||||
.buf_cleanup = buf_cleanup,
|
||||
.start_streaming = start_streaming,
|
||||
.stop_streaming = stop_streaming,
|
||||
.wait_prepare = vb2_ops_wait_prepare,
|
||||
.wait_finish = vb2_ops_wait_finish,
|
||||
};
|
||||
|
||||
/* ------------------------------------------------------------------ */
|
||||
|
||||
static void vbi_init(struct saa7146_dev *dev, struct saa7146_vv *vv)
|
||||
{
|
||||
DEB_VBI("dev:%p\n", dev);
|
||||
|
||||
INIT_LIST_HEAD(&vv->vbi_dmaq.queue);
|
||||
|
||||
timer_setup(&vv->vbi_dmaq.timeout, saa7146_buffer_timeout, 0);
|
||||
vv->vbi_dmaq.dev = dev;
|
||||
|
||||
init_waitqueue_head(&vv->vbi_wq);
|
||||
}
|
||||
|
||||
static void vbi_irq_done(struct saa7146_dev *dev, unsigned long status)
|
||||
|
|
@ -441,10 +432,7 @@ static void vbi_irq_done(struct saa7146_dev *dev, unsigned long status)
|
|||
|
||||
if (vv->vbi_dmaq.curr) {
|
||||
DEB_VBI("dev:%p, curr:%p\n", dev, vv->vbi_dmaq.curr);
|
||||
/* this must be += 2, one count for each field */
|
||||
vv->vbi_fieldcount+=2;
|
||||
vv->vbi_dmaq.curr->vb.field_count = vv->vbi_fieldcount;
|
||||
saa7146_buffer_finish(dev, &vv->vbi_dmaq, VIDEOBUF_DONE);
|
||||
saa7146_buffer_finish(dev, &vv->vbi_dmaq, VB2_BUF_STATE_DONE);
|
||||
} else {
|
||||
DEB_VBI("dev:%p\n", dev);
|
||||
}
|
||||
|
|
@ -453,46 +441,7 @@ static void vbi_irq_done(struct saa7146_dev *dev, unsigned long status)
|
|||
spin_unlock(&dev->slock);
|
||||
}
|
||||
|
||||
static ssize_t vbi_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
|
||||
{
|
||||
struct saa7146_fh *fh = file->private_data;
|
||||
struct saa7146_dev *dev = fh->dev;
|
||||
struct saa7146_vv *vv = dev->vv_data;
|
||||
ssize_t ret = 0;
|
||||
|
||||
DEB_VBI("dev:%p, fh:%p\n", dev, fh);
|
||||
|
||||
if( NULL == vv->vbi_streaming ) {
|
||||
// fixme: check if dma3 is available
|
||||
// fixme: activate vbi engine here if necessary. (really?)
|
||||
vv->vbi_streaming = fh;
|
||||
}
|
||||
|
||||
if( fh != vv->vbi_streaming ) {
|
||||
DEB_VBI("open %p is already using vbi capture\n",
|
||||
vv->vbi_streaming);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
mod_timer(&vv->vbi_read_timeout, jiffies+BUFFER_TIMEOUT);
|
||||
ret = videobuf_read_stream(&fh->vbi_q, data, count, ppos, 1,
|
||||
file->f_flags & O_NONBLOCK);
|
||||
/*
|
||||
printk("BASE_ODD3: 0x%08x\n", saa7146_read(dev, BASE_ODD3));
|
||||
printk("BASE_EVEN3: 0x%08x\n", saa7146_read(dev, BASE_EVEN3));
|
||||
printk("PROT_ADDR3: 0x%08x\n", saa7146_read(dev, PROT_ADDR3));
|
||||
printk("PITCH3: 0x%08x\n", saa7146_read(dev, PITCH3));
|
||||
printk("BASE_PAGE3: 0x%08x\n", saa7146_read(dev, BASE_PAGE3));
|
||||
printk("NUM_LINE_BYTE3: 0x%08x\n", saa7146_read(dev, NUM_LINE_BYTE3));
|
||||
printk("BRS_CTRL: 0x%08x\n", saa7146_read(dev, BRS_CTRL));
|
||||
*/
|
||||
return ret;
|
||||
}
|
||||
|
||||
const struct saa7146_use_ops saa7146_vbi_uops = {
|
||||
.init = vbi_init,
|
||||
.open = vbi_open,
|
||||
.release = vbi_close,
|
||||
.irq_done = vbi_irq_done,
|
||||
.read = vbi_read,
|
||||
};
|
||||
|
|
|
|||
Разница между файлами не показана из-за своего большого размера
Загрузить разницу
|
|
@ -1171,10 +1171,11 @@ ssize_t vb2_fop_read(struct file *file, char __user *buf,
|
|||
return -ERESTARTSYS;
|
||||
if (vb2_queue_is_busy(vdev->queue, file))
|
||||
goto exit;
|
||||
vdev->queue->owner = file->private_data;
|
||||
err = vb2_read(vdev->queue, buf, count, ppos,
|
||||
file->f_flags & O_NONBLOCK);
|
||||
if (vdev->queue->fileio)
|
||||
vdev->queue->owner = file->private_data;
|
||||
if (!vdev->queue->fileio)
|
||||
vdev->queue->owner = NULL;
|
||||
exit:
|
||||
if (lock)
|
||||
mutex_unlock(lock);
|
||||
|
|
|
|||
|
|
@ -11070,7 +11070,7 @@ ctrl_power_mode(struct drx_demod_instance *demod, enum drx_power_mode *mode)
|
|||
sio_cc_pwd_mode = SIO_CC_PWD_MODE_LEVEL_OSC;
|
||||
break;
|
||||
default:
|
||||
/* Unknow sleep mode */
|
||||
/* Unknown sleep mode */
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1585,7 +1585,7 @@ static int ctrl_power_mode(struct drxk_state *state, enum drx_power_mode *mode)
|
|||
sio_cc_pwd_mode = SIO_CC_PWD_MODE_LEVEL_OSC;
|
||||
break;
|
||||
default:
|
||||
/* Unknow sleep mode */
|
||||
/* Unknown sleep mode */
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
|
|||
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