locking/atomic, arch/mips: Implement atomic{,64}_fetch_{add,sub,and,or,xor}()
Implement FETCH-OP atomic primitives, these are very similar to the existing OP-RETURN primitives we already have, except they return the value of the atomic variable _before_ modification. This is especially useful for irreversible operations -- such as bitops (because it becomes impossible to reconstruct the state prior to modification). Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arch@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Peter Zijlstra
Ingo Molnar
Родитель
e898eb27ff
Коммит
4edac529eb
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@ -66,7 +66,7 @@ static __inline__ void atomic_##op(int i, atomic_t * v) \
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" " #asm_op " %0, %2 \n" \
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" sc %0, %1 \n" \
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" .set mips0 \n" \
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: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
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: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
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: "Ir" (i)); \
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} while (unlikely(!temp)); \
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} else { \
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@ -130,18 +130,78 @@ static __inline__ int atomic_##op##_return(int i, atomic_t * v) \
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return result; \
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}
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#define ATOMIC_FETCH_OP(op, c_op, asm_op) \
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static __inline__ int atomic_fetch_##op(int i, atomic_t * v) \
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{ \
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int result; \
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\
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smp_mb__before_llsc(); \
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\
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if (kernel_uses_llsc && R10000_LLSC_WAR) { \
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int temp; \
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\
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__asm__ __volatile__( \
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" .set arch=r4000 \n" \
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"1: ll %1, %2 # atomic_fetch_" #op " \n" \
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" " #asm_op " %0, %1, %3 \n" \
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" sc %0, %2 \n" \
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" beqzl %0, 1b \n" \
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" move %0, %1 \n" \
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" .set mips0 \n" \
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: "=&r" (result), "=&r" (temp), \
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"+" GCC_OFF_SMALL_ASM() (v->counter) \
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: "Ir" (i)); \
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} else if (kernel_uses_llsc) { \
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int temp; \
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\
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do { \
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__asm__ __volatile__( \
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" .set "MIPS_ISA_LEVEL" \n" \
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" ll %1, %2 # atomic_fetch_" #op " \n" \
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" " #asm_op " %0, %1, %3 \n" \
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" sc %0, %2 \n" \
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" .set mips0 \n" \
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: "=&r" (result), "=&r" (temp), \
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"+" GCC_OFF_SMALL_ASM() (v->counter) \
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: "Ir" (i)); \
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} while (unlikely(!result)); \
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\
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result = temp; \
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} else { \
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unsigned long flags; \
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\
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raw_local_irq_save(flags); \
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result = v->counter; \
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v->counter c_op i; \
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raw_local_irq_restore(flags); \
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} \
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\
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smp_llsc_mb(); \
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\
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return result; \
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}
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#define ATOMIC_OPS(op, c_op, asm_op) \
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ATOMIC_OP(op, c_op, asm_op) \
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ATOMIC_OP_RETURN(op, c_op, asm_op)
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ATOMIC_OP_RETURN(op, c_op, asm_op) \
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ATOMIC_FETCH_OP(op, c_op, asm_op)
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ATOMIC_OPS(add, +=, addu)
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ATOMIC_OPS(sub, -=, subu)
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ATOMIC_OP(and, &=, and)
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ATOMIC_OP(or, |=, or)
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ATOMIC_OP(xor, ^=, xor)
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#undef ATOMIC_OPS
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#define ATOMIC_OPS(op, c_op, asm_op) \
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ATOMIC_OP(op, c_op, asm_op) \
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ATOMIC_FETCH_OP(op, c_op, asm_op)
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#define atomic_fetch_or atomic_fetch_or
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ATOMIC_OPS(and, &=, and)
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ATOMIC_OPS(or, |=, or)
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ATOMIC_OPS(xor, ^=, xor)
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#undef ATOMIC_OPS
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#undef ATOMIC_FETCH_OP
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#undef ATOMIC_OP_RETURN
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#undef ATOMIC_OP
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@ -414,17 +474,77 @@ static __inline__ long atomic64_##op##_return(long i, atomic64_t * v) \
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return result; \
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}
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#define ATOMIC64_FETCH_OP(op, c_op, asm_op) \
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static __inline__ long atomic64_fetch_##op(long i, atomic64_t * v) \
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{ \
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long result; \
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\
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smp_mb__before_llsc(); \
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\
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if (kernel_uses_llsc && R10000_LLSC_WAR) { \
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long temp; \
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\
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__asm__ __volatile__( \
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" .set arch=r4000 \n" \
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"1: lld %1, %2 # atomic64_fetch_" #op "\n" \
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" " #asm_op " %0, %1, %3 \n" \
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" scd %0, %2 \n" \
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" beqzl %0, 1b \n" \
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" move %0, %1 \n" \
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" .set mips0 \n" \
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: "=&r" (result), "=&r" (temp), \
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"+" GCC_OFF_SMALL_ASM() (v->counter) \
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: "Ir" (i)); \
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} else if (kernel_uses_llsc) { \
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long temp; \
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\
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do { \
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__asm__ __volatile__( \
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" .set "MIPS_ISA_LEVEL" \n" \
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" lld %1, %2 # atomic64_fetch_" #op "\n" \
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" " #asm_op " %0, %1, %3 \n" \
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" scd %0, %2 \n" \
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" .set mips0 \n" \
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: "=&r" (result), "=&r" (temp), \
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"=" GCC_OFF_SMALL_ASM() (v->counter) \
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: "Ir" (i), GCC_OFF_SMALL_ASM() (v->counter) \
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: "memory"); \
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} while (unlikely(!result)); \
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\
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result = temp; \
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} else { \
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unsigned long flags; \
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\
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raw_local_irq_save(flags); \
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result = v->counter; \
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v->counter c_op i; \
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raw_local_irq_restore(flags); \
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} \
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\
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smp_llsc_mb(); \
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\
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return result; \
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}
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#define ATOMIC64_OPS(op, c_op, asm_op) \
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ATOMIC64_OP(op, c_op, asm_op) \
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ATOMIC64_OP_RETURN(op, c_op, asm_op)
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ATOMIC64_OP_RETURN(op, c_op, asm_op) \
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ATOMIC64_FETCH_OP(op, c_op, asm_op)
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ATOMIC64_OPS(add, +=, daddu)
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ATOMIC64_OPS(sub, -=, dsubu)
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ATOMIC64_OP(and, &=, and)
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ATOMIC64_OP(or, |=, or)
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ATOMIC64_OP(xor, ^=, xor)
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#undef ATOMIC64_OPS
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#define ATOMIC64_OPS(op, c_op, asm_op) \
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ATOMIC64_OP(op, c_op, asm_op) \
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ATOMIC64_FETCH_OP(op, c_op, asm_op)
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ATOMIC64_OPS(and, &=, and)
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ATOMIC64_OPS(or, |=, or)
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ATOMIC64_OPS(xor, ^=, xor)
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#undef ATOMIC64_OPS
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#undef ATOMIC64_FETCH_OP
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#undef ATOMIC64_OP_RETURN
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#undef ATOMIC64_OP
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