x86/asm/entry/32: Make register zero-extension more prominent

There are a couple of syscall argument zero-extension instructions in
the 32-bit compat entry code, and it was mentioned that people keep
trying to optimize them out, introducing bugs.

Make them more visible, and add a "do not remove" comment.

Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Will Drewry <wad@chromium.org>
Link: http://lkml.kernel.org/r/1427452582-21624-3-git-send-email-dvlasenk@redhat.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Denys Vlasenko 2015-03-27 11:36:21 +01:00 коммит произвёл Ingo Molnar
Родитель a232e3d558
Коммит 4ee8ec17ba
1 изменённых файлов: 10 добавлений и 4 удалений

Просмотреть файл

@ -122,8 +122,11 @@ ENTRY(ia32_sysenter_target)
movq PER_CPU_VAR(cpu_tss + TSS_sp0), %rsp movq PER_CPU_VAR(cpu_tss + TSS_sp0), %rsp
ENABLE_INTERRUPTS(CLBR_NONE) ENABLE_INTERRUPTS(CLBR_NONE)
/* Zero-extending 32-bit regs, do not remove */
movl %ebp, %ebp
movl %eax, %eax
/* Construct iret frame (ss,rsp,rflags,cs,rip) */ /* Construct iret frame (ss,rsp,rflags,cs,rip) */
movl %ebp,%ebp /* zero extension */
pushq_cfi $__USER32_DS pushq_cfi $__USER32_DS
/*CFI_REL_OFFSET ss,0*/ /*CFI_REL_OFFSET ss,0*/
pushq_cfi %rbp pushq_cfi %rbp
@ -134,7 +137,6 @@ ENTRY(ia32_sysenter_target)
CFI_REGISTER rip,r10 CFI_REGISTER rip,r10
pushq_cfi $__USER32_CS pushq_cfi $__USER32_CS
/*CFI_REL_OFFSET cs,0*/ /*CFI_REL_OFFSET cs,0*/
movl %eax, %eax
/* Store thread_info->sysenter_return in rip stack slot */ /* Store thread_info->sysenter_return in rip stack slot */
pushq_cfi %r10 pushq_cfi %r10
CFI_REL_OFFSET rip,0 CFI_REL_OFFSET rip,0
@ -329,9 +331,11 @@ ENTRY(ia32_cstar_target)
movq PER_CPU_VAR(kernel_stack),%rsp movq PER_CPU_VAR(kernel_stack),%rsp
ENABLE_INTERRUPTS(CLBR_NONE) ENABLE_INTERRUPTS(CLBR_NONE)
/* Zero-extending 32-bit regs, do not remove */
movl %eax,%eax
ALLOC_PT_GPREGS_ON_STACK 6*8 /* 6*8: space for orig_ax and iret frame */ ALLOC_PT_GPREGS_ON_STACK 6*8 /* 6*8: space for orig_ax and iret frame */
SAVE_C_REGS_EXCEPT_RCX_R891011 SAVE_C_REGS_EXCEPT_RCX_R891011
movl %eax,%eax /* zero extension */
movq %rax,ORIG_RAX(%rsp) movq %rax,ORIG_RAX(%rsp)
movq %rcx,RIP(%rsp) movq %rcx,RIP(%rsp)
CFI_REL_OFFSET rip,RIP CFI_REL_OFFSET rip,RIP
@ -471,7 +475,9 @@ ENTRY(ia32_syscall)
SWAPGS SWAPGS
ENABLE_INTERRUPTS(CLBR_NONE) ENABLE_INTERRUPTS(CLBR_NONE)
/* Zero-extending 32-bit regs, do not remove */
movl %eax,%eax movl %eax,%eax
pushq_cfi %rax /* store orig_ax */ pushq_cfi %rax /* store orig_ax */
cld cld
/* note the registers are not zero extended to the sf. /* note the registers are not zero extended to the sf.