tdfxfb: code improvements
This patch improves source code mainly by killing redundant variable loads, reducing number of variables, simplifying conditional branches, etc. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Antonino Daplas <adaplas@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Krzysztof Helt
Linus Torvalds
Родитель
9d775e17b5
Коммит
4f05b53b28
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@ -63,12 +63,9 @@
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/fb.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/nvram.h>
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#include <asm/io.h>
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#include <linux/timer.h>
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#include <linux/spinlock.h>
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@ -159,26 +156,15 @@ static char *mode_option __devinitdata = NULL;
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* Hardware-specific funcions
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* ------------------------------------------------------------------------- */
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#ifdef VGA_REG_IO
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static inline u8 vga_inb(struct tdfx_par *par, u32 reg)
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{
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return inb(reg);
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}
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static inline void vga_outb(struct tdfx_par *par, u32 reg, u8 val)
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{
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outb(val, reg);
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}
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#else
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static inline u8 vga_inb(struct tdfx_par *par, u32 reg)
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{
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return inb(par->iobase + reg - 0x300);
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}
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static inline void vga_outb(struct tdfx_par *par, u32 reg, u8 val)
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{
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outb(val, par->iobase + reg - 0x300);
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}
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#endif
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static inline void gra_outb(struct tdfx_par *par, u32 idx, u8 val)
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{
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@ -279,11 +265,11 @@ static int banshee_wait_idle(struct fb_info *info)
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banshee_make_room(par, 1);
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tdfx_outl(par, COMMAND_3D, COMMAND_3D_NOP);
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while (1) {
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i = (tdfx_inl(par, STATUS) & STATUS_BUSY) ? 0 : i + 1;
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if (i == 3)
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break;
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}
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do {
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if ((tdfx_inl(par, STATUS) & STATUS_BUSY) == 0)
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i++;
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} while (i < 3);
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return 0;
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}
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@ -313,16 +299,17 @@ static u32 do_calc_pll(int freq, int *freq_out)
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* Estimate value of n that produces target frequency
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* with current m and k
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*/
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int n_estimated = (freq * (m + 2) * (1 << k) / fref) - 2;
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int n_estimated = ((freq * (m + 2) << k) / fref) - 2;
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/* Search neighborhood of estimated n */
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for (n = max(0, n_estimated - 1);
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n <= min(255, n_estimated + 1); n++) {
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for (n = max(0, n_estimated);
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n <= min(255, n_estimated + 1);
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n++) {
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/*
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* Calculate PLL freqency with current m, k and
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* estimated n
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*/
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int f = fref * (n + 2) / (m + 2) / (1 << k);
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int f = (fref * (n + 2) / (m + 2)) >> k;
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int error = abs(f - freq);
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/*
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@ -342,7 +329,7 @@ static u32 do_calc_pll(int freq, int *freq_out)
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n = best_n;
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m = best_m;
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k = best_k;
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*freq_out = fref * (n + 2) / (m + 2) / (1 << k);
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*freq_out = (fref * (n + 2) / (m + 2)) >> k;
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return (n << 8) | (m << 2) | k;
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}
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@ -387,7 +374,7 @@ static void do_write_regs(struct fb_info *info, struct banshee_reg *reg)
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vga_enable_palette(par);
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vga_enable_video(par);
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banshee_make_room(par, 11);
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banshee_make_room(par, 9);
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tdfx_outl(par, VGAINIT0, reg->vgainit0);
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tdfx_outl(par, DACMODE, reg->dacmode);
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tdfx_outl(par, VIDDESKSTRIDE, reg->stride);
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@ -400,8 +387,8 @@ static void do_write_regs(struct fb_info *info, struct banshee_reg *reg)
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tdfx_outl(par, MISCINIT0, reg->miscinit0);
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banshee_make_room(par, 8);
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tdfx_outl(par, SRCBASE, reg->srcbase);
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tdfx_outl(par, DSTBASE, reg->dstbase);
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tdfx_outl(par, SRCBASE, reg->startaddr);
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tdfx_outl(par, DSTBASE, reg->startaddr);
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tdfx_outl(par, COMMANDEXTRA_2D, 0);
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tdfx_outl(par, CLIP0MIN, 0);
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tdfx_outl(par, CLIP0MAX, 0x0fff0fff);
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@ -414,32 +401,24 @@ static void do_write_regs(struct fb_info *info, struct banshee_reg *reg)
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static unsigned long do_lfb_size(struct tdfx_par *par, unsigned short dev_id)
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{
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u32 draminit0;
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u32 draminit1;
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u32 draminit0 = tdfx_inl(par, DRAMINIT0);
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u32 draminit1 = tdfx_inl(par, DRAMINIT1);
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u32 miscinit1;
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int num_chips;
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int num_chips = (draminit0 & DRAMINIT0_SGRAM_NUM) ? 8 : 4;
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int chip_size; /* in MB */
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u32 lfbsize;
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int has_sgram;
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draminit0 = tdfx_inl(par, DRAMINIT0);
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draminit1 = tdfx_inl(par, DRAMINIT1);
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num_chips = (draminit0 & DRAMINIT0_SGRAM_NUM) ? 8 : 4;
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int has_sgram = draminit1 & DRAMINIT1_MEM_SDRAM;
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if (dev_id < PCI_DEVICE_ID_3DFX_VOODOO5) {
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/* Banshee/Voodoo3 */
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has_sgram = draminit1 & DRAMINIT1_MEM_SDRAM;
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chip_size = 2;
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if (has_sgram)
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chip_size = (draminit0 & DRAMINIT0_SGRAM_TYPE) ? 2 : 1;
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if (has_sgram && (draminit0 & DRAMINIT0_SGRAM_TYPE))
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chip_size = 1;
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} else {
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/* Voodoo4/5 */
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has_sgram = 0;
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chip_size = 1 << ((draminit0 & DRAMINIT0_SGRAM_TYPE_MASK) >> DRAMINIT0_SGRAM_TYPE_SHIFT);
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chip_size = draminit0 & DRAMINIT0_SGRAM_TYPE_MASK;
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chip_size = 1 << (chip_size >> DRAMINIT0_SGRAM_TYPE_SHIFT);
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}
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lfbsize = num_chips * chip_size * 1024 * 1024;
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/* disable block writes for SDRAM */
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miscinit1 = tdfx_inl(par, MISCINIT1);
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@ -448,7 +427,7 @@ static unsigned long do_lfb_size(struct tdfx_par *par, unsigned short dev_id)
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banshee_make_room(par, 1);
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tdfx_outl(par, MISCINIT1, miscinit1);
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return lfbsize;
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return num_chips * chip_size * 1024l * 1024;
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}
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/* ------------------------------------------------------------------------- */
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@ -548,17 +527,18 @@ static int tdfxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
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static int tdfxfb_set_par(struct fb_info *info)
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{
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struct tdfx_par *par = info->par;
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u32 hdispend, hsyncsta, hsyncend, htotal;
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u32 hdispend = info->var.xres;
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u32 hsyncsta = hdispend + info->var.right_margin;
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u32 hsyncend = hsyncsta + info->var.hsync_len;
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u32 htotal = hsyncend + info->var.left_margin;
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u32 hd, hs, he, ht, hbs, hbe;
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u32 vd, vs, ve, vt, vbs, vbe;
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struct banshee_reg reg;
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int fout, freq;
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u32 wd, cpp;
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par->baseline = 0;
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u32 wd;
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u32 cpp = (info->var.bits_per_pixel + 7) >> 3;
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memset(®, 0, sizeof(reg));
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cpp = (info->var.bits_per_pixel + 7) / 8;
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reg.vidcfg = VIDCFG_VIDPROC_ENABLE | VIDCFG_DESK_ENABLE |
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VIDCFG_CURS_X11 |
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@ -568,14 +548,8 @@ static int tdfxfb_set_par(struct fb_info *info)
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/* PLL settings */
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freq = PICOS2KHZ(info->var.pixclock);
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reg.dacmode = 0;
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reg.vidcfg &= ~VIDCFG_2X;
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hdispend = info->var.xres;
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hsyncsta = hdispend + info->var.right_margin;
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hsyncend = hsyncsta + info->var.hsync_len;
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htotal = hsyncend + info->var.left_margin;
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if (freq > par->max_pixclock / 2) {
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freq = freq > par->max_pixclock ? par->max_pixclock : freq;
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reg.dacmode |= DACMODE_2X;
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@ -598,11 +572,16 @@ static int tdfxfb_set_par(struct fb_info *info)
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vs = vd + (info->var.lower_margin << 1);
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ve = vs + (info->var.vsync_len << 1);
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vbe = vt = ve + (info->var.upper_margin << 1) - 1;
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reg.screensize = info->var.xres | (info->var.yres << 13);
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reg.vidcfg |= VIDCFG_HALF_MODE;
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reg.crt[0x09] = 0x80;
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} else {
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vbs = vd = info->var.yres - 1;
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vs = vd + info->var.lower_margin;
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ve = vs + info->var.vsync_len;
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vbe = vt = ve + info->var.upper_margin - 1;
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reg.screensize = info->var.xres | (info->var.yres << 12);
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reg.vidcfg &= ~VIDCFG_HALF_MODE;
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}
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/* this is all pretty standard VGA register stuffing */
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@ -611,11 +590,6 @@ static int tdfxfb_set_par(struct fb_info *info)
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info->var.xres < 480 ? 0x60 :
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info->var.xres < 768 ? 0xe0 : 0x20);
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reg.gra[0x00] = 0x00;
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reg.gra[0x01] = 0x00;
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reg.gra[0x02] = 0x00;
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reg.gra[0x03] = 0x00;
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reg.gra[0x04] = 0x00;
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reg.gra[0x05] = 0x40;
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reg.gra[0x06] = 0x05;
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reg.gra[0x07] = 0x0f;
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@ -638,10 +612,7 @@ static int tdfxfb_set_par(struct fb_info *info)
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reg.att[0x0e] = 0x0e;
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reg.att[0x0f] = 0x0f;
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reg.att[0x10] = 0x41;
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reg.att[0x11] = 0x00;
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reg.att[0x12] = 0x0f;
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reg.att[0x13] = 0x00;
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reg.att[0x14] = 0x00;
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reg.seq[0x00] = 0x03;
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reg.seq[0x01] = 0x01; /* fixme: clkdiv2? */
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@ -663,19 +634,11 @@ static int tdfxfb_set_par(struct fb_info *info)
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((vs & 0x100) >> 6) |
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((vd & 0x100) >> 7) |
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((vt & 0x100) >> 8);
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reg.crt[0x08] = 0x00;
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reg.crt[0x09] = 0x40 | ((vbs & 0x200) >> 4);
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reg.crt[0x0a] = 0x00;
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reg.crt[0x0b] = 0x00;
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reg.crt[0x0c] = 0x00;
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reg.crt[0x0d] = 0x00;
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reg.crt[0x0e] = 0x00;
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reg.crt[0x0f] = 0x00;
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reg.crt[0x09] |= 0x40 | ((vbs & 0x200) >> 4);
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reg.crt[0x10] = vs;
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reg.crt[0x11] = (ve & 0x0f) | 0x20;
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reg.crt[0x12] = vd;
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reg.crt[0x13] = wd;
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reg.crt[0x14] = 0x00;
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reg.crt[0x15] = vbs;
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reg.crt[0x16] = vbe + 1;
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reg.crt[0x17] = 0xc3;
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@ -706,34 +669,15 @@ static int tdfxfb_set_par(struct fb_info *info)
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reg.cursc1 = 0xffffff;
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reg.stride = info->var.xres * cpp;
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reg.startaddr = par->baseline * reg.stride;
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reg.srcbase = reg.startaddr;
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reg.dstbase = reg.startaddr;
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reg.startaddr = info->var.yoffset * reg.stride
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+ info->var.xoffset * cpp;
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/* PLL settings */
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freq = PICOS2KHZ(info->var.pixclock);
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reg.dacmode &= ~DACMODE_2X;
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reg.vidcfg &= ~VIDCFG_2X;
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if (freq > par->max_pixclock / 2) {
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freq = freq > par->max_pixclock ? par->max_pixclock : freq;
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reg.dacmode |= DACMODE_2X;
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reg.vidcfg |= VIDCFG_2X;
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}
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reg.vidpll = do_calc_pll(freq, &fout);
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#if 0
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reg.mempll = do_calc_pll(..., &fout);
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reg.gfxpll = do_calc_pll(..., &fout);
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#endif
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if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
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reg.screensize = info->var.xres | (info->var.yres << 13);
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reg.vidcfg |= VIDCFG_HALF_MODE;
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reg.crt[0x09] |= 0x80;
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} else {
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reg.screensize = info->var.xres | (info->var.yres << 12);
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reg.vidcfg &= ~VIDCFG_HALF_MODE;
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}
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if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED)
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reg.vidcfg |= VIDCFG_INTERLACE;
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reg.miscinit0 = tdfx_inl(par, MISCINIT0);
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@ -758,8 +702,7 @@ static int tdfxfb_set_par(struct fb_info *info)
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do_write_regs(info, ®);
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/* Now change fb_fix_screeninfo according to changes in par */
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info->fix.line_length =
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info->var.xres * ((info->var.bits_per_pixel + 7) >> 3);
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info->fix.line_length = reg.stride;
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info->fix.visual = (info->var.bits_per_pixel == 8)
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? FB_VISUAL_PSEUDOCOLOR
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: FB_VISUAL_TRUECOLOR;
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@ -821,35 +764,28 @@ static int tdfxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
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static int tdfxfb_blank(int blank, struct fb_info *info)
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{
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struct tdfx_par *par = info->par;
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u32 dacmode, state = 0, vgablank = 0;
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int vgablank = 1;
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u32 dacmode = tdfx_inl(par, DACMODE);
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dacmode = tdfx_inl(par, DACMODE);
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dacmode &= ~(BIT(1) | BIT(3));
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switch (blank) {
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case FB_BLANK_UNBLANK: /* Screen: On; HSync: On, VSync: On */
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state = 0;
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vgablank = 0;
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break;
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case FB_BLANK_NORMAL: /* Screen: Off; HSync: On, VSync: On */
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state = 0;
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vgablank = 1;
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break;
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case FB_BLANK_VSYNC_SUSPEND: /* Screen: Off; HSync: On, VSync: Off */
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state = BIT(3);
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vgablank = 1;
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dacmode |= BIT(3);
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break;
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case FB_BLANK_HSYNC_SUSPEND: /* Screen: Off; HSync: Off, VSync: On */
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state = BIT(1);
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vgablank = 1;
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dacmode |= BIT(1);
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break;
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case FB_BLANK_POWERDOWN: /* Screen: Off; HSync: Off, VSync: Off */
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state = BIT(1) | BIT(3);
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vgablank = 1;
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dacmode |= BIT(1) | BIT(3);
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break;
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}
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dacmode &= ~(BIT(1) | BIT(3));
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dacmode |= state;
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banshee_make_room(par, 1);
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tdfx_outl(par, DACMODE, dacmode);
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if (vgablank)
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@ -866,14 +802,13 @@ static int tdfxfb_pan_display(struct fb_var_screeninfo *var,
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struct fb_info *info)
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{
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struct tdfx_par *par = info->par;
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u32 addr;
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u32 addr = var->yoffset * info->fix.line_length;
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if (nopan || var->xoffset || (var->yoffset > var->yres_virtual))
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return -EINVAL;
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if ((var->yoffset + var->yres > var->yres_virtual && nowrap))
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return -EINVAL;
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addr = var->yoffset * info->fix.line_length;
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banshee_make_room(par, 1);
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tdfx_outl(par, VIDDESKSTART, addr);
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@ -962,7 +897,6 @@ static void tdfxfb_copyarea(struct fb_info *info,
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dx = 0;
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}
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||||
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||||
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if (area->sx <= area->dx) {
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//-X
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blitcmd |= BIT(14);
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@ -1061,8 +995,7 @@ static void tdfxfb_imageblit(struct fb_info *info, const struct fb_image *image)
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|||
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||||
/* Send the leftovers now */
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||||
banshee_make_room(par, 3);
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||||
i = size % 4;
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||||
switch (i) {
|
||||
switch (size % 4) {
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||||
case 0:
|
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break;
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case 1:
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||||
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|||
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@ -167,8 +167,6 @@ struct banshee_reg {
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|||
unsigned long clip0max;
|
||||
unsigned long clip1min;
|
||||
unsigned long clip1max;
|
||||
unsigned long srcbase;
|
||||
unsigned long dstbase;
|
||||
unsigned long miscinit0;
|
||||
};
|
||||
|
||||
|
|
@ -177,7 +175,6 @@ struct tdfx_par {
|
|||
u32 palette[16];
|
||||
void __iomem *regbase_virt;
|
||||
unsigned long iobase;
|
||||
u32 baseline;
|
||||
|
||||
struct {
|
||||
int w, u, d;
|
||||
|
|
|
|||
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