dt-bindings: dma: dma40: Prefer to pass sram through phandle

Extend the DMA40 bindings so that we can pass two SRAM
segments as phandles instead of directly referring to the
memory address in the second reg cell. This enables more
granular control over the SRAM, and adds the optiona LCLA
SRAM segment as well.

Deprecate the old way of passing LCPA as a second reg cell,
make sram compulsory.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230417-ux500-dma40-cleanup-v3-1-60bfa6785968@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Linus Walleij 2023-05-16 14:55:31 +02:00 коммит произвёл Vinod Koul
Родитель ac9a78681b
Коммит 4f080c77ec
1 изменённых файлов: 28 добавлений и 8 удалений

Просмотреть файл

@ -112,14 +112,23 @@ properties:
- const: stericsson,dma40
reg:
items:
- description: DMA40 memory base
- description: LCPA memory base
oneOf:
- items:
- description: DMA40 memory base
- items:
- description: DMA40 memory base
- description: LCPA memory base, deprecated, use eSRAM pool instead
deprecated: true
reg-names:
items:
- const: base
- const: lcpa
oneOf:
- items:
- const: base
- items:
- const: base
- const: lcpa
deprecated: true
interrupts:
maxItems: 1
@ -127,6 +136,15 @@ properties:
clocks:
maxItems: 1
sram:
$ref: /schemas/types.yaml#/definitions/phandle-array
description: A phandle array with inner size 1 (no arg cells).
First phandle is the LCPA (Logical Channel Parameter Address) memory.
Second phandle is the LCLA (Logical Channel Link base Address) memory.
maxItems: 2
items:
maxItems: 1
memcpy-channels:
$ref: /schemas/types.yaml#/definitions/uint32-array
description: Array of u32 elements indicating which channels on the DMA
@ -138,6 +156,7 @@ required:
- reg
- interrupts
- clocks
- sram
- memcpy-channels
additionalProperties: false
@ -149,8 +168,9 @@ examples:
#include <dt-bindings/mfd/dbx500-prcmu.h>
dma-controller@801c0000 {
compatible = "stericsson,db8500-dma40", "stericsson,dma40";
reg = <0x801c0000 0x1000>, <0x40010000 0x800>;
reg-names = "base", "lcpa";
reg = <0x801c0000 0x1000>;
reg-names = "base";
sram = <&lcpa>, <&lcla>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <3>;
memcpy-channels = <56 57 58 59 60>;