HUB interrupts are allocated per node, not per slice. Make manipulation
of the interrupt mask register atomic by disabling interrupts. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Родитель
6cbe063159
Коммит
4f12bfe5a4
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@ -56,12 +56,12 @@ static void __init per_hub_init(cnodeid_t cnode)
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{
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struct hub_data *hub = hub_data(cnode);
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nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode);
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int i;
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cpu_set(smp_processor_id(), hub->h_cpus);
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if (test_and_set_bit(cnode, hub_init_mask))
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return;
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/*
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* Set CRB timeout at 5ms, (< PI timeout of 10ms)
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*/
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@ -88,6 +88,24 @@ static void __init per_hub_init(cnodeid_t cnode)
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__flush_cache_all();
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}
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#endif
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/*
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* Some interrupts are reserved by hardware or by software convention.
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* Mark these as reserved right away so they won't be used accidently
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* later.
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*/
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for (i = 0; i <= BASE_PCI_IRQ; i++) {
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__set_bit(i, hub->irq_alloc_mask);
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LOCAL_HUB_CLR_INTR(INT_PEND0_BASELVL + i);
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}
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__set_bit(IP_PEND0_6_63, hub->irq_alloc_mask);
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LOCAL_HUB_S(PI_INT_PEND_MOD, IP_PEND0_6_63);
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for (i = NI_BRDCAST_ERR_A; i <= MSC_PANIC_INTR; i++) {
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__set_bit(i, hub->irq_alloc_mask);
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LOCAL_HUB_CLR_INTR(INT_PEND1_BASELVL + i);
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}
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}
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void __init per_cpu_init(void)
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@ -104,29 +122,11 @@ void __init per_cpu_init(void)
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clear_c0_status(ST0_IM);
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per_hub_init(cnode);
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for (i = 0; i < LEVELS_PER_SLICE; i++)
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si->level_to_irq[i] = -1;
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/*
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* Some interrupts are reserved by hardware or by software convention.
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* Mark these as reserved right away so they won't be used accidently
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* later.
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*/
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for (i = 0; i <= BASE_PCI_IRQ; i++) {
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__set_bit(i, si->irq_alloc_mask);
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LOCAL_HUB_S(PI_INT_PEND_MOD, i);
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}
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__set_bit(IP_PEND0_6_63, si->irq_alloc_mask);
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LOCAL_HUB_S(PI_INT_PEND_MOD, IP_PEND0_6_63);
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for (i = NI_BRDCAST_ERR_A; i <= MSC_PANIC_INTR; i++) {
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__set_bit(i, si->irq_alloc_mask + 1);
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LOCAL_HUB_S(PI_INT_PEND_MOD, i);
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}
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LOCAL_HUB_L(PI_INT_PEND0);
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/*
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* We use this so we can find the local hub's data as fast as only
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* possible.
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@ -140,8 +140,6 @@ void __init per_cpu_init(void)
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install_cpu_nmi_handler(cputoslice(cpu));
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set_c0_status(SRB_DEV0 | SRB_DEV1);
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per_hub_init(cnode);
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}
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/*
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@ -74,14 +74,15 @@ extern int irq_to_slot[];
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static inline int alloc_level(int cpu, int irq)
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{
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struct hub_data *hub = hub_data(cpu_to_node(cpu));
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struct slice_data *si = cpu_data[cpu].data;
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int level; /* pre-allocated entries */
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int level;
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level = find_first_zero_bit(si->irq_alloc_mask, LEVELS_PER_SLICE);
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level = find_first_zero_bit(hub->irq_alloc_mask, LEVELS_PER_SLICE);
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if (level >= LEVELS_PER_SLICE)
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panic("Cpu %d flooded with devices\n", cpu);
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__set_bit(level, si->irq_alloc_mask);
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__set_bit(level, hub->irq_alloc_mask);
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si->level_to_irq[level] = irq;
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return level;
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@ -216,9 +217,11 @@ static int intr_connect_level(int cpu, int bit)
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{
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nasid_t nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
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struct slice_data *si = cpu_data[cpu].data;
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unsigned long flags;
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__set_bit(bit, si->irq_enable_mask);
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set_bit(bit, si->irq_enable_mask);
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local_irq_save(flags);
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if (!cputoslice(cpu)) {
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REMOTE_HUB_S(nasid, PI_INT_MASK0_A, si->irq_enable_mask[0]);
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REMOTE_HUB_S(nasid, PI_INT_MASK1_A, si->irq_enable_mask[1]);
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@ -226,6 +229,7 @@ static int intr_connect_level(int cpu, int bit)
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REMOTE_HUB_S(nasid, PI_INT_MASK0_B, si->irq_enable_mask[0]);
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REMOTE_HUB_S(nasid, PI_INT_MASK1_B, si->irq_enable_mask[1]);
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}
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local_irq_restore(flags);
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return 0;
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}
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@ -235,7 +239,7 @@ static int intr_disconnect_level(int cpu, int bit)
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nasid_t nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
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struct slice_data *si = cpu_data[cpu].data;
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__clear_bit(bit, si->irq_enable_mask);
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clear_bit(bit, si->irq_enable_mask);
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if (!cputoslice(cpu)) {
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REMOTE_HUB_S(nasid, PI_INT_MASK0_A, si->irq_enable_mask[0]);
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@ -298,6 +302,7 @@ static unsigned int startup_bridge_irq(unsigned int irq)
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static void shutdown_bridge_irq(unsigned int irq)
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{
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struct bridge_controller *bc = IRQ_TO_BRIDGE(irq);
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struct hub_data *hub = hub_data(cpu_to_node(bc->irq_cpu));
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bridge_t *bridge = bc->base;
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struct slice_data *si = cpu_data[bc->irq_cpu].data;
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int pin, swlevel;
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@ -313,7 +318,7 @@ static void shutdown_bridge_irq(unsigned int irq)
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swlevel = find_level(&cpu, irq);
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intr_disconnect_level(cpu, swlevel);
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__clear_bit(swlevel, si->irq_alloc_mask);
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__clear_bit(swlevel, hub->irq_alloc_mask);
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si->level_to_irq[swlevel] = -1;
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bridge->b_int_enable &= ~(1 << pin);
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@ -433,25 +438,24 @@ void install_ipi(void)
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int slice = LOCAL_HUB_L(PI_CPU_NUM);
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int cpu = smp_processor_id();
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struct slice_data *si = cpu_data[cpu].data;
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hubreg_t mask, set;
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struct hub_data *hub = hub_data(cpu_to_node(cpu));
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int resched, call;
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resched = CPU_RESCHED_A_IRQ + slice;
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__set_bit(resched, hub->irq_alloc_mask);
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__set_bit(resched, si->irq_enable_mask);
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LOCAL_HUB_CLR_INTR(resched);
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call = CPU_CALL_A_IRQ + slice;
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__set_bit(call, hub->irq_alloc_mask);
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__set_bit(call, si->irq_enable_mask);
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LOCAL_HUB_CLR_INTR(call);
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if (slice == 0) {
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LOCAL_HUB_CLR_INTR(CPU_RESCHED_A_IRQ);
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LOCAL_HUB_CLR_INTR(CPU_CALL_A_IRQ);
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mask = LOCAL_HUB_L(PI_INT_MASK0_A); /* Slice A */
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set = (1UL << CPU_RESCHED_A_IRQ) | (1UL << CPU_CALL_A_IRQ);
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mask |= set;
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si->irq_enable_mask[0] |= set;
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si->irq_alloc_mask[0] |= set;
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LOCAL_HUB_S(PI_INT_MASK0_A, mask);
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LOCAL_HUB_S(PI_INT_MASK0_A, si->irq_enable_mask[0]);
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LOCAL_HUB_S(PI_INT_MASK1_A, si->irq_enable_mask[1]);
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} else {
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LOCAL_HUB_CLR_INTR(CPU_RESCHED_B_IRQ);
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LOCAL_HUB_CLR_INTR(CPU_CALL_B_IRQ);
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mask = LOCAL_HUB_L(PI_INT_MASK0_B); /* Slice B */
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set = (1UL << CPU_RESCHED_B_IRQ) | (1UL << CPU_CALL_B_IRQ);
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mask |= set;
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si->irq_enable_mask[1] |= set;
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si->irq_alloc_mask[1] |= set;
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LOCAL_HUB_S(PI_INT_MASK0_B, mask);
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LOCAL_HUB_S(PI_INT_MASK0_B, si->irq_enable_mask[0]);
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LOCAL_HUB_S(PI_INT_MASK1_B, si->irq_enable_mask[1]);
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}
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}
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