MIPS: Kernel hangs occasionally during boot.
The Kernel hangs occasionally during boot after "Calibrating delay loop..". This is caused by the c0_compare_int_usable() routine in cevt-r4k.c returning false which causes the system to disable the timer and hang later. The false return happens because the routine is using a series of four calls to irq_disable_hazard() as a delay while it waits for the timer changes to propagate to the cp0 cause register. On newer MIPS cores, like the 74K, the series of irq_disable_hazard() calls turn into ehb instructions and can take as little as a few clock ticks for all 4 instructions. This is not enough of a delay, so the routine thinks the timer is not working. This fix uses up to a max number of cycle counter ticks for the delay and uses back_to_back_c0_hazard() instead of irq_disable_hazard() to handle the hazard condition between cp0 writes and cp0 reads. Signed-off-by: Al Cooper <alcooperx@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2911/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -103,19 +103,10 @@ static int c0_compare_int_pending(void)
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/*
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* Compare interrupt can be routed and latched outside the core,
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* so a single execution hazard barrier may not be enough to give
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* it time to clear as seen in the Cause register. 4 time the
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* pipeline depth seems reasonably conservative, and empirically
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* works better in configurations with high CPU/bus clock ratios.
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* so wait up to worst case number of cycle counter ticks for timer interrupt
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* changes to propagate to the cause register.
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*/
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#define compare_change_hazard() \
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do { \
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irq_disable_hazard(); \
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irq_disable_hazard(); \
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irq_disable_hazard(); \
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irq_disable_hazard(); \
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} while (0)
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#define COMPARE_INT_SEEN_TICKS 50
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int c0_compare_int_usable(void)
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{
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@ -126,8 +117,12 @@ int c0_compare_int_usable(void)
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* IP7 already pending? Try to clear it by acking the timer.
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*/
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if (c0_compare_int_pending()) {
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write_c0_compare(read_c0_count());
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compare_change_hazard();
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cnt = read_c0_count();
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write_c0_compare(cnt);
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back_to_back_c0_hazard();
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while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
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if (!c0_compare_int_pending())
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break;
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if (c0_compare_int_pending())
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return 0;
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}
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@ -136,7 +131,7 @@ int c0_compare_int_usable(void)
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cnt = read_c0_count();
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cnt += delta;
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write_c0_compare(cnt);
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compare_change_hazard();
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back_to_back_c0_hazard();
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if ((int)(read_c0_count() - cnt) < 0)
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break;
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/* increase delta if the timer was already expired */
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@ -145,12 +140,17 @@ int c0_compare_int_usable(void)
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while ((int)(read_c0_count() - cnt) <= 0)
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; /* Wait for expiry */
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compare_change_hazard();
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while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
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if (c0_compare_int_pending())
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break;
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if (!c0_compare_int_pending())
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return 0;
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write_c0_compare(read_c0_count());
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compare_change_hazard();
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cnt = read_c0_count();
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write_c0_compare(cnt);
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back_to_back_c0_hazard();
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while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
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if (!c0_compare_int_pending())
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break;
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if (c0_compare_int_pending())
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return 0;
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