watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu register
Add device tree support for exynos5250 and 5420 SoCs and use syscon regmap interface to configure AUTOMATIC_WDT_RESET_DISABLE and MASK_WDT_RESET_REQUEST registers of PMU to mask/unmask enable/disable of watchdog in probe and s2r scenarios. Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
This commit is contained in:
Родитель
178624403c
Коммит
4f1f653a68
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@ -5,10 +5,29 @@ after a preset amount of time during which the WDT reset event has not
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occurred.
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Required properties:
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- compatible : should be "samsung,s3c2410-wdt"
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- compatible : should be one among the following
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(a) "samsung,s3c2410-wdt" for Exynos4 and previous SoCs
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(b) "samsung,exynos5250-wdt" for Exynos5250
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(c) "samsung,exynos5420-wdt" for Exynos5420
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- reg : base physical address of the controller and length of memory mapped
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region.
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- interrupts : interrupt number to the cpu.
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- samsung,syscon-phandle : reference to syscon node (This property required only
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in case of compatible being "samsung,exynos5250-wdt" or "samsung,exynos5420-wdt".
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In case of Exynos5250 and 5420 this property points to syscon node holding the PMU
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base address)
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Optional properties:
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- timeout-sec : contains the watchdog timeout in seconds.
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Example:
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watchdog@101D0000 {
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compatible = "samsung,exynos5250-wdt";
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reg = <0x101D0000 0x100>;
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interrupts = <0 42 0>;
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clocks = <&clock 336>;
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clock-names = "watchdog";
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samsung,syscon-phandle = <&pmu_syscon>;
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};
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@ -196,6 +196,7 @@ config S3C2410_WATCHDOG
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tristate "S3C2410 Watchdog"
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depends on HAVE_S3C2410_WATCHDOG
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select WATCHDOG_CORE
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select MFD_SYSCON if ARCH_EXYNOS5
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help
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Watchdog timer block in the Samsung SoCs. This will reboot
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the system when the timer expires with the watchdog enabled.
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@ -40,6 +40,8 @@
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#define S3C2410_WTCON 0x00
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#define S3C2410_WTDAT 0x04
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@ -60,6 +62,10 @@
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#define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
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#define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME (15)
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#define EXYNOS5_WDT_DISABLE_REG_OFFSET 0x0408
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#define EXYNOS5_WDT_MASK_RESET_REG_OFFSET 0x040c
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#define QUIRK_HAS_PMU_CONFIG (1 << 0)
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static bool nowayout = WATCHDOG_NOWAYOUT;
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static int tmr_margin;
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static int tmr_atboot = CONFIG_S3C2410_WATCHDOG_ATBOOT;
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@ -83,6 +89,25 @@ MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, "
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"0 to reboot (default 0)");
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MODULE_PARM_DESC(debug, "Watchdog debug, set to >1 for debug (default 0)");
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/**
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* struct s3c2410_wdt_variant - Per-variant config data
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*
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* @disable_reg: Offset in pmureg for the register that disables the watchdog
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* timer reset functionality.
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* @mask_reset_reg: Offset in pmureg for the register that masks the watchdog
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* timer reset functionality.
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* @mask_bit: Bit number for the watchdog timer in the disable register and the
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* mask reset register.
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* @quirks: A bitfield of quirks.
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*/
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struct s3c2410_wdt_variant {
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int disable_reg;
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int mask_reset_reg;
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int mask_bit;
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u32 quirks;
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};
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struct s3c2410_wdt {
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struct device *dev;
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struct clk *clock;
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@ -93,8 +118,50 @@ struct s3c2410_wdt {
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unsigned long wtdat_save;
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struct watchdog_device wdt_device;
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struct notifier_block freq_transition;
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struct s3c2410_wdt_variant *drv_data;
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struct regmap *pmureg;
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};
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static const struct s3c2410_wdt_variant drv_data_s3c2410 = {
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.quirks = 0
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};
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#ifdef CONFIG_OF
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static const struct s3c2410_wdt_variant drv_data_exynos5250 = {
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.disable_reg = EXYNOS5_WDT_DISABLE_REG_OFFSET,
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.mask_reset_reg = EXYNOS5_WDT_MASK_RESET_REG_OFFSET,
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.mask_bit = 20,
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.quirks = QUIRK_HAS_PMU_CONFIG
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};
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static const struct s3c2410_wdt_variant drv_data_exynos5420 = {
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.disable_reg = EXYNOS5_WDT_DISABLE_REG_OFFSET,
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.mask_reset_reg = EXYNOS5_WDT_MASK_RESET_REG_OFFSET,
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.mask_bit = 0,
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.quirks = QUIRK_HAS_PMU_CONFIG
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};
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static const struct of_device_id s3c2410_wdt_match[] = {
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{ .compatible = "samsung,s3c2410-wdt",
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.data = &drv_data_s3c2410 },
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{ .compatible = "samsung,exynos5250-wdt",
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.data = &drv_data_exynos5250 },
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{ .compatible = "samsung,exynos5420-wdt",
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.data = &drv_data_exynos5420 },
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{},
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};
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MODULE_DEVICE_TABLE(of, s3c2410_wdt_match);
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#endif
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static const struct platform_device_id s3c2410_wdt_ids[] = {
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{
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.name = "s3c2410-wdt",
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.driver_data = (unsigned long)&drv_data_s3c2410,
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},
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{}
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};
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MODULE_DEVICE_TABLE(platform, s3c2410_wdt_ids);
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/* watchdog control routines */
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#define DBG(fmt, ...) \
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@ -110,6 +177,35 @@ static inline struct s3c2410_wdt *freq_to_wdt(struct notifier_block *nb)
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return container_of(nb, struct s3c2410_wdt, freq_transition);
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}
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static int s3c2410wdt_mask_and_disable_reset(struct s3c2410_wdt *wdt, bool mask)
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{
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int ret;
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u32 mask_val = 1 << wdt->drv_data->mask_bit;
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u32 val = 0;
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/* No need to do anything if no PMU CONFIG needed */
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if (!(wdt->drv_data->quirks & QUIRK_HAS_PMU_CONFIG))
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return 0;
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if (mask)
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val = mask_val;
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ret = regmap_update_bits(wdt->pmureg,
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wdt->drv_data->disable_reg,
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mask_val, val);
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if (ret < 0)
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goto error;
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ret = regmap_update_bits(wdt->pmureg,
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wdt->drv_data->mask_reset_reg,
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mask_val, val);
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error:
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if (ret < 0)
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dev_err(wdt->dev, "failed to update reg(%d)\n", ret);
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return ret;
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}
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static int s3c2410wdt_keepalive(struct watchdog_device *wdd)
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{
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struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
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@ -328,6 +424,20 @@ static inline void s3c2410wdt_cpufreq_deregister(struct s3c2410_wdt *wdt)
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}
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#endif
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/* s3c2410_get_wdt_driver_data */
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static inline struct s3c2410_wdt_variant *
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get_wdt_drv_data(struct platform_device *pdev)
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{
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if (pdev->dev.of_node) {
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const struct of_device_id *match;
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match = of_match_node(s3c2410_wdt_match, pdev->dev.of_node);
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return (struct s3c2410_wdt_variant *)match->data;
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} else {
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return (struct s3c2410_wdt_variant *)
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platform_get_device_id(pdev)->driver_data;
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}
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}
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static int s3c2410wdt_probe(struct platform_device *pdev)
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{
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struct device *dev;
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@ -350,6 +460,16 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
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spin_lock_init(&wdt->lock);
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wdt->wdt_device = s3c2410_wdd;
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wdt->drv_data = get_wdt_drv_data(pdev);
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if (wdt->drv_data->quirks & QUIRK_HAS_PMU_CONFIG) {
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wdt->pmureg = syscon_regmap_lookup_by_phandle(dev->of_node,
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"samsung,syscon-phandle");
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if (IS_ERR(wdt->pmureg)) {
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dev_err(dev, "syscon regmap lookup failed.\n");
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return PTR_ERR(wdt->pmureg);
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}
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}
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wdt_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (wdt_irq == NULL) {
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dev_err(dev, "no irq resource specified\n");
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@ -418,6 +538,10 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
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goto err_cpufreq;
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}
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ret = s3c2410wdt_mask_and_disable_reset(wdt, false);
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if (ret < 0)
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goto err_unregister;
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if (tmr_atboot && started == 0) {
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dev_info(dev, "starting watchdog timer\n");
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s3c2410wdt_start(&wdt->wdt_device);
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@ -442,6 +566,9 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
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return 0;
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err_unregister:
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watchdog_unregister_device(&wdt->wdt_device);
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err_cpufreq:
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s3c2410wdt_cpufreq_deregister(wdt);
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@ -455,8 +582,13 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
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static int s3c2410wdt_remove(struct platform_device *dev)
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{
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int ret;
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struct s3c2410_wdt *wdt = platform_get_drvdata(dev);
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ret = s3c2410wdt_mask_and_disable_reset(wdt, true);
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if (ret < 0)
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return ret;
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watchdog_unregister_device(&wdt->wdt_device);
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s3c2410wdt_cpufreq_deregister(wdt);
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@ -471,6 +603,8 @@ static void s3c2410wdt_shutdown(struct platform_device *dev)
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{
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struct s3c2410_wdt *wdt = platform_get_drvdata(dev);
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s3c2410wdt_mask_and_disable_reset(wdt, true);
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s3c2410wdt_stop(&wdt->wdt_device);
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}
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@ -478,12 +612,17 @@ static void s3c2410wdt_shutdown(struct platform_device *dev)
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static int s3c2410wdt_suspend(struct device *dev)
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{
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int ret;
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struct s3c2410_wdt *wdt = dev_get_drvdata(dev);
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/* Save watchdog state, and turn it off. */
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wdt->wtcon_save = readl(wdt->reg_base + S3C2410_WTCON);
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wdt->wtdat_save = readl(wdt->reg_base + S3C2410_WTDAT);
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ret = s3c2410wdt_mask_and_disable_reset(wdt, true);
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if (ret < 0)
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return ret;
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/* Note that WTCNT doesn't need to be saved. */
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s3c2410wdt_stop(&wdt->wdt_device);
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@ -492,6 +631,7 @@ static int s3c2410wdt_suspend(struct device *dev)
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static int s3c2410wdt_resume(struct device *dev)
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{
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int ret;
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struct s3c2410_wdt *wdt = dev_get_drvdata(dev);
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/* Restore watchdog state. */
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@ -499,6 +639,10 @@ static int s3c2410wdt_resume(struct device *dev)
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writel(wdt->wtdat_save, wdt->reg_base + S3C2410_WTCNT);/* Reset count */
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writel(wdt->wtcon_save, wdt->reg_base + S3C2410_WTCON);
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ret = s3c2410wdt_mask_and_disable_reset(wdt, false);
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if (ret < 0)
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return ret;
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dev_info(dev, "watchdog %sabled\n",
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(wdt->wtcon_save & S3C2410_WTCON_ENABLE) ? "en" : "dis");
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@ -509,18 +653,11 @@ static int s3c2410wdt_resume(struct device *dev)
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static SIMPLE_DEV_PM_OPS(s3c2410wdt_pm_ops, s3c2410wdt_suspend,
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s3c2410wdt_resume);
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#ifdef CONFIG_OF
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static const struct of_device_id s3c2410_wdt_match[] = {
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{ .compatible = "samsung,s3c2410-wdt" },
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{},
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};
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MODULE_DEVICE_TABLE(of, s3c2410_wdt_match);
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#endif
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static struct platform_driver s3c2410wdt_driver = {
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.probe = s3c2410wdt_probe,
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.remove = s3c2410wdt_remove,
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.shutdown = s3c2410wdt_shutdown,
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.id_table = s3c2410_wdt_ids,
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.driver = {
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.owner = THIS_MODULE,
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.name = "s3c2410-wdt",
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@ -535,4 +672,3 @@ MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, "
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"Dimitry Andric <dimitry.andric@tomtom.com>");
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MODULE_DESCRIPTION("S3C2410 Watchdog Device Driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:s3c2410-wdt");
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