ARM: s5p64x0: fix building with only one soc type
The s5p64x0 platform supports two distinct SoCs, s5p6440 and s5p6450, and in the normal configuration, both are enabled. However if we build a kernel that only enables one of the two, the #ifdef logic in common.c breaks down, as some of the functions declared in the header are defined to NULL using the preprocessor but then defined anyway. This patch cleans up the mess and ensures that each function has either exactly one C declaration and one matching C definition, or we have a NULL defined function pointer but no C definition. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Ben Dooks <ben-linux@fluff.org>
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4f579c0391
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@ -205,6 +205,7 @@ void __init s5p64x0_init_io(struct map_desc *mach_desc, int size)
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samsung_pwm_set_platdata(&s5p64x0_pwm_variant);
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}
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#ifdef CONFIG_CPU_S5P6440
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void __init s5p6440_map_io(void)
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{
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/* initialize any device information early */
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@ -218,7 +219,9 @@ void __init s5p6440_map_io(void)
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iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
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}
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#endif
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#ifdef CONFIG_CPU_S5P6450
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void __init s5p6450_map_io(void)
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{
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/* initialize any device information early */
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@ -232,13 +235,14 @@ void __init s5p6450_map_io(void)
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iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
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}
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#endif
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/*
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* s5p64x0_init_clocks
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*
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* register and setup the CPU clocks
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*/
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#ifdef CONFIG_CPU_S5P6440
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void __init s5p6440_init_clocks(int xtal)
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{
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printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
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@ -248,7 +252,9 @@ void __init s5p6440_init_clocks(int xtal)
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s5p6440_register_clocks();
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s5p6440_setup_clocks();
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}
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#endif
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#ifdef CONFIG_CPU_S5P6450
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void __init s5p6450_init_clocks(int xtal)
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{
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printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
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@ -258,13 +264,14 @@ void __init s5p6450_init_clocks(int xtal)
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s5p6450_register_clocks();
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s5p6450_setup_clocks();
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}
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#endif
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/*
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* s5p64x0_init_irq
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*
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* register the CPU interrupts
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*/
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#ifdef CONFIG_CPU_S5P6440
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void __init s5p6440_init_irq(void)
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{
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/* S5P6440 supports 2 VIC */
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@ -279,7 +286,9 @@ void __init s5p6440_init_irq(void)
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s5p_init_irq(vic, ARRAY_SIZE(vic));
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}
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#endif
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#ifdef CONFIG_CPU_S5P6450
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void __init s5p6450_init_irq(void)
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{
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/* S5P6450 supports only 2 VIC */
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@ -294,6 +303,7 @@ void __init s5p6450_init_irq(void)
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s5p_init_irq(vic, ARRAY_SIZE(vic));
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}
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#endif
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struct bus_type s5p64x0_subsys = {
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.name = "s5p64x0-core",
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@ -321,6 +331,7 @@ int __init s5p64x0_init(void)
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}
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/* uart registration process */
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#ifdef CONFIG_CPU_S5P6440
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void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
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{
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int uart;
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@ -332,11 +343,14 @@ void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
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s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
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}
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#endif
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#ifdef CONFIG_CPU_S5P6450
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void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
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{
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s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
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}
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#endif
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#define eint_offset(irq) ((irq) - IRQ_EINT(0))
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@ -25,10 +25,10 @@ void s5p6450_register_clocks(void);
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void s5p6450_setup_clocks(void);
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void s5p64x0_restart(enum reboot_mode mode, const char *cmd);
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extern int s5p64x0_init(void);
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#ifdef CONFIG_CPU_S5P6440
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extern int s5p64x0_init(void);
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extern void s5p6440_map_io(void);
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extern void s5p6440_init_clocks(int xtal);
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@ -38,12 +38,10 @@ extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
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#define s5p6440_init_clocks NULL
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#define s5p6440_init_uarts NULL
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#define s5p6440_map_io NULL
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#define s5p64x0_init NULL
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#endif
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#ifdef CONFIG_CPU_S5P6450
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extern int s5p64x0_init(void);
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extern void s5p6450_map_io(void);
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extern void s5p6450_init_clocks(int xtal);
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@ -53,7 +51,6 @@ extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no);
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#define s5p6450_init_clocks NULL
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#define s5p6450_init_uarts NULL
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#define s5p6450_map_io NULL
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#define s5p64x0_init NULL
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#endif
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#endif /* __ARCH_ARM_MACH_S5P64X0_COMMON_H */
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